[net-next-2.6.git] / arch / cris / boot / compressed / misc.c

/*
 * misc.c
 *
 * This is a collection of several routines from gzip-1.0.3
 * adapted for Linux.
 *
 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
 * puts by Nick Holloway 1993, better puts by Martin Mares 1995
 * adaptation for Linux/CRIS Axis Communications AB, 1999
 *
 */

/* where the piggybacked kernel image expects itself to live.
 * it is the same address we use when we network load an uncompressed
 * image into DRAM, and it is the address the kernel is linked to live
 * at by vmlinux.lds.S
 */

#define KERNEL_LOAD_ADR 0x40004000

#include <linux/types.h>

#ifdef CONFIG_ETRAX_ARCH_V32
#include <hwregs/reg_rdwr.h>
#include <hwregs/reg_map.h>
#include <hwregs/ser_defs.h>
#include <hwregs/pinmux_defs.h>
#ifdef CONFIG_CRIS_MACH_ARTPEC3
#include <hwregs/clkgen_defs.h>
#endif
#else
#include <arch/svinto.h>
#endif

/*
 * gzip declarations
 */

#define OF(args)  args
#define STATIC static

void *memset(void *s, int c, size_t n);
void *memcpy(void *__dest, __const void *__src, size_t __n);

#define memzero(s, n)     memset((s), 0, (n))

typedef unsigned char  uch;
typedef unsigned short ush;
typedef unsigned long  ulg;

#define WSIZE 0x8000		/* Window size must be at least 32k, */
				/* and a power of two */

static uch *inbuf;	     /* input buffer */
static uch window[WSIZE];    /* Sliding window buffer */

unsigned inptr = 0;	/* index of next byte to be processed in inbuf
			 * After decompression it will contain the
			 * compressed size, and head.S will read it.
			 */

static unsigned outcnt = 0;  /* bytes in output buffer */

/* gzip flag byte */
#define ASCII_FLAG   0x01 /* bit 0 set: file probably ascii text */
#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
#define EXTRA_FIELD  0x04 /* bit 2 set: extra field present */
#define ORIG_NAME    0x08 /* bit 3 set: original file name present */
#define COMMENT      0x10 /* bit 4 set: file comment present */
#define ENCRYPTED    0x20 /* bit 5 set: file is encrypted */
#define RESERVED     0xC0 /* bit 6,7:   reserved */

#define get_byte() (inbuf[inptr++])

/* Diagnostic functions */
#ifdef DEBUG
#  define Assert(cond, msg) do { \
		if (!(cond)) \
			error(msg); \
	} while (0)
#  define Trace(x) fprintf x
#  define Tracev(x) do { \
		if (verbose) \
			fprintf x; \
	} while (0)
#  define Tracevv(x) do { \
		if (verbose > 1) \
			fprintf x; \
	} while (0)
#  define Tracec(c, x) do { \
		if (verbose && (c)) \
			fprintf x; \
	} while (0)
#  define Tracecv(c, x) do { \
		if (verbose > 1 && (c)) \
			fprintf x; \
	} while (0)
#else
#  define Assert(cond, msg)
#  define Trace(x)
#  define Tracev(x)
#  define Tracevv(x)
#  define Tracec(c, x)
#  define Tracecv(c, x)
#endif

static void flush_window(void);
static void error(char *m);
static void aputs(const char *s);

extern char *input_data;  /* lives in head.S */

static long bytes_out;
static uch *output_data;
static unsigned long output_ptr;

/* the "heap" is put directly after the BSS ends, at end */

extern int _end;
static long free_mem_ptr = (long)&_end;
static long free_mem_end_ptr;

#include "../../../../../lib/inflate.c"

/* decompressor info and error messages to serial console */

#ifdef CONFIG_ETRAX_ARCH_V32
static inline void serout(const char *s, reg_scope_instances regi_ser)
{
	reg_ser_rs_stat_din rs;
	reg_ser_rw_dout dout = {.data = *s};

	do {
		rs = REG_RD(ser, regi_ser, rs_stat_din);
	}
	while (!rs.tr_rdy);/* Wait for transceiver. */

	REG_WR(ser, regi_ser, rw_dout, dout);
}
#define SEROUT(S, N) \
	do { \
		serout(S, regi_ser ## N); \
		s++; \
	} while (0)
#else
#define SEROUT(S, N) do { \
		while (!(*R_SERIAL ## N ## _STATUS & (1 << 5))) \
			; \
		*R_SERIAL ## N ## _TR_DATA = *s++; \
	} while (0)
#endif

static void aputs(const char *s)
{
#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
	while (*s) {
#ifdef CONFIG_ETRAX_DEBUG_PORT0
		SEROUT(s, 0);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT1
		SEROUT(s, 1);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT2
		SEROUT(s, 2);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT3
		SEROUT(s, 3);
#endif
	}
#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */
}

void *memset(void *s, int c, size_t n)
{
	int i;
	char *ss = (char*)s;

	for (i=0;i<n;i++) ss[i] = c;

	return s;
}

void *memcpy(void *__dest, __const void *__src, size_t __n)
{
	int i;
	char *d = (char *)__dest, *s = (char *)__src;

	for (i = 0; i < __n; i++)
		d[i] = s[i];

	return __dest;
}

/* ===========================================================================
 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
 * (Used for the decompressed data only.)
 */

static void flush_window(void)
{
	ulg c = crc;         /* temporary variable */
	unsigned n;
	uch *in, *out, ch;

	in = window;
	out = &output_data[output_ptr];
	for (n = 0; n < outcnt; n++) {
		ch = *out = *in;
		out++;
		in++;
		c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
	}
	crc = c;
	bytes_out += (ulg)outcnt;
	output_ptr += (ulg)outcnt;
	outcnt = 0;
}

static void error(char *x)
{
	aputs("\n\n");
	aputs(x);
	aputs("\n\n -- System halted\n");

	while(1);	/* Halt */
}

void setup_normal_output_buffer(void)
{
	output_data = (char *)KERNEL_LOAD_ADR;
}

#ifdef CONFIG_ETRAX_ARCH_V32
static inline void serial_setup(reg_scope_instances regi_ser)
{
	reg_ser_rw_xoff xoff;
	reg_ser_rw_tr_ctrl tr_ctrl;
	reg_ser_rw_rec_ctrl rec_ctrl;
	reg_ser_rw_tr_baud_div tr_baud;
	reg_ser_rw_rec_baud_div rec_baud;

	/* Turn off XOFF. */
	xoff = REG_RD(ser, regi_ser, rw_xoff);

	xoff.chr = 0;
	xoff.automatic = regk_ser_no;

	REG_WR(ser, regi_ser, rw_xoff, xoff);

	/* Set baudrate and stopbits. */
	tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
	rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
	tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
	rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);

	tr_ctrl.stop_bits = 1;	/* 2 stop bits. */
	tr_ctrl.en = 1; /* enable transmitter */
	rec_ctrl.en = 1; /* enabler receiver */

	/*
	 * The baudrate setup used to be a bit fishy, but now transmitter and
	 * receiver are both set to the intended baud rate, 115200.
	 * The magic value is 29.493 MHz.
	 */
	tr_ctrl.base_freq = regk_ser_f29_493;
	rec_ctrl.base_freq = regk_ser_f29_493;
	tr_baud.div = (29493000 / 8) / 115200;
	rec_baud.div = (29493000 / 8) / 115200;

	REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
	REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
	REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
	REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
}
#endif

void decompress_kernel(void)
{
	char revision;
	char compile_rev;

#ifdef CONFIG_ETRAX_ARCH_V32
	/* Need at least a CRISv32 to run. */
	compile_rev = 32;
#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
    defined(CONFIG_ETRAX_DEBUG_PORT2) || \
    defined(CONFIG_ETRAX_DEBUG_PORT3)
	reg_pinmux_rw_hwprot hwprot;

#ifdef CONFIG_CRIS_MACH_ARTPEC3
	reg_clkgen_rw_clk_ctrl clk_ctrl;

	/* Enable corresponding clock region when serial 1..3 selected */

	clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
	clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
	REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
#endif

	/* pinmux setup for ports 1..3 */
	hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
#endif


#ifdef CONFIG_ETRAX_DEBUG_PORT0
	serial_setup(regi_ser0);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT1
	hwprot.ser1 = regk_pinmux_yes;
	serial_setup(regi_ser1);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT2
	hwprot.ser2 = regk_pinmux_yes;
	serial_setup(regi_ser2);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT3
	hwprot.ser3 = regk_pinmux_yes;
	serial_setup(regi_ser3);
#endif
#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
    defined(CONFIG_ETRAX_DEBUG_PORT2) || \
    defined(CONFIG_ETRAX_DEBUG_PORT3)
	REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
#endif

	/* input_data is set in head.S */
	inbuf = input_data;
#else /* CRISv10 */
	/* Need at least a crisv10 to run. */
	compile_rev = 10;

	/* input_data is set in head.S */
	inbuf = input_data;

#ifdef CONFIG_ETRAX_DEBUG_PORT0
	*R_SERIAL0_XOFF = 0;
	*R_SERIAL0_BAUD = 0x99;
	*R_SERIAL0_TR_CTRL = 0x40;
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT1
	*R_SERIAL1_XOFF = 0;
	*R_SERIAL1_BAUD = 0x99;
	*R_SERIAL1_TR_CTRL = 0x40;
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT2
	*R_GEN_CONFIG = 0x08;
	*R_SERIAL2_XOFF = 0;
	*R_SERIAL2_BAUD = 0x99;
	*R_SERIAL2_TR_CTRL = 0x40;
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT3
	*R_GEN_CONFIG = 0x100;
	*R_SERIAL3_XOFF = 0;
	*R_SERIAL3_BAUD = 0x99;
	*R_SERIAL3_TR_CTRL = 0x40;
#endif
#endif

	setup_normal_output_buffer();

	makecrc();

	__asm__ volatile ("move $vr,%0" : "=rm" (revision));
	if (revision < compile_rev) {
#ifdef CONFIG_ETRAX_ARCH_V32
		aputs("You need at least ETRAX FS to run Linux 2.6/crisv32\n");
#else
		aputs("You need an ETRAX 100LX to run linux 2.6/crisv10\n");
#endif
		while(1);
	}

	aputs("Uncompressing Linux...\n");
	gunzip();
	aputs("Done. Now booting the kernel\n");
}
Commit	Line	Data
51533b61 MS	1	/*
	2	* misc.c
	3	*
51533b61 MS	4	* This is a collection of several routines from gzip-1.0.3
	5	* adapted for Linux.
	6	*
	7	* malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
	8	* puts by Nick Holloway 1993, better puts by Martin Mares 1995
49b4ff33	9	* adaptation for Linux/CRIS Axis Communications AB, 1999
51533b61 MS	10	*
	11	*/
	12
	13	/* where the piggybacked kernel image expects itself to live.
	14	* it is the same address we use when we network load an uncompressed
	15	* image into DRAM, and it is the address the kernel is linked to live
	16	* at by vmlinux.lds.S
	17	*/
	18
	19	#define KERNEL_LOAD_ADR 0x40004000
	20
51533b61	21	#include <linux/types.h>
66ab3a74 JN	22
66ab3a74 JN	23	#ifdef CONFIG_ETRAX_ARCH_V32
a5d204bf JN	24	#include <hwregs/reg_rdwr.h>
	25	#include <hwregs/reg_map.h>
	26	#include <hwregs/ser_defs.h>
	27	#include <hwregs/pinmux_defs.h>
	28	#ifdef CONFIG_CRIS_MACH_ARTPEC3
	29	#include <hwregs/clkgen_defs.h>
	30	#endif
66ab3a74 JN	31	#else
	32	#include <arch/svinto.h>
	33	#endif
51533b61 MS	34
	35	/*
	36	* gzip declarations
	37	*/
	38
	39	#define OF(args) args
	40	#define STATIC static
	41
66ab3a74 JN	42	void memset(void s, int c, size_t n);
66ab3a74 JN	43	void memcpy(void __dest, __const void *__src, size_t __n);
51533b61	44
66ab3a74	45	#define memzero(s, n) memset((s), 0, (n))
51533b61 MS	46
	47	typedef unsigned char uch;
	48	typedef unsigned short ush;
	49	typedef unsigned long ulg;
	50
	51	#define WSIZE 0x8000 /* Window size must be at least 32k, */
	52	/* and a power of two */
	53
	54	static uch inbuf; / input buffer */
	55	static uch window[WSIZE]; /* Sliding window buffer */
	56
	57	unsigned inptr = 0; /* index of next byte to be processed in inbuf
	58	* After decompression it will contain the
	59	* compressed size, and head.S will read it.
	60	*/
	61
	62	static unsigned outcnt = 0; /* bytes in output buffer */
	63
	64	/* gzip flag byte */
	65	#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
	66	#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
	67	#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
	68	#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
	69	#define COMMENT 0x10 /* bit 4 set: file comment present */
	70	#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
	71	#define RESERVED 0xC0 /* bit 6,7: reserved */
	72
66ab3a74	73	#define get_byte() (inbuf[inptr++])
51533b61 MS	74
	75	/* Diagnostic functions */
	76	#ifdef DEBUG
66ab3a74 JN	77	# define Assert(cond, msg) do { \
	78	if (!(cond)) \
	79	error(msg); \
	80	} while (0)
51533b61	81	# define Trace(x) fprintf x
66ab3a74 JN	82	# define Tracev(x) do { \
	83	if (verbose) \
	84	fprintf x; \
	85	} while (0)
	86	# define Tracevv(x) do { \
	87	if (verbose > 1) \
	88	fprintf x; \
	89	} while (0)
	90	# define Tracec(c, x) do { \
	91	if (verbose && (c)) \
	92	fprintf x; \
	93	} while (0)
	94	# define Tracecv(c, x) do { \
	95	if (verbose > 1 && (c)) \
	96	fprintf x; \
	97	} while (0)
51533b61	98	#else
66ab3a74	99	# define Assert(cond, msg)
51533b61 MS	100	# define Trace(x)
	101	# define Tracev(x)
	102	# define Tracevv(x)
66ab3a74 JN	103	# define Tracec(c, x)
66ab3a74 JN	104	# define Tracecv(c, x)
51533b61 MS	105	#endif
51533b61 MS	106
51533b61 MS	107	static void flush_window(void);
51533b61 MS	108	static void error(char *m);
76fdf67b	109	static void aputs(const char *s);
51533b61 MS	110
	111	extern char input_data; / lives in head.S */
	112
2d6ffcca	113	static long bytes_out;
51533b61	114	static uch *output_data;
2d6ffcca	115	static unsigned long output_ptr;
51533b61	116
51533b61 MS	117	/* the "heap" is put directly after the BSS ends, at end */
	118
	119	extern int _end;
	120	static long free_mem_ptr = (long)&_end;
2d6ffcca	121	static long free_mem_end_ptr;
51533b61 MS	122
	123	#include "../../../../../lib/inflate.c"
	124
51533b61 MS	125	/* decompressor info and error messages to serial console */
51533b61 MS	126
66ab3a74 JN	127	#ifdef CONFIG_ETRAX_ARCH_V32
66ab3a74 JN	128	static inline void serout(const char *s, reg_scope_instances regi_ser)
51533b61 MS	129	{
	130	reg_ser_rs_stat_din rs;
	131	reg_ser_rw_dout dout = {.data = *s};
	132
	133	do {
	134	rs = REG_RD(ser, regi_ser, rs_stat_din);
	135	}
49b4ff33	136	while (!rs.tr_rdy);/* Wait for transceiver. */
51533b61 MS	137
	138	REG_WR(ser, regi_ser, rw_dout, dout);
	139	}
76fdf67b JN	140	#define SEROUT(S, N) \
	141	do { \
	142	serout(S, regi_ser ## N); \
	143	s++; \
	144	} while (0)
	145	#else
	146	#define SEROUT(S, N) do { \
	147	while (!(*R_SERIAL ## N ## _STATUS & (1 << 5))) \
	148	; \
	149	R_SERIAL ## N ## _TR_DATA = s++; \
	150	} while (0)
66ab3a74	151	#endif
51533b61	152
76fdf67b	153	static void aputs(const char *s)
51533b61 MS	154	{
	155	#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
	156	while (*s) {
	157	#ifdef CONFIG_ETRAX_DEBUG_PORT0
76fdf67b	158	SEROUT(s, 0);
51533b61 MS	159	#endif
51533b61 MS	160	#ifdef CONFIG_ETRAX_DEBUG_PORT1
76fdf67b	161	SEROUT(s, 1);
51533b61 MS	162	#endif
51533b61 MS	163	#ifdef CONFIG_ETRAX_DEBUG_PORT2
76fdf67b	164	SEROUT(s, 2);
51533b61 MS	165	#endif
51533b61 MS	166	#ifdef CONFIG_ETRAX_DEBUG_PORT3
76fdf67b	167	SEROUT(s, 3);
66ab3a74	168	#endif
51533b61	169	}
76fdf67b	170	#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */
51533b61 MS	171	}
51533b61 MS	172
66ab3a74	173	void memset(void s, int c, size_t n)
51533b61 MS	174	{
	175	int i;
	176	char ss = (char)s;
	177
	178	for (i=0;i<n;i++) ss[i] = c;
a5d204bf JN	179
a5d204bf JN	180	return s;
51533b61 MS	181	}
51533b61 MS	182
66ab3a74	183	void memcpy(void __dest, __const void *__src, size_t __n)
51533b61 MS	184	{
	185	int i;
	186	char d = (char )__dest, s = (char )__src;
	187
66ab3a74 JN	188	for (i = 0; i < __n; i++)
66ab3a74 JN	189	d[i] = s[i];
a5d204bf JN	190
a5d204bf JN	191	return __dest;
51533b61 MS	192	}
	193
	194	/* ===========================================================================
	195	* Write the output window window[0..outcnt-1] and update crc and bytes_out.
	196	* (Used for the decompressed data only.)
	197	*/
	198
66ab3a74	199	static void flush_window(void)
51533b61	200	{
66ab3a74 JN	201	ulg c = crc; /* temporary variable */
	202	unsigned n;
	203	uch in, out, ch;
	204
	205	in = window;
	206	out = &output_data[output_ptr];
	207	for (n = 0; n < outcnt; n++) {
	208	ch = out = in;
	209	out++;
	210	in++;
	211	c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
	212	}
	213	crc = c;
	214	bytes_out += (ulg)outcnt;
	215	output_ptr += (ulg)outcnt;
	216	outcnt = 0;
51533b61 MS	217	}
51533b61 MS	218
66ab3a74	219	static void error(char *x)
51533b61	220	{
76fdf67b JN	221	aputs("\n\n");
	222	aputs(x);
	223	aputs("\n\n -- System halted\n");
51533b61 MS	224
	225	while(1); /* Halt */
	226	}
	227
66ab3a74	228	void setup_normal_output_buffer(void)
51533b61 MS	229	{
	230	output_data = (char *)KERNEL_LOAD_ADR;
	231	}
	232
66ab3a74 JN	233	#ifdef CONFIG_ETRAX_ARCH_V32
66ab3a74 JN	234	static inline void serial_setup(reg_scope_instances regi_ser)
51533b61 MS	235	{
	236	reg_ser_rw_xoff xoff;
	237	reg_ser_rw_tr_ctrl tr_ctrl;
	238	reg_ser_rw_rec_ctrl rec_ctrl;
	239	reg_ser_rw_tr_baud_div tr_baud;
	240	reg_ser_rw_rec_baud_div rec_baud;
	241
	242	/* Turn off XOFF. */
	243	xoff = REG_RD(ser, regi_ser, rw_xoff);
	244
	245	xoff.chr = 0;
	246	xoff.automatic = regk_ser_no;
	247
	248	REG_WR(ser, regi_ser, rw_xoff, xoff);
	249
	250	/* Set baudrate and stopbits. */
	251	tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
	252	rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
	253	tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
	254	rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
	255
	256	tr_ctrl.stop_bits = 1; /* 2 stop bits. */
a5d204bf JN	257	tr_ctrl.en = 1; /* enable transmitter */
a5d204bf JN	258	rec_ctrl.en = 1; /* enabler receiver */
51533b61 MS	259
51533b61 MS	260	/*
a5d204bf JN	261	* The baudrate setup used to be a bit fishy, but now transmitter and
	262	* receiver are both set to the intended baud rate, 115200.
	263	* The magic value is 29.493 MHz.
51533b61 MS	264	*/
	265	tr_ctrl.base_freq = regk_ser_f29_493;
	266	rec_ctrl.base_freq = regk_ser_f29_493;
a5d204bf	267	tr_baud.div = (29493000 / 8) / 115200;
51533b61 MS	268	rec_baud.div = (29493000 / 8) / 115200;
	269
	270	REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
	271	REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
	272	REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
	273	REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
	274	}
66ab3a74	275	#endif
51533b61	276
66ab3a74	277	void decompress_kernel(void)
51533b61 MS	278	{
51533b61 MS	279	char revision;
66ab3a74	280	char compile_rev;
51533b61	281
66ab3a74 JN	282	#ifdef CONFIG_ETRAX_ARCH_V32
	283	/* Need at least a CRISv32 to run. */
	284	compile_rev = 32;
a5d204bf JN	285	#if defined(CONFIG_ETRAX_DEBUG_PORT1) \|\| \
	286	defined(CONFIG_ETRAX_DEBUG_PORT2) \|\| \
	287	defined(CONFIG_ETRAX_DEBUG_PORT3)
	288	reg_pinmux_rw_hwprot hwprot;
	289
	290	#ifdef CONFIG_CRIS_MACH_ARTPEC3
	291	reg_clkgen_rw_clk_ctrl clk_ctrl;
	292
	293	/* Enable corresponding clock region when serial 1..3 selected */
	294
	295	clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
	296	clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
	297	REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
	298	#endif
	299
	300	/* pinmux setup for ports 1..3 */
	301	hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
	302	#endif
51533b61	303
66ab3a74	304
51533b61 MS	305	#ifdef CONFIG_ETRAX_DEBUG_PORT0
	306	serial_setup(regi_ser0);
	307	#endif
	308	#ifdef CONFIG_ETRAX_DEBUG_PORT1
a5d204bf	309	hwprot.ser1 = regk_pinmux_yes;
51533b61 MS	310	serial_setup(regi_ser1);
	311	#endif
	312	#ifdef CONFIG_ETRAX_DEBUG_PORT2
a5d204bf	313	hwprot.ser2 = regk_pinmux_yes;
51533b61 MS	314	serial_setup(regi_ser2);
	315	#endif
	316	#ifdef CONFIG_ETRAX_DEBUG_PORT3
a5d204bf	317	hwprot.ser3 = regk_pinmux_yes;
51533b61 MS	318	serial_setup(regi_ser3);
51533b61 MS	319	#endif
a5d204bf JN	320	#if defined(CONFIG_ETRAX_DEBUG_PORT1) \|\| \
	321	defined(CONFIG_ETRAX_DEBUG_PORT2) \|\| \
	322	defined(CONFIG_ETRAX_DEBUG_PORT3)
	323	REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
	324	#endif
	325
	326	/* input_data is set in head.S */
	327	inbuf = input_data;
66ab3a74 JN	328	#else /* CRISv10 */
	329	/* Need at least a crisv10 to run. */
	330	compile_rev = 10;
	331
	332	/* input_data is set in head.S */
	333	inbuf = input_data;
	334
	335	#ifdef CONFIG_ETRAX_DEBUG_PORT0
	336	*R_SERIAL0_XOFF = 0;
	337	*R_SERIAL0_BAUD = 0x99;
	338	*R_SERIAL0_TR_CTRL = 0x40;
	339	#endif
	340	#ifdef CONFIG_ETRAX_DEBUG_PORT1
	341	*R_SERIAL1_XOFF = 0;
	342	*R_SERIAL1_BAUD = 0x99;
	343	*R_SERIAL1_TR_CTRL = 0x40;
	344	#endif
	345	#ifdef CONFIG_ETRAX_DEBUG_PORT2
	346	*R_GEN_CONFIG = 0x08;
	347	*R_SERIAL2_XOFF = 0;
	348	*R_SERIAL2_BAUD = 0x99;
	349	*R_SERIAL2_TR_CTRL = 0x40;
	350	#endif
	351	#ifdef CONFIG_ETRAX_DEBUG_PORT3
	352	*R_GEN_CONFIG = 0x100;
	353	*R_SERIAL3_XOFF = 0;
	354	*R_SERIAL3_BAUD = 0x99;
	355	*R_SERIAL3_TR_CTRL = 0x40;
	356	#endif
	357	#endif
51533b61 MS	358
	359	setup_normal_output_buffer();
	360
	361	makecrc();
	362
	363	__asm__ volatile ("move $vr,%0" : "=rm" (revision));
66ab3a74 JN	364	if (revision < compile_rev) {
66ab3a74 JN	365	#ifdef CONFIG_ETRAX_ARCH_V32
76fdf67b	366	aputs("You need at least ETRAX FS to run Linux 2.6/crisv32\n");
66ab3a74	367	#else
76fdf67b	368	aputs("You need an ETRAX 100LX to run linux 2.6/crisv10\n");
66ab3a74	369	#endif
51533b61 MS	370	while(1);
	371	}
	372
76fdf67b	373	aputs("Uncompressing Linux...\n");
51533b61	374	gunzip();
76fdf67b	375	aputs("Done. Now booting the kernel\n");
51533b61	376	}