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24a07a12 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
24a07a12 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
24a07a12
RH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
de8c43f2 13#include <linux/mtd/physmap.h>
24a07a12
RH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
1f83b8f1 16#include <linux/irq.h>
81d9c7f2 17#include <linux/i2c.h>
24a07a12 18#include <linux/interrupt.h>
c6c4d7bb 19#include <linux/usb/musb.h>
24a07a12 20#include <asm/bfin5xx_spi.h>
c6c4d7bb
BW		 21#include <asm/dma.h>
22#include <asm/gpio.h>
23#include <asm/nand.h>
14b03204 24#include <asm/dpmc.h>
5d448dd5 25#include <asm/portmux.h>
501674a5 26#include <asm/bfin_sdh.h>
639f6571 27#include <mach/bf54x_keys.h>
c6c4d7bb
BW		 28#include <linux/input.h>
29#include <linux/spi/ad7877.h>
24a07a12
RH		 30
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
fe85cad2 34const char bfin_board_name[] = "ADI BF548-EZKIT";
24a07a12
RH		 35
36/*
37 * Driver needs to know address, irq and flag pin.
38 */
39
0a6304a9 40#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 41#include <linux/usb/isp1760.h>
42static struct resource bfin_isp1760_resources[] = {
0a6304a9 43 [0] = {
0a6304a9
MH		 44 .start = 0x2C0C0000,
45 .end = 0x2C0C0000 + 0xfffff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = IRQ_PG7,
50 .end = IRQ_PG7,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
3f375690
MH		 55static struct isp1760_platform_data isp1760_priv = {
56 .is_isp1761 = 0,
3f375690
MH		 57 .bus_width_16 = 1,
58 .port1_otg = 0,
59 .analog_oc = 0,
60 .dack_polarity_high = 0,
61 .dreq_polarity_high = 0,
0a6304a9
MH		 62};
63
3f375690 64static struct platform_device bfin_isp1760_device = {
c6feb768 65 .name = "isp1760",
3f375690
MH		 66 .id = 0,
67 .dev = {
68 .platform_data = &isp1760_priv,
69 },
70 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
71 .resource = bfin_isp1760_resources,
0a6304a9 72};
0a6304a9
MH		 73#endif
74
c6c4d7bb
BW		 75#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
76
639f6571 77#include <mach/bf54x-lq043.h>
c6c4d7bb
BW		 78
79static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
0e101ec1
SP		 80 .width = 95,
81 .height = 54,
c6c4d7bb
BW		 82 .xres = {480, 480, 480},
83 .yres = {272, 272, 272},
84 .bpp = {24, 24, 24},
85 .disp = GPIO_PE3,
86};
87
88static struct resource bf54x_lq043_resources[] = {
89 {
90 .start = IRQ_EPPI0_ERR,
91 .end = IRQ_EPPI0_ERR,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device bf54x_lq043_device = {
97 .name = "bf54x-lq043",
98 .id = -1,
99 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
100 .resource = bf54x_lq043_resources,
101 .dev = {
102 .platform_data = &bf54x_lq043_data,
103 },
104};
105#endif
106
107#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
8f740ef3 108static const unsigned int bf548_keymap[] = {
c6c4d7bb
BW		 109 KEYVAL(0, 0, KEY_ENTER),
110 KEYVAL(0, 1, KEY_HELP),
111 KEYVAL(0, 2, KEY_0),
112 KEYVAL(0, 3, KEY_BACKSPACE),
113 KEYVAL(1, 0, KEY_TAB),
114 KEYVAL(1, 1, KEY_9),
115 KEYVAL(1, 2, KEY_8),
116 KEYVAL(1, 3, KEY_7),
117 KEYVAL(2, 0, KEY_DOWN),
118 KEYVAL(2, 1, KEY_6),
119 KEYVAL(2, 2, KEY_5),
120 KEYVAL(2, 3, KEY_4),
121 KEYVAL(3, 0, KEY_UP),
122 KEYVAL(3, 1, KEY_3),
123 KEYVAL(3, 2, KEY_2),
124 KEYVAL(3, 3, KEY_1),
125};
126
127static struct bfin_kpad_platform_data bf54x_kpad_data = {
128 .rows = 4,
129 .cols = 4,
8f740ef3
MH		 130 .keymap = bf548_keymap,
131 .keymapsize = ARRAY_SIZE(bf548_keymap),
c6c4d7bb
BW		 132 .repeat = 0,
133 .debounce_time = 5000, /* ns (5ms) */
134 .coldrive_time = 1000, /* ns (1ms) */
135 .keyup_test_interval = 50, /* ms (50ms) */
136};
137
138static struct resource bf54x_kpad_resources[] = {
139 {
140 .start = IRQ_KEY,
141 .end = IRQ_KEY,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device bf54x_kpad_device = {
147 .name = "bf54x-keys",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
150 .resource = bf54x_kpad_resources,
151 .dev = {
152 .platform_data = &bf54x_kpad_data,
153 },
154};
155#endif
156
adfc0467 157#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 158#include <asm/bfin_rotary.h>
159
160static struct bfin_rotary_platform_data bfin_rotary_data = {
161 /*.rotary_up_key = KEY_UP,*/
162 /*.rotary_down_key = KEY_DOWN,*/
163 .rotary_rel_code = REL_WHEEL,
164 .rotary_button_key = KEY_ENTER,
165 .debounce = 10, /* 0..17 */
166 .mode = ROT_QUAD_ENC | ROT_DEBE,
167};
168
169static struct resource bfin_rotary_resources[] = {
170 {
171 .start = IRQ_CNT,
172 .end = IRQ_CNT,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static struct platform_device bfin_rotary_device = {
178 .name = "bfin-rotary",
179 .id = -1,
180 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
181 .resource = bfin_rotary_resources,
182 .dev = {
183 .platform_data = &bfin_rotary_data,
184 },
185};
186#endif
187
ffc4d8bc 188#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 189#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 190static const struct adxl34x_platform_data adxl34x_info = {
191 .x_axis_offset = 0,
192 .y_axis_offset = 0,
193 .z_axis_offset = 0,
194 .tap_threshold = 0x31,
195 .tap_duration = 0x10,
196 .tap_latency = 0x60,
197 .tap_window = 0xF0,
198 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
199 .act_axis_control = 0xFF,
200 .activity_threshold = 5,
201 .inactivity_threshold = 3,
202 .inactivity_time = 4,
203 .free_fall_threshold = 0x7,
204 .free_fall_time = 0x20,
205 .data_rate = 0x8,
206 .data_range = ADXL_FULL_RES,
207
208 .ev_type = EV_ABS,
209 .ev_code_x = ABS_X, /* EV_REL */
210 .ev_code_y = ABS_Y, /* EV_REL */
211 .ev_code_z = ABS_Z, /* EV_REL */
212
57af8edf 213 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 214
215/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
216/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
217 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
218 .fifo_mode = ADXL_FIFO_STREAM,
5db4036b
MH		 219 .orientation_enable = ADXL_EN_ORIENTATION_3D,
220 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
221 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
222 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
223 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
ffc4d8bc
MH		 224};
225#endif
226
24a07a12
RH		 227#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
228static struct platform_device rtc_device = {
229 .name = "rtc-bfin",
230 .id = -1,
231};
232#endif
233
234#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
235static struct resource bfin_uart_resources[] = {
236#ifdef CONFIG_SERIAL_BFIN_UART0
237 {
238 .start = 0xFFC00400,
239 .end = 0xFFC004FF,
240 .flags = IORESOURCE_MEM,
241 },
242#endif
243#ifdef CONFIG_SERIAL_BFIN_UART1
244 {
245 .start = 0xFFC02000,
246 .end = 0xFFC020FF,
247 .flags = IORESOURCE_MEM,
248 },
249#endif
250#ifdef CONFIG_SERIAL_BFIN_UART2
251 {
252 .start = 0xFFC02100,
253 .end = 0xFFC021FF,
254 .flags = IORESOURCE_MEM,
255 },
256#endif
257#ifdef CONFIG_SERIAL_BFIN_UART3
258 {
259 .start = 0xFFC03100,
260 .end = 0xFFC031FF,
cc2e16bd 261 .flags = IORESOURCE_MEM,
24a07a12
RH		 262 },
263#endif
264};
265
266static struct platform_device bfin_uart_device = {
267 .name = "bfin-uart",
268 .id = 1,
269 .num_resources = ARRAY_SIZE(bfin_uart_resources),
270 .resource = bfin_uart_resources,
271};
272#endif
273
5be36d22 274#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 275#ifdef CONFIG_BFIN_SIR0
42bd8bcb 276static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 277 {
278 .start = 0xFFC00400,
279 .end = 0xFFC004FF,
280 .flags = IORESOURCE_MEM,
281 },
42bd8bcb
GY		 282 {
283 .start = IRQ_UART0_RX,
284 .end = IRQ_UART0_RX+1,
285 .flags = IORESOURCE_IRQ,
286 },
287 {
288 .start = CH_UART0_RX,
289 .end = CH_UART0_RX+1,
290 .flags = IORESOURCE_DMA,
291 },
292};
293static struct platform_device bfin_sir0_device = {
294 .name = "bfin_sir",
295 .id = 0,
296 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
297 .resource = bfin_sir0_resources,
298};
5be36d22
GY		 299#endif
300#ifdef CONFIG_BFIN_SIR1
42bd8bcb 301static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 302 {
303 .start = 0xFFC02000,
304 .end = 0xFFC020FF,
305 .flags = IORESOURCE_MEM,
306 },
42bd8bcb
GY		 307 {
308 .start = IRQ_UART1_RX,
309 .end = IRQ_UART1_RX+1,
310 .flags = IORESOURCE_IRQ,
311 },
312 {
313 .start = CH_UART1_RX,
314 .end = CH_UART1_RX+1,
315 .flags = IORESOURCE_DMA,
316 },
317};
318static struct platform_device bfin_sir1_device = {
319 .name = "bfin_sir",
320 .id = 1,
321 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
322 .resource = bfin_sir1_resources,
323};
5be36d22
GY		 324#endif
325#ifdef CONFIG_BFIN_SIR2
42bd8bcb 326static struct resource bfin_sir2_resources[] = {
5be36d22
GY		 327 {
328 .start = 0xFFC02100,
329 .end = 0xFFC021FF,
330 .flags = IORESOURCE_MEM,
331 },
42bd8bcb
GY		 332 {
333 .start = IRQ_UART2_RX,
334 .end = IRQ_UART2_RX+1,
335 .flags = IORESOURCE_IRQ,
336 },
337 {
338 .start = CH_UART2_RX,
339 .end = CH_UART2_RX+1,
340 .flags = IORESOURCE_DMA,
341 },
342};
343static struct platform_device bfin_sir2_device = {
344 .name = "bfin_sir",
345 .id = 2,
346 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
347 .resource = bfin_sir2_resources,
348};
5be36d22
GY		 349#endif
350#ifdef CONFIG_BFIN_SIR3
42bd8bcb 351static struct resource bfin_sir3_resources[] = {
5be36d22
GY		 352 {
353 .start = 0xFFC03100,
354 .end = 0xFFC031FF,
355 .flags = IORESOURCE_MEM,
356 },
42bd8bcb
GY		 357 {
358 .start = IRQ_UART3_RX,
359 .end = IRQ_UART3_RX+1,
360 .flags = IORESOURCE_IRQ,
361 },
362 {
363 .start = CH_UART3_RX,
364 .end = CH_UART3_RX+1,
365 .flags = IORESOURCE_DMA,
366 },
5be36d22 367};
42bd8bcb 368static struct platform_device bfin_sir3_device = {
5be36d22 369 .name = "bfin_sir",
42bd8bcb
GY		 370 .id = 3,
371 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
372 .resource = bfin_sir3_resources,
5be36d22
GY		 373};
374#endif
42bd8bcb 375#endif
5be36d22 376
c6c4d7bb 377#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
7a8b71db
MF		 378#include <linux/smsc911x.h>
379
c6c4d7bb
BW		 380static struct resource smsc911x_resources[] = {
381 {
382 .name = "smsc911x-memory",
383 .start = 0x24000000,
384 .end = 0x24000000 + 0xFF,
385 .flags = IORESOURCE_MEM,
386 },
387 {
388 .start = IRQ_PE8,
389 .end = IRQ_PE8,
390 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
391 },
392};
7a8b71db
MF		 393
394static struct smsc911x_platform_config smsc911x_config = {
395 .flags = SMSC911X_USE_32BIT,
396 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
397 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
398 .phy_interface = PHY_INTERFACE_MODE_MII,
399};
400
c6c4d7bb
BW		 401static struct platform_device smsc911x_device = {
402 .name = "smsc911x",
403 .id = 0,
404 .num_resources = ARRAY_SIZE(smsc911x_resources),
405 .resource = smsc911x_resources,
7a8b71db
MF		 406 .dev = {
407 .platform_data = &smsc911x_config,
408 },
c6c4d7bb
BW		 409};
410#endif
411
c6c4d7bb
BW		 412#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
413static struct resource musb_resources[] = {
414 [0] = {
415 .start = 0xFFC03C00,
416 .end = 0xFFC040FF,
417 .flags = IORESOURCE_MEM,
418 },
419 [1] = { /* general IRQ */
420 .start = IRQ_USB_INT0,
421 .end = IRQ_USB_INT0,
422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
423 },
424 [2] = { /* DMA IRQ */
425 .start = IRQ_USB_DMA,
426 .end = IRQ_USB_DMA,
427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
428 },
429};
430
50041acb
BW		 431static struct musb_hdrc_config musb_config = {
432 .multipoint = 0,
433 .dyn_fifo = 0,
434 .soft_con = 1,
435 .dma = 1,
fea05dac
BW		 436 .num_eps = 8,
437 .dma_channels = 8,
50041acb
BW		 438 .gpio_vrsel = GPIO_PE7,
439};
440
c6c4d7bb 441static struct musb_hdrc_platform_data musb_plat = {
2935077e 442#if defined(CONFIG_USB_MUSB_OTG)
c6c4d7bb 443 .mode = MUSB_OTG,
2935077e 444#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
c6c4d7bb 445 .mode = MUSB_HOST,
2935077e 446#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
c6c4d7bb
BW		 447 .mode = MUSB_PERIPHERAL,
448#endif
50041acb 449 .config = &musb_config,
c6c4d7bb
BW		 450};
451
452static u64 musb_dmamask = ~(u32)0;
453
454static struct platform_device musb_device = {
455 .name = "musb_hdrc",
456 .id = 0,
457 .dev = {
458 .dma_mask = &musb_dmamask,
459 .coherent_dma_mask = 0xffffffff,
460 .platform_data = &musb_plat,
461 },
462 .num_resources = ARRAY_SIZE(musb_resources),
463 .resource = musb_resources,
464};
465#endif
466
706a01b1
BS		 467#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
468unsigned short bfin_can_peripherals[] = {
469 P_CAN0_RX, P_CAN0_TX, 0
470};
471
472static struct resource bfin_can_resources[] = {
473 {
474 .start = 0xFFC02A00,
475 .end = 0xFFC02FFF,
476 .flags = IORESOURCE_MEM,
477 },
478 {
479 .start = IRQ_CAN0_RX,
480 .end = IRQ_CAN0_RX,
481 .flags = IORESOURCE_IRQ,
482 },
483 {
484 .start = IRQ_CAN0_TX,
485 .end = IRQ_CAN0_TX,
486 .flags = IORESOURCE_IRQ,
487 },
488 {
489 .start = IRQ_CAN0_ERROR,
490 .end = IRQ_CAN0_ERROR,
491 .flags = IORESOURCE_IRQ,
492 },
493};
494
495static struct platform_device bfin_can_device = {
496 .name = "bfin_can",
497 .num_resources = ARRAY_SIZE(bfin_can_resources),
498 .resource = bfin_can_resources,
499 .dev = {
500 .platform_data = &bfin_can_peripherals, /* Passed to driver */
501 },
502};
503#endif
504
c6c4d7bb
BW		 505#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
506static struct resource bfin_atapi_resources[] = {
507 {
508 .start = 0xFFC03800,
509 .end = 0xFFC0386F,
510 .flags = IORESOURCE_MEM,
511 },
512 {
513 .start = IRQ_ATAPI_ERR,
514 .end = IRQ_ATAPI_ERR,
515 .flags = IORESOURCE_IRQ,
516 },
517};
518
519static struct platform_device bfin_atapi_device = {
520 .name = "pata-bf54x",
521 .id = -1,
522 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
523 .resource = bfin_atapi_resources,
524};
525#endif
526
527#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
528static struct mtd_partition partition_info[] = {
529 {
aa582977 530 .name = "linux kernel(nand)",
c6c4d7bb 531 .offset = 0,
f4585a08 532 .size = 4 * 1024 * 1024,
c6c4d7bb
BW		 533 },
534 {
aa582977 535 .name = "file system(nand)",
edf05641
MF		 536 .offset = MTDPART_OFS_APPEND,
537 .size = MTDPART_SIZ_FULL,
c6c4d7bb
BW		 538 },
539};
540
541static struct bf5xx_nand_platform bf5xx_nand_platform = {
542 .page_size = NFC_PG_SIZE_256,
543 .data_width = NFC_NWIDTH_8,
544 .partitions = partition_info,
545 .nr_partitions = ARRAY_SIZE(partition_info),
546 .rd_dly = 3,
547 .wr_dly = 3,
548};
549
550static struct resource bf5xx_nand_resources[] = {
551 {
552 .start = 0xFFC03B00,
553 .end = 0xFFC03B4F,
554 .flags = IORESOURCE_MEM,
555 },
556 {
557 .start = CH_NFC,
558 .end = CH_NFC,
559 .flags = IORESOURCE_IRQ,
560 },
561};
562
563static struct platform_device bf5xx_nand_device = {
564 .name = "bf5xx-nand",
565 .id = 0,
566 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
567 .resource = bf5xx_nand_resources,
568 .dev = {
569 .platform_data = &bf5xx_nand_platform,
570 },
571};
572#endif
573
3d7e6cf8 574#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
501674a5
CC		 575
576static struct bfin_sd_host bfin_sdh_data = {
577 .dma_chan = CH_SDH,
578 .irq_int0 = IRQ_SDH_MASK0,
579 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
580};
581
c6c4d7bb
BW		 582static struct platform_device bf54x_sdh_device = {
583 .name = "bfin-sdh",
584 .id = 0,
501674a5
CC		 585 .dev = {
586 .platform_data = &bfin_sdh_data,
587 },
c6c4d7bb
BW		 588};
589#endif
590
793dc27b 591#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 592static struct mtd_partition ezkit_partitions[] = {
593 {
aa582977 594 .name = "bootloader(nor)",
edf05641 595 .size = 0x40000,
de8c43f2
MF		 596 .offset = 0,
597 }, {
aa582977 598 .name = "linux kernel(nor)",
664d0403 599 .size = 0x400000,
de8c43f2
MF		 600 .offset = MTDPART_OFS_APPEND,
601 }, {
aa582977 602 .name = "file system(nor)",
de8c43f2
MF		 603 .size = MTDPART_SIZ_FULL,
604 .offset = MTDPART_OFS_APPEND,
605 }
606};
607
608static struct physmap_flash_data ezkit_flash_data = {
609 .width = 2,
610 .parts = ezkit_partitions,
611 .nr_parts = ARRAY_SIZE(ezkit_partitions),
612};
613
614static struct resource ezkit_flash_resource = {
615 .start = 0x20000000,
664d0403 616 .end = 0x21ffffff,
de8c43f2
MF		 617 .flags = IORESOURCE_MEM,
618};
619
620static struct platform_device ezkit_flash_device = {
621 .name = "physmap-flash",
622 .id = 0,
623 .dev = {
624 .platform_data = &ezkit_flash_data,
625 },
626 .num_resources = 1,
627 .resource = &ezkit_flash_resource,
628};
793dc27b 629#endif
de8c43f2 630
c6c4d7bb
BW		 631#if defined(CONFIG_MTD_M25P80) \
632 || defined(CONFIG_MTD_M25P80_MODULE)
633/* SPI flash chip (m25p16) */
634static struct mtd_partition bfin_spi_flash_partitions[] = {
635 {
aa582977 636 .name = "bootloader(spi)",
c6c4d7bb
BW		 637 .size = 0x00040000,
638 .offset = 0,
639 .mask_flags = MTD_CAP_ROM
640 }, {
aa582977 641 .name = "linux kernel(spi)",
edf05641
MF		 642 .size = MTDPART_SIZ_FULL,
643 .offset = MTDPART_OFS_APPEND,
c6c4d7bb
BW		 644 }
645};
646
647static struct flash_platform_data bfin_spi_flash_data = {
648 .name = "m25p80",
649 .parts = bfin_spi_flash_partitions,
650 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
651 .type = "m25p16",
652};
653
654static struct bfin5xx_spi_chip spi_flash_chip_info = {
655 .enable_dma = 0, /* use dma transfer with this chip*/
656 .bits_per_word = 8,
c6c4d7bb
BW		 657};
658#endif
659
37fa2421
BS		 660#if defined(CONFIG_SND_BLACKFIN_AD1836) \
661 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
662static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
663 .enable_dma = 0,
664 .bits_per_word = 16,
665};
666#endif
667
c6c4d7bb
BW		 668#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
669static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
c6c4d7bb
BW		 670 .enable_dma = 0,
671 .bits_per_word = 16,
672};
673
674static const struct ad7877_platform_data bfin_ad7877_ts_info = {
675 .model = 7877,
676 .vref_delay_usecs = 50, /* internal, no capacitor */
677 .x_plate_ohms = 419,
678 .y_plate_ohms = 486,
679 .pressure_max = 1000,
680 .pressure_min = 0,
681 .stopacq_polarity = 1,
682 .first_conversion_delay = 3,
683 .acquisition_time = 1,
684 .averaging = 1,
685 .pen_down_acc_interval = 1,
686};
687#endif
688
6e668936
MH		 689#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
690static struct bfin5xx_spi_chip spidev_chip_info = {
691 .enable_dma = 0,
692 .bits_per_word = 8,
693};
694#endif
695
ffc4d8bc
MH		 696#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
697static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
698 .enable_dma = 0, /* use dma transfer with this chip*/
699 .bits_per_word = 8,
ffc4d8bc
MH		 700};
701#endif
702
5bda2723 703static struct spi_board_info bfin_spi_board_info[] __initdata = {
c6c4d7bb
BW		 704#if defined(CONFIG_MTD_M25P80) \
705 || defined(CONFIG_MTD_M25P80_MODULE)
706 {
707 /* the modalias must be the same as spi device driver name */
708 .modalias = "m25p80", /* Name of spi_driver for this device */
709 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
710 .bus_num = 0, /* Framework bus number */
711 .chip_select = 1, /* SPI_SSEL1*/
712 .platform_data = &bfin_spi_flash_data,
713 .controller_data = &spi_flash_chip_info,
714 .mode = SPI_MODE_3,
715 },
716#endif
37fa2421
BS		 717#if defined(CONFIG_SND_BLACKFIN_AD1836) \
718 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
719 {
dac98174 720 .modalias = "ad1836",
37fa2421
BS		 721 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
722 .bus_num = 1,
723 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
724 .controller_data = &ad1836_spi_chip_info,
725 },
726#endif
c6c4d7bb 727#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
ffc4d8bc
MH		 728 {
729 .modalias = "ad7877",
730 .platform_data = &bfin_ad7877_ts_info,
731 .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
732 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
733 .bus_num = 0,
734 .chip_select = 2,
735 .controller_data = &spi_ad7877_chip_info,
736 },
c6c4d7bb 737#endif
6e668936
MH		 738#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
739 {
740 .modalias = "spidev",
741 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
742 .bus_num = 0,
743 .chip_select = 1,
744 .controller_data = &spidev_chip_info,
745 },
746#endif
ffc4d8bc
MH		 747#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
748 {
749 .modalias = "adxl34x",
750 .platform_data = &adxl34x_info,
751 .irq = IRQ_PC5,
752 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
753 .bus_num = 1,
754 .chip_select = 2,
755 .controller_data = &spi_adxl34x_chip_info,
756 .mode = SPI_MODE_3,
757 },
758#endif
c6c4d7bb 759};
5bda2723 760#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb
BW		 761/* SPI (0) */
762static struct resource bfin_spi0_resource[] = {
763 [0] = {
764 .start = SPI0_REGBASE,
765 .end = SPI0_REGBASE + 0xFF,
766 .flags = IORESOURCE_MEM,
767 },
768 [1] = {
769 .start = CH_SPI0,
770 .end = CH_SPI0,
53122693
YL		 771 .flags = IORESOURCE_DMA,
772 },
773 [2] = {
774 .start = IRQ_SPI0,
775 .end = IRQ_SPI0,
c6c4d7bb
BW		 776 .flags = IORESOURCE_IRQ,
777 }
778};
779
780/* SPI (1) */
781static struct resource bfin_spi1_resource[] = {
782 [0] = {
783 .start = SPI1_REGBASE,
784 .end = SPI1_REGBASE + 0xFF,
785 .flags = IORESOURCE_MEM,
786 },
787 [1] = {
788 .start = CH_SPI1,
789 .end = CH_SPI1,
53122693
YL		 790 .flags = IORESOURCE_DMA,
791 },
792 [2] = {
793 .start = IRQ_SPI1,
794 .end = IRQ_SPI1,
c6c4d7bb
BW		 795 .flags = IORESOURCE_IRQ,
796 }
797};
798
799/* SPI controller data */
5d448dd5 800static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
4e4d496e 801 .num_chipselect = 3,
c6c4d7bb 802 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 803 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
c6c4d7bb
BW		 804};
805
806static struct platform_device bf54x_spi_master0 = {
807 .name = "bfin-spi",
808 .id = 0, /* Bus number */
809 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
810 .resource = bfin_spi0_resource,
811 .dev = {
5d448dd5 812 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
c6c4d7bb
BW		 813 },
814};
815
5d448dd5 816static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
4e4d496e 817 .num_chipselect = 3,
5d448dd5
BW		 818 .enable_dma = 1, /* master has the ability to do dma transfer */
819 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
820};
821
c6c4d7bb
BW		 822static struct platform_device bf54x_spi_master1 = {
823 .name = "bfin-spi",
824 .id = 1, /* Bus number */
825 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
826 .resource = bfin_spi1_resource,
827 .dev = {
5d448dd5 828 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
c6c4d7bb
BW		 829 },
830};
831#endif /* spi master and devices */
832
833#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
834static struct resource bfin_twi0_resource[] = {
835 [0] = {
836 .start = TWI0_REGBASE,
837 .end = TWI0_REGBASE + 0xFF,
838 .flags = IORESOURCE_MEM,
839 },
840 [1] = {
841 .start = IRQ_TWI0,
842 .end = IRQ_TWI0,
843 .flags = IORESOURCE_IRQ,
844 },
845};
846
847static struct platform_device i2c_bfin_twi0_device = {
848 .name = "i2c-bfin-twi",
849 .id = 0,
850 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
851 .resource = bfin_twi0_resource,
852};
853
7160e950 854#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
c6c4d7bb
BW		 855static struct resource bfin_twi1_resource[] = {
856 [0] = {
857 .start = TWI1_REGBASE,
858 .end = TWI1_REGBASE + 0xFF,
859 .flags = IORESOURCE_MEM,
860 },
861 [1] = {
862 .start = IRQ_TWI1,
863 .end = IRQ_TWI1,
864 .flags = IORESOURCE_IRQ,
865 },
866};
867
868static struct platform_device i2c_bfin_twi1_device = {
869 .name = "i2c-bfin-twi",
870 .id = 1,
871 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
872 .resource = bfin_twi1_resource,
873};
874#endif
7160e950 875#endif
c6c4d7bb 876
81d9c7f2
BW		 877static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
878};
879
880#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
881static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
ebd58333 882#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 883 {
884 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 885 },
886#endif
204844eb 887#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 888 {
889 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
81d9c7f2
BW		 890 .irq = 212,
891 },
892#endif
ffc4d8bc
MH		 893#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
894 {
895 I2C_BOARD_INFO("adxl34x", 0x53),
896 .irq = IRQ_PC5,
897 .platform_data = (void *)&adxl34x_info,
898 },
899#endif
81d9c7f2
BW		 900};
901#endif
81d9c7f2 902
2463ef22
MH		 903#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
904#include <linux/gpio_keys.h>
905
906static struct gpio_keys_button bfin_gpio_keys_table[] = {
907 {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
908 {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
909 {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
910 {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
911};
912
913static struct gpio_keys_platform_data bfin_gpio_keys_data = {
914 .buttons = bfin_gpio_keys_table,
915 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
916};
917
918static struct platform_device bfin_device_gpiokeys = {
919 .name = "gpio-keys",
920 .dev = {
921 .platform_data = &bfin_gpio_keys_data,
922 },
923};
924#endif
925
14b03204
MH		 926static const unsigned int cclk_vlev_datasheet[] =
927{
928/*
929 * Internal VLEV BF54XSBBC1533
930 ****temporarily using these values until data sheet is updated
931 */
932 VRPAIR(VLEV_085, 150000000),
933 VRPAIR(VLEV_090, 250000000),
934 VRPAIR(VLEV_110, 276000000),
935 VRPAIR(VLEV_115, 301000000),
936 VRPAIR(VLEV_120, 525000000),
937 VRPAIR(VLEV_125, 550000000),
938 VRPAIR(VLEV_130, 600000000),
939};
940
941static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
942 .tuple_tab = cclk_vlev_datasheet,
943 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
944 .vr_settling_time = 25 /* us */,
945};
946
947static struct platform_device bfin_dpmc = {
948 .name = "bfin dpmc",
949 .dev = {
950 .platform_data = &bfin_dmpc_vreg_data,
951 },
952};
953
24a07a12 954static struct platform_device *ezkit_devices[] __initdata = {
14b03204
MH		 955
956 &bfin_dpmc,
957
24a07a12
RH		 958#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
959 &rtc_device,
960#endif
961
962#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
963 &bfin_uart_device,
964#endif
c6c4d7bb 965
5be36d22 966#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 967#ifdef CONFIG_BFIN_SIR0
968 &bfin_sir0_device,
969#endif
970#ifdef CONFIG_BFIN_SIR1
971 &bfin_sir1_device,
972#endif
973#ifdef CONFIG_BFIN_SIR2
974 &bfin_sir2_device,
975#endif
976#ifdef CONFIG_BFIN_SIR3
977 &bfin_sir3_device,
978#endif
5be36d22
GY		 979#endif
980
c6c4d7bb
BW		 981#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
982 &bf54x_lq043_device,
983#endif
984
985#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
986 &smsc911x_device,
987#endif
988
c6c4d7bb
BW		 989#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
990 &musb_device,
991#endif
992
3f375690
MH		 993#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
994 &bfin_isp1760_device,
995#endif
996
706a01b1
BS		 997#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
998 &bfin_can_device,
999#endif
1000
c6c4d7bb
BW		 1001#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1002 &bfin_atapi_device,
1003#endif
1004
1005#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1006 &bf5xx_nand_device,
1007#endif
1008
3d7e6cf8 1009#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
c6c4d7bb
BW		 1010 &bf54x_sdh_device,
1011#endif
1012
1013#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1014 &bf54x_spi_master0,
d4b1d273 1015 &bf54x_spi_master1,
c6c4d7bb
BW		 1016#endif
1017
1018#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1019 &bf54x_kpad_device,
1020#endif
1021
adfc0467 1022#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1023 &bfin_rotary_device,
1024#endif
1025
c6c4d7bb
BW		 1026#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1027 &i2c_bfin_twi0_device,
7160e950 1028#if !defined(CONFIG_BF542)
c6c4d7bb
BW		 1029 &i2c_bfin_twi1_device,
1030#endif
7160e950 1031#endif
2463ef22
MH		 1032
1033#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1034 &bfin_device_gpiokeys,
1035#endif
cad2ab65 1036
793dc27b 1037#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1038 &ezkit_flash_device,
793dc27b 1039#endif
24a07a12
RH		 1040};
1041
a01d7a76 1042static int __init ezkit_init(void)
24a07a12 1043{
b85d858b 1044 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2 1045
81d9c7f2
BW		 1046 i2c_register_board_info(0, bfin_i2c_board_info0,
1047 ARRAY_SIZE(bfin_i2c_board_info0));
1048#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1049 i2c_register_board_info(1, bfin_i2c_board_info1,
1050 ARRAY_SIZE(bfin_i2c_board_info1));
81d9c7f2
BW		 1051#endif
1052
24a07a12 1053 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
c6c4d7bb 1054
5bda2723 1055 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1056
24a07a12
RH		 1057 return 0;
1058}
1059
a01d7a76 1060arch_initcall(ezkit_init);
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