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Blackfin arch: do not allow people to pass in a diff clkin_hz value
[net-next-2.6.git] / arch / blackfin / mach-bf548 / boards / cm_bf548.c
CommitLineData
db68254f
MH		 1/*
2 * File: arch/blackfin/mach-bf548/boards/cm_bf548.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
2de73e71 35#include <linux/mtd/physmap.h>
db68254f
MH		 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#include <linux/irq.h>
39#include <linux/interrupt.h>
40#include <linux/usb/musb.h>
41#include <asm/bfin5xx_spi.h>
db68254f
MH		 42#include <asm/dma.h>
43#include <asm/gpio.h>
44#include <asm/nand.h>
45#include <asm/portmux.h>
639f6571 46#include <mach/bf54x_keys.h>
14b03204 47#include <asm/dpmc.h>
db68254f
MH		 48#include <linux/input.h>
49#include <linux/spi/ad7877.h>
50
51/*
52 * Name the Board for the /proc/cpuinfo
53 */
54const char bfin_board_name[] = "Bluetechnix CM-BF548";
55
56/*
57 * Driver needs to know address, irq and flag pin.
58 */
59
60#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
61
639f6571 62#include <mach/bf54x-lq043.h>
db68254f
MH		 63
64static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
65 .width = 480,
66 .height = 272,
67 .xres = {480, 480, 480},
68 .yres = {272, 272, 272},
69 .bpp = {24, 24, 24},
70 .disp = GPIO_PE3,
71};
72
73static struct resource bf54x_lq043_resources[] = {
74 {
75 .start = IRQ_EPPI0_ERR,
76 .end = IRQ_EPPI0_ERR,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81static struct platform_device bf54x_lq043_device = {
82 .name = "bf54x-lq043",
83 .id = -1,
84 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
85 .resource = bf54x_lq043_resources,
86 .dev = {
87 .platform_data = &bf54x_lq043_data,
88 },
89};
90#endif
91
92#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
93static unsigned int bf548_keymap[] = {
94 KEYVAL(0, 0, KEY_ENTER),
95 KEYVAL(0, 1, KEY_HELP),
96 KEYVAL(0, 2, KEY_0),
97 KEYVAL(0, 3, KEY_BACKSPACE),
98 KEYVAL(1, 0, KEY_TAB),
99 KEYVAL(1, 1, KEY_9),
100 KEYVAL(1, 2, KEY_8),
101 KEYVAL(1, 3, KEY_7),
102 KEYVAL(2, 0, KEY_DOWN),
103 KEYVAL(2, 1, KEY_6),
104 KEYVAL(2, 2, KEY_5),
105 KEYVAL(2, 3, KEY_4),
106 KEYVAL(3, 0, KEY_UP),
107 KEYVAL(3, 1, KEY_3),
108 KEYVAL(3, 2, KEY_2),
109 KEYVAL(3, 3, KEY_1),
110};
111
112static struct bfin_kpad_platform_data bf54x_kpad_data = {
113 .rows = 4,
114 .cols = 4,
115 .keymap = bf548_keymap,
116 .keymapsize = ARRAY_SIZE(bf548_keymap),
117 .repeat = 0,
118 .debounce_time = 5000, /* ns (5ms) */
119 .coldrive_time = 1000, /* ns (1ms) */
120 .keyup_test_interval = 50, /* ms (50ms) */
121};
122
123static struct resource bf54x_kpad_resources[] = {
124 {
125 .start = IRQ_KEY,
126 .end = IRQ_KEY,
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
131static struct platform_device bf54x_kpad_device = {
132 .name = "bf54x-keys",
133 .id = -1,
134 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
135 .resource = bf54x_kpad_resources,
136 .dev = {
137 .platform_data = &bf54x_kpad_data,
138 },
139};
140#endif
141
142#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
143static struct platform_device rtc_device = {
144 .name = "rtc-bfin",
145 .id = -1,
146};
147#endif
148
149#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
150static struct resource bfin_uart_resources[] = {
151#ifdef CONFIG_SERIAL_BFIN_UART0
152 {
153 .start = 0xFFC00400,
154 .end = 0xFFC004FF,
155 .flags = IORESOURCE_MEM,
156 },
157#endif
158#ifdef CONFIG_SERIAL_BFIN_UART1
159 {
160 .start = 0xFFC02000,
161 .end = 0xFFC020FF,
162 .flags = IORESOURCE_MEM,
163 },
164#endif
165#ifdef CONFIG_SERIAL_BFIN_UART2
166 {
167 .start = 0xFFC02100,
168 .end = 0xFFC021FF,
169 .flags = IORESOURCE_MEM,
170 },
171#endif
172#ifdef CONFIG_SERIAL_BFIN_UART3
173 {
174 .start = 0xFFC03100,
175 .end = 0xFFC031FF,
8606801b 176 .flags = IORESOURCE_MEM,
db68254f
MH		 177 },
178#endif
179};
180
181static struct platform_device bfin_uart_device = {
182 .name = "bfin-uart",
183 .id = 1,
184 .num_resources = ARRAY_SIZE(bfin_uart_resources),
185 .resource = bfin_uart_resources,
186};
187#endif
188
5be36d22 189#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 190#ifdef CONFIG_BFIN_SIR0
42bd8bcb 191static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 192 {
193 .start = 0xFFC00400,
194 .end = 0xFFC004FF,
195 .flags = IORESOURCE_MEM,
196 },
42bd8bcb
GY		 197 {
198 .start = IRQ_UART0_RX,
199 .end = IRQ_UART0_RX+1,
200 .flags = IORESOURCE_IRQ,
201 },
202 {
203 .start = CH_UART0_RX,
204 .end = CH_UART0_RX+1,
205 .flags = IORESOURCE_DMA,
206 },
207};
208static struct platform_device bfin_sir0_device = {
209 .name = "bfin_sir",
210 .id = 0,
211 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
212 .resource = bfin_sir0_resources,
213};
5be36d22
GY		 214#endif
215#ifdef CONFIG_BFIN_SIR1
42bd8bcb 216static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 217 {
218 .start = 0xFFC02000,
219 .end = 0xFFC020FF,
220 .flags = IORESOURCE_MEM,
221 },
42bd8bcb
GY		 222 {
223 .start = IRQ_UART1_RX,
224 .end = IRQ_UART1_RX+1,
225 .flags = IORESOURCE_IRQ,
226 },
227 {
228 .start = CH_UART1_RX,
229 .end = CH_UART1_RX+1,
230 .flags = IORESOURCE_DMA,
231 },
232};
233static struct platform_device bfin_sir1_device = {
234 .name = "bfin_sir",
235 .id = 1,
236 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
237 .resource = bfin_sir1_resources,
238};
5be36d22
GY		 239#endif
240#ifdef CONFIG_BFIN_SIR2
42bd8bcb 241static struct resource bfin_sir2_resources[] = {
5be36d22
GY		 242 {
243 .start = 0xFFC02100,
244 .end = 0xFFC021FF,
245 .flags = IORESOURCE_MEM,
246 },
42bd8bcb
GY		 247 {
248 .start = IRQ_UART2_RX,
249 .end = IRQ_UART2_RX+1,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = CH_UART2_RX,
254 .end = CH_UART2_RX+1,
255 .flags = IORESOURCE_DMA,
256 },
257};
258static struct platform_device bfin_sir2_device = {
259 .name = "bfin_sir",
260 .id = 2,
261 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
262 .resource = bfin_sir2_resources,
263};
5be36d22
GY		 264#endif
265#ifdef CONFIG_BFIN_SIR3
42bd8bcb 266static struct resource bfin_sir3_resources[] = {
5be36d22
GY		 267 {
268 .start = 0xFFC03100,
269 .end = 0xFFC031FF,
270 .flags = IORESOURCE_MEM,
271 },
42bd8bcb
GY		 272 {
273 .start = IRQ_UART3_RX,
274 .end = IRQ_UART3_RX+1,
275 .flags = IORESOURCE_IRQ,
276 },
277 {
278 .start = CH_UART3_RX,
279 .end = CH_UART3_RX+1,
280 .flags = IORESOURCE_DMA,
281 },
5be36d22 282};
42bd8bcb 283static struct platform_device bfin_sir3_device = {
5be36d22 284 .name = "bfin_sir",
42bd8bcb
GY		 285 .id = 3,
286 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
287 .resource = bfin_sir3_resources,
5be36d22
GY		 288};
289#endif
42bd8bcb 290#endif
5be36d22 291
db68254f
MH		 292#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
293static struct resource smsc911x_resources[] = {
294 {
295 .name = "smsc911x-memory",
296 .start = 0x24000000,
297 .end = 0x24000000 + 0xFF,
298 .flags = IORESOURCE_MEM,
299 },
300 {
301 .start = IRQ_PE6,
302 .end = IRQ_PE6,
303 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
304 },
305};
306static struct platform_device smsc911x_device = {
307 .name = "smsc911x",
308 .id = 0,
309 .num_resources = ARRAY_SIZE(smsc911x_resources),
310 .resource = smsc911x_resources,
311};
312#endif
313
314#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
315static struct resource musb_resources[] = {
316 [0] = {
317 .start = 0xFFC03C00,
318 .end = 0xFFC040FF,
319 .flags = IORESOURCE_MEM,
320 },
321 [1] = { /* general IRQ */
322 .start = IRQ_USB_INT0,
323 .end = IRQ_USB_INT0,
324 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
325 },
326 [2] = { /* DMA IRQ */
327 .start = IRQ_USB_DMA,
328 .end = IRQ_USB_DMA,
329 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
330 },
331};
332
50041acb
BW		 333static struct musb_hdrc_config musb_config = {
334 .multipoint = 0,
335 .dyn_fifo = 0,
336 .soft_con = 1,
337 .dma = 1,
338 .num_eps = 7,
339 .dma_channels = 7,
340 .gpio_vrsel = GPIO_PH6,
341};
342
db68254f
MH		 343static struct musb_hdrc_platform_data musb_plat = {
344#if defined(CONFIG_USB_MUSB_OTG)
345 .mode = MUSB_OTG,
346#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
347 .mode = MUSB_HOST,
348#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
349 .mode = MUSB_PERIPHERAL,
350#endif
50041acb 351 .config = &musb_config,
db68254f
MH		 352};
353
354static u64 musb_dmamask = ~(u32)0;
355
356static struct platform_device musb_device = {
357 .name = "musb_hdrc",
358 .id = 0,
359 .dev = {
360 .dma_mask = &musb_dmamask,
361 .coherent_dma_mask = 0xffffffff,
362 .platform_data = &musb_plat,
363 },
364 .num_resources = ARRAY_SIZE(musb_resources),
365 .resource = musb_resources,
366};
367#endif
368
c97618d3
MF		 369static struct resource bfin_gpios_resources = {
370 .start = 0,
371 .end = MAX_BLACKFIN_GPIOS - 1,
372 .flags = IORESOURCE_IRQ,
373};
374
375static struct platform_device bfin_gpios_device = {
376 .name = "simple-gpio",
377 .id = -1,
378 .num_resources = 1,
379 .resource = &bfin_gpios_resources,
380};
381
db68254f
MH		 382#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
383static struct resource bfin_atapi_resources[] = {
384 {
385 .start = 0xFFC03800,
386 .end = 0xFFC0386F,
387 .flags = IORESOURCE_MEM,
388 },
389 {
390 .start = IRQ_ATAPI_ERR,
391 .end = IRQ_ATAPI_ERR,
392 .flags = IORESOURCE_IRQ,
393 },
394};
395
396static struct platform_device bfin_atapi_device = {
397 .name = "pata-bf54x",
398 .id = -1,
399 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
400 .resource = bfin_atapi_resources,
401};
402#endif
403
404#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
405static struct mtd_partition partition_info[] = {
406 {
aa582977 407 .name = "linux kernel(nand)",
db68254f 408 .offset = 0,
f4585a08 409 .size = 4 * 1024 * 1024,
db68254f
MH		 410 },
411 {
aa582977 412 .name = "file system(nand)",
f4585a08
MF		 413 .offset = 4 * 1024 * 1024,
414 .size = (256 - 4) * 1024 * 1024,
db68254f
MH		 415 },
416};
417
418static struct bf5xx_nand_platform bf5xx_nand_platform = {
419 .page_size = NFC_PG_SIZE_256,
420 .data_width = NFC_NWIDTH_8,
421 .partitions = partition_info,
422 .nr_partitions = ARRAY_SIZE(partition_info),
423 .rd_dly = 3,
424 .wr_dly = 3,
425};
426
427static struct resource bf5xx_nand_resources[] = {
428 {
429 .start = 0xFFC03B00,
430 .end = 0xFFC03B4F,
431 .flags = IORESOURCE_MEM,
432 },
433 {
434 .start = CH_NFC,
435 .end = CH_NFC,
436 .flags = IORESOURCE_IRQ,
437 },
438};
439
440static struct platform_device bf5xx_nand_device = {
441 .name = "bf5xx-nand",
442 .id = 0,
443 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
444 .resource = bf5xx_nand_resources,
445 .dev = {
446 .platform_data = &bf5xx_nand_platform,
447 },
448};
449#endif
450
451#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
452static struct platform_device bf54x_sdh_device = {
453 .name = "bfin-sdh",
454 .id = 0,
455};
456#endif
457
2de73e71
MF		 458#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
459static struct mtd_partition para_partitions[] = {
460 {
461 .name = "bootloader(nor)",
462 .size = 0x40000,
463 .offset = 0,
464 }, {
465 .name = "linux kernel(nor)",
466 .size = 0x400000,
467 .offset = MTDPART_OFS_APPEND,
468 }, {
469 .name = "file system(nor)",
470 .size = MTDPART_SIZ_FULL,
471 .offset = MTDPART_OFS_APPEND,
472 }
473};
474
475static struct physmap_flash_data para_flash_data = {
476 .width = 2,
477 .parts = para_partitions,
478 .nr_parts = ARRAY_SIZE(para_partitions),
479};
480
481static struct resource para_flash_resource = {
482 .start = 0x20000000,
483 .end = 0x207fffff,
484 .flags = IORESOURCE_MEM,
485};
486
487static struct platform_device para_flash_device = {
488 .name = "physmap-flash",
489 .id = 0,
490 .dev = {
491 .platform_data = &para_flash_data,
492 },
493 .num_resources = 1,
494 .resource = &para_flash_resource,
495};
496#endif
497
db68254f
MH		 498#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
499/* all SPI peripherals info goes here */
500#if defined(CONFIG_MTD_M25P80) \
501 || defined(CONFIG_MTD_M25P80_MODULE)
502/* SPI flash chip (m25p16) */
503static struct mtd_partition bfin_spi_flash_partitions[] = {
504 {
aa582977 505 .name = "bootloader(spi)",
db68254f
MH		 506 .size = 0x00040000,
507 .offset = 0,
508 .mask_flags = MTD_CAP_ROM
509 }, {
aa582977 510 .name = "linux kernel(spi)",
db68254f
MH		 511 .size = 0x1c0000,
512 .offset = 0x40000
513 }
514};
515
516static struct flash_platform_data bfin_spi_flash_data = {
517 .name = "m25p80",
518 .parts = bfin_spi_flash_partitions,
519 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
520 .type = "m25p16",
521};
522
523static struct bfin5xx_spi_chip spi_flash_chip_info = {
524 .enable_dma = 0, /* use dma transfer with this chip*/
525 .bits_per_word = 8,
526 .cs_change_per_word = 0,
527};
528#endif
529
530#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
531static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
532 .cs_change_per_word = 0,
533 .enable_dma = 0,
534 .bits_per_word = 16,
535};
536
537static const struct ad7877_platform_data bfin_ad7877_ts_info = {
538 .model = 7877,
539 .vref_delay_usecs = 50, /* internal, no capacitor */
540 .x_plate_ohms = 419,
541 .y_plate_ohms = 486,
542 .pressure_max = 1000,
543 .pressure_min = 0,
544 .stopacq_polarity = 1,
545 .first_conversion_delay = 3,
546 .acquisition_time = 1,
547 .averaging = 1,
548 .pen_down_acc_interval = 1,
549};
550#endif
551
552#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
553static struct bfin5xx_spi_chip spidev_chip_info = {
554 .enable_dma = 0,
555 .bits_per_word = 8,
556};
557#endif
558
559static struct spi_board_info bf54x_spi_board_info[] __initdata = {
560#if defined(CONFIG_MTD_M25P80) \
561 || defined(CONFIG_MTD_M25P80_MODULE)
562 {
563 /* the modalias must be the same as spi device driver name */
564 .modalias = "m25p80", /* Name of spi_driver for this device */
565 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
566 .bus_num = 0, /* Framework bus number */
567 .chip_select = 1, /* SPI_SSEL1*/
568 .platform_data = &bfin_spi_flash_data,
569 .controller_data = &spi_flash_chip_info,
570 .mode = SPI_MODE_3,
571 },
572#endif
573#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
574{
575 .modalias = "ad7877",
576 .platform_data = &bfin_ad7877_ts_info,
577 .irq = IRQ_PJ11,
578 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
579 .bus_num = 0,
580 .chip_select = 2,
581 .controller_data = &spi_ad7877_chip_info,
582},
583#endif
584#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
585 {
586 .modalias = "spidev",
587 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
588 .bus_num = 0,
589 .chip_select = 1,
590 .controller_data = &spidev_chip_info,
591 },
592#endif
593};
594
595/* SPI (0) */
596static struct resource bfin_spi0_resource[] = {
597 [0] = {
598 .start = SPI0_REGBASE,
599 .end = SPI0_REGBASE + 0xFF,
600 .flags = IORESOURCE_MEM,
601 },
602 [1] = {
603 .start = CH_SPI0,
604 .end = CH_SPI0,
605 .flags = IORESOURCE_IRQ,
606 }
607};
608
609/* SPI (1) */
610static struct resource bfin_spi1_resource[] = {
611 [0] = {
612 .start = SPI1_REGBASE,
613 .end = SPI1_REGBASE + 0xFF,
614 .flags = IORESOURCE_MEM,
615 },
616 [1] = {
617 .start = CH_SPI1,
618 .end = CH_SPI1,
619 .flags = IORESOURCE_IRQ,
620 }
621};
622
623/* SPI controller data */
624static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
625 .num_chipselect = 8,
626 .enable_dma = 1, /* master has the ability to do dma transfer */
627 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
628};
629
630static struct platform_device bf54x_spi_master0 = {
631 .name = "bfin-spi",
632 .id = 0, /* Bus number */
633 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
634 .resource = bfin_spi0_resource,
635 .dev = {
636 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
637 },
638};
639
640static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
641 .num_chipselect = 8,
642 .enable_dma = 1, /* master has the ability to do dma transfer */
643 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
644};
645
646static struct platform_device bf54x_spi_master1 = {
647 .name = "bfin-spi",
648 .id = 1, /* Bus number */
649 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
650 .resource = bfin_spi1_resource,
651 .dev = {
652 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
653 },
654};
655#endif /* spi master and devices */
656
657#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
658static struct resource bfin_twi0_resource[] = {
659 [0] = {
660 .start = TWI0_REGBASE,
661 .end = TWI0_REGBASE + 0xFF,
662 .flags = IORESOURCE_MEM,
663 },
664 [1] = {
665 .start = IRQ_TWI0,
666 .end = IRQ_TWI0,
667 .flags = IORESOURCE_IRQ,
668 },
669};
670
671static struct platform_device i2c_bfin_twi0_device = {
672 .name = "i2c-bfin-twi",
673 .id = 0,
674 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
675 .resource = bfin_twi0_resource,
676};
677
678#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
679static struct resource bfin_twi1_resource[] = {
680 [0] = {
681 .start = TWI1_REGBASE,
682 .end = TWI1_REGBASE + 0xFF,
683 .flags = IORESOURCE_MEM,
684 },
685 [1] = {
686 .start = IRQ_TWI1,
687 .end = IRQ_TWI1,
688 .flags = IORESOURCE_IRQ,
689 },
690};
691
692static struct platform_device i2c_bfin_twi1_device = {
693 .name = "i2c-bfin-twi",
694 .id = 1,
695 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
696 .resource = bfin_twi1_resource,
697};
698#endif
699#endif
700
701#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
702#include <linux/gpio_keys.h>
703
704static struct gpio_keys_button bfin_gpio_keys_table[] = {
705 {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
706};
707
708static struct gpio_keys_platform_data bfin_gpio_keys_data = {
709 .buttons = bfin_gpio_keys_table,
710 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
711};
712
713static struct platform_device bfin_device_gpiokeys = {
714 .name = "gpio-keys",
715 .dev = {
716 .platform_data = &bfin_gpio_keys_data,
717 },
718};
719#endif
720
14b03204
MH		 721static const unsigned int cclk_vlev_datasheet[] =
722{
723/*
724 * Internal VLEV BF54XSBBC1533
725 ****temporarily using these values until data sheet is updated
726 */
727 VRPAIR(VLEV_085, 150000000),
728 VRPAIR(VLEV_090, 250000000),
729 VRPAIR(VLEV_110, 276000000),
730 VRPAIR(VLEV_115, 301000000),
731 VRPAIR(VLEV_120, 525000000),
732 VRPAIR(VLEV_125, 550000000),
733 VRPAIR(VLEV_130, 600000000),
734};
735
736static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
737 .tuple_tab = cclk_vlev_datasheet,
738 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
739 .vr_settling_time = 25 /* us */,
740};
741
742static struct platform_device bfin_dpmc = {
743 .name = "bfin dpmc",
744 .dev = {
745 .platform_data = &bfin_dmpc_vreg_data,
746 },
747};
748
db68254f 749static struct platform_device *cm_bf548_devices[] __initdata = {
14b03204
MH		 750
751 &bfin_dpmc,
752
db68254f
MH		 753#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
754 &rtc_device,
755#endif
756
757#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
758 &bfin_uart_device,
759#endif
760
5be36d22 761#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 762#ifdef CONFIG_BFIN_SIR0
763 &bfin_sir0_device,
764#endif
765#ifdef CONFIG_BFIN_SIR1
766 &bfin_sir1_device,
767#endif
768#ifdef CONFIG_BFIN_SIR2
769 &bfin_sir2_device,
770#endif
771#ifdef CONFIG_BFIN_SIR3
772 &bfin_sir3_device,
773#endif
5be36d22
GY		 774#endif
775
db68254f
MH		 776#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
777 &bf54x_lq043_device,
778#endif
779
780#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
781 &smsc911x_device,
782#endif
783
784#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
785 &musb_device,
786#endif
787
788#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
789 &bfin_atapi_device,
790#endif
791
792#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
793 &bf5xx_nand_device,
794#endif
795
796#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
797 &bf54x_sdh_device,
798#endif
799
800#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
801 &bf54x_spi_master0,
802 &bf54x_spi_master1,
803#endif
804
805#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
806 &bf54x_kpad_device,
807#endif
808
809#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
10a88a2b 810 &i2c_bfin_twi0_device,
db68254f
MH		 811#if !defined(CONFIG_BF542)
812 &i2c_bfin_twi1_device,
813#endif
814#endif
815
816#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
817 &bfin_device_gpiokeys,
818#endif
2de73e71
MF		 819
820#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
821 &para_flash_device,
822#endif
c97618d3
MF		 823
824 &bfin_gpios_device,
db68254f
MH		 825};
826
827static int __init cm_bf548_init(void)
828{
f086f234 829 printk(KERN_INFO "%s(): registering device resources\n", __func__);
db68254f
MH		 830 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
831
832#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
833 spi_register_board_info(bf54x_spi_board_info,
834 ARRAY_SIZE(bf54x_spi_board_info));
835#endif
836
837 return 0;
838}
839
840arch_initcall(cm_bf548_init);
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