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[Blackfin] arch: fix bug - breaking the atomic sections code.
[net-next-2.6.git] / arch / blackfin / mach-bf548 / boards / cm_bf548.c
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db68254f
MH		 1/*
2 * File: arch/blackfin/mach-bf548/boards/cm_bf548.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#include <linux/irq.h>
38#include <linux/interrupt.h>
39#include <linux/usb/musb.h>
40#include <asm/bfin5xx_spi.h>
41#include <asm/cplb.h>
42#include <asm/dma.h>
43#include <asm/gpio.h>
44#include <asm/nand.h>
45#include <asm/portmux.h>
46#include <asm/mach/bf54x_keys.h>
47#include <linux/input.h>
48#include <linux/spi/ad7877.h>
49
50/*
51 * Name the Board for the /proc/cpuinfo
52 */
53const char bfin_board_name[] = "Bluetechnix CM-BF548";
54
55/*
56 * Driver needs to know address, irq and flag pin.
57 */
58
59#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
60
61#include <asm/mach/bf54x-lq043.h>
62
63static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
64 .width = 480,
65 .height = 272,
66 .xres = {480, 480, 480},
67 .yres = {272, 272, 272},
68 .bpp = {24, 24, 24},
69 .disp = GPIO_PE3,
70};
71
72static struct resource bf54x_lq043_resources[] = {
73 {
74 .start = IRQ_EPPI0_ERR,
75 .end = IRQ_EPPI0_ERR,
76 .flags = IORESOURCE_IRQ,
77 },
78};
79
80static struct platform_device bf54x_lq043_device = {
81 .name = "bf54x-lq043",
82 .id = -1,
83 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
84 .resource = bf54x_lq043_resources,
85 .dev = {
86 .platform_data = &bf54x_lq043_data,
87 },
88};
89#endif
90
91#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
92static unsigned int bf548_keymap[] = {
93 KEYVAL(0, 0, KEY_ENTER),
94 KEYVAL(0, 1, KEY_HELP),
95 KEYVAL(0, 2, KEY_0),
96 KEYVAL(0, 3, KEY_BACKSPACE),
97 KEYVAL(1, 0, KEY_TAB),
98 KEYVAL(1, 1, KEY_9),
99 KEYVAL(1, 2, KEY_8),
100 KEYVAL(1, 3, KEY_7),
101 KEYVAL(2, 0, KEY_DOWN),
102 KEYVAL(2, 1, KEY_6),
103 KEYVAL(2, 2, KEY_5),
104 KEYVAL(2, 3, KEY_4),
105 KEYVAL(3, 0, KEY_UP),
106 KEYVAL(3, 1, KEY_3),
107 KEYVAL(3, 2, KEY_2),
108 KEYVAL(3, 3, KEY_1),
109};
110
111static struct bfin_kpad_platform_data bf54x_kpad_data = {
112 .rows = 4,
113 .cols = 4,
114 .keymap = bf548_keymap,
115 .keymapsize = ARRAY_SIZE(bf548_keymap),
116 .repeat = 0,
117 .debounce_time = 5000, /* ns (5ms) */
118 .coldrive_time = 1000, /* ns (1ms) */
119 .keyup_test_interval = 50, /* ms (50ms) */
120};
121
122static struct resource bf54x_kpad_resources[] = {
123 {
124 .start = IRQ_KEY,
125 .end = IRQ_KEY,
126 .flags = IORESOURCE_IRQ,
127 },
128};
129
130static struct platform_device bf54x_kpad_device = {
131 .name = "bf54x-keys",
132 .id = -1,
133 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
134 .resource = bf54x_kpad_resources,
135 .dev = {
136 .platform_data = &bf54x_kpad_data,
137 },
138};
139#endif
140
141#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
142static struct platform_device rtc_device = {
143 .name = "rtc-bfin",
144 .id = -1,
145};
146#endif
147
148#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
149static struct resource bfin_uart_resources[] = {
150#ifdef CONFIG_SERIAL_BFIN_UART0
151 {
152 .start = 0xFFC00400,
153 .end = 0xFFC004FF,
154 .flags = IORESOURCE_MEM,
155 },
156#endif
157#ifdef CONFIG_SERIAL_BFIN_UART1
158 {
159 .start = 0xFFC02000,
160 .end = 0xFFC020FF,
161 .flags = IORESOURCE_MEM,
162 },
163#endif
164#ifdef CONFIG_SERIAL_BFIN_UART2
165 {
166 .start = 0xFFC02100,
167 .end = 0xFFC021FF,
168 .flags = IORESOURCE_MEM,
169 },
170#endif
171#ifdef CONFIG_SERIAL_BFIN_UART3
172 {
173 .start = 0xFFC03100,
174 .end = 0xFFC031FF,
175 },
176#endif
177};
178
179static struct platform_device bfin_uart_device = {
180 .name = "bfin-uart",
181 .id = 1,
182 .num_resources = ARRAY_SIZE(bfin_uart_resources),
183 .resource = bfin_uart_resources,
184};
185#endif
186
5be36d22
GY		 187#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
188static struct resource bfin_sir_resources[] = {
189#ifdef CONFIG_BFIN_SIR0
190 {
191 .start = 0xFFC00400,
192 .end = 0xFFC004FF,
193 .flags = IORESOURCE_MEM,
194 },
195#endif
196#ifdef CONFIG_BFIN_SIR1
197 {
198 .start = 0xFFC02000,
199 .end = 0xFFC020FF,
200 .flags = IORESOURCE_MEM,
201 },
202#endif
203#ifdef CONFIG_BFIN_SIR2
204 {
205 .start = 0xFFC02100,
206 .end = 0xFFC021FF,
207 .flags = IORESOURCE_MEM,
208 },
209#endif
210#ifdef CONFIG_BFIN_SIR3
211 {
212 .start = 0xFFC03100,
213 .end = 0xFFC031FF,
214 .flags = IORESOURCE_MEM,
215 },
216#endif
217};
218
219static struct platform_device bfin_sir_device = {
220 .name = "bfin_sir",
221 .id = 0,
222 .num_resources = ARRAY_SIZE(bfin_sir_resources),
223 .resource = bfin_sir_resources,
224};
225#endif
226
db68254f
MH		 227#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
228static struct resource smsc911x_resources[] = {
229 {
230 .name = "smsc911x-memory",
231 .start = 0x24000000,
232 .end = 0x24000000 + 0xFF,
233 .flags = IORESOURCE_MEM,
234 },
235 {
236 .start = IRQ_PE6,
237 .end = IRQ_PE6,
238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
239 },
240};
241static struct platform_device smsc911x_device = {
242 .name = "smsc911x",
243 .id = 0,
244 .num_resources = ARRAY_SIZE(smsc911x_resources),
245 .resource = smsc911x_resources,
246};
247#endif
248
249#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
250static struct resource musb_resources[] = {
251 [0] = {
252 .start = 0xFFC03C00,
253 .end = 0xFFC040FF,
254 .flags = IORESOURCE_MEM,
255 },
256 [1] = { /* general IRQ */
257 .start = IRQ_USB_INT0,
258 .end = IRQ_USB_INT0,
259 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
260 },
261 [2] = { /* DMA IRQ */
262 .start = IRQ_USB_DMA,
263 .end = IRQ_USB_DMA,
264 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
265 },
266};
267
268static struct musb_hdrc_platform_data musb_plat = {
269#if defined(CONFIG_USB_MUSB_OTG)
270 .mode = MUSB_OTG,
271#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
272 .mode = MUSB_HOST,
273#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
274 .mode = MUSB_PERIPHERAL,
275#endif
276 .multipoint = 0,
277};
278
279static u64 musb_dmamask = ~(u32)0;
280
281static struct platform_device musb_device = {
282 .name = "musb_hdrc",
283 .id = 0,
284 .dev = {
285 .dma_mask = &musb_dmamask,
286 .coherent_dma_mask = 0xffffffff,
287 .platform_data = &musb_plat,
288 },
289 .num_resources = ARRAY_SIZE(musb_resources),
290 .resource = musb_resources,
291};
292#endif
293
294#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
295static struct resource bfin_atapi_resources[] = {
296 {
297 .start = 0xFFC03800,
298 .end = 0xFFC0386F,
299 .flags = IORESOURCE_MEM,
300 },
301 {
302 .start = IRQ_ATAPI_ERR,
303 .end = IRQ_ATAPI_ERR,
304 .flags = IORESOURCE_IRQ,
305 },
306};
307
308static struct platform_device bfin_atapi_device = {
309 .name = "pata-bf54x",
310 .id = -1,
311 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
312 .resource = bfin_atapi_resources,
313};
314#endif
315
316#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
317static struct mtd_partition partition_info[] = {
318 {
319 .name = "Linux Kernel",
320 .offset = 0,
321 .size = 4 * SIZE_1M,
322 },
323 {
324 .name = "File System",
325 .offset = 4 * SIZE_1M,
326 .size = (256 - 4) * SIZE_1M,
327 },
328};
329
330static struct bf5xx_nand_platform bf5xx_nand_platform = {
331 .page_size = NFC_PG_SIZE_256,
332 .data_width = NFC_NWIDTH_8,
333 .partitions = partition_info,
334 .nr_partitions = ARRAY_SIZE(partition_info),
335 .rd_dly = 3,
336 .wr_dly = 3,
337};
338
339static struct resource bf5xx_nand_resources[] = {
340 {
341 .start = 0xFFC03B00,
342 .end = 0xFFC03B4F,
343 .flags = IORESOURCE_MEM,
344 },
345 {
346 .start = CH_NFC,
347 .end = CH_NFC,
348 .flags = IORESOURCE_IRQ,
349 },
350};
351
352static struct platform_device bf5xx_nand_device = {
353 .name = "bf5xx-nand",
354 .id = 0,
355 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
356 .resource = bf5xx_nand_resources,
357 .dev = {
358 .platform_data = &bf5xx_nand_platform,
359 },
360};
361#endif
362
363#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
364static struct platform_device bf54x_sdh_device = {
365 .name = "bfin-sdh",
366 .id = 0,
367};
368#endif
369
370#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
371/* all SPI peripherals info goes here */
372#if defined(CONFIG_MTD_M25P80) \
373 || defined(CONFIG_MTD_M25P80_MODULE)
374/* SPI flash chip (m25p16) */
375static struct mtd_partition bfin_spi_flash_partitions[] = {
376 {
377 .name = "bootloader",
378 .size = 0x00040000,
379 .offset = 0,
380 .mask_flags = MTD_CAP_ROM
381 }, {
382 .name = "linux kernel",
383 .size = 0x1c0000,
384 .offset = 0x40000
385 }
386};
387
388static struct flash_platform_data bfin_spi_flash_data = {
389 .name = "m25p80",
390 .parts = bfin_spi_flash_partitions,
391 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
392 .type = "m25p16",
393};
394
395static struct bfin5xx_spi_chip spi_flash_chip_info = {
396 .enable_dma = 0, /* use dma transfer with this chip*/
397 .bits_per_word = 8,
398 .cs_change_per_word = 0,
399};
400#endif
401
402#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
403static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
404 .cs_change_per_word = 0,
405 .enable_dma = 0,
406 .bits_per_word = 16,
407};
408
409static const struct ad7877_platform_data bfin_ad7877_ts_info = {
410 .model = 7877,
411 .vref_delay_usecs = 50, /* internal, no capacitor */
412 .x_plate_ohms = 419,
413 .y_plate_ohms = 486,
414 .pressure_max = 1000,
415 .pressure_min = 0,
416 .stopacq_polarity = 1,
417 .first_conversion_delay = 3,
418 .acquisition_time = 1,
419 .averaging = 1,
420 .pen_down_acc_interval = 1,
421};
422#endif
423
424#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
425static struct bfin5xx_spi_chip spidev_chip_info = {
426 .enable_dma = 0,
427 .bits_per_word = 8,
428};
429#endif
430
431static struct spi_board_info bf54x_spi_board_info[] __initdata = {
432#if defined(CONFIG_MTD_M25P80) \
433 || defined(CONFIG_MTD_M25P80_MODULE)
434 {
435 /* the modalias must be the same as spi device driver name */
436 .modalias = "m25p80", /* Name of spi_driver for this device */
437 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
438 .bus_num = 0, /* Framework bus number */
439 .chip_select = 1, /* SPI_SSEL1*/
440 .platform_data = &bfin_spi_flash_data,
441 .controller_data = &spi_flash_chip_info,
442 .mode = SPI_MODE_3,
443 },
444#endif
445#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
446{
447 .modalias = "ad7877",
448 .platform_data = &bfin_ad7877_ts_info,
449 .irq = IRQ_PJ11,
450 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
451 .bus_num = 0,
452 .chip_select = 2,
453 .controller_data = &spi_ad7877_chip_info,
454},
455#endif
456#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
457 {
458 .modalias = "spidev",
459 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
460 .bus_num = 0,
461 .chip_select = 1,
462 .controller_data = &spidev_chip_info,
463 },
464#endif
465};
466
467/* SPI (0) */
468static struct resource bfin_spi0_resource[] = {
469 [0] = {
470 .start = SPI0_REGBASE,
471 .end = SPI0_REGBASE + 0xFF,
472 .flags = IORESOURCE_MEM,
473 },
474 [1] = {
475 .start = CH_SPI0,
476 .end = CH_SPI0,
477 .flags = IORESOURCE_IRQ,
478 }
479};
480
481/* SPI (1) */
482static struct resource bfin_spi1_resource[] = {
483 [0] = {
484 .start = SPI1_REGBASE,
485 .end = SPI1_REGBASE + 0xFF,
486 .flags = IORESOURCE_MEM,
487 },
488 [1] = {
489 .start = CH_SPI1,
490 .end = CH_SPI1,
491 .flags = IORESOURCE_IRQ,
492 }
493};
494
495/* SPI controller data */
496static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
497 .num_chipselect = 8,
498 .enable_dma = 1, /* master has the ability to do dma transfer */
499 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
500};
501
502static struct platform_device bf54x_spi_master0 = {
503 .name = "bfin-spi",
504 .id = 0, /* Bus number */
505 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
506 .resource = bfin_spi0_resource,
507 .dev = {
508 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
509 },
510};
511
512static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
513 .num_chipselect = 8,
514 .enable_dma = 1, /* master has the ability to do dma transfer */
515 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
516};
517
518static struct platform_device bf54x_spi_master1 = {
519 .name = "bfin-spi",
520 .id = 1, /* Bus number */
521 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
522 .resource = bfin_spi1_resource,
523 .dev = {
524 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
525 },
526};
527#endif /* spi master and devices */
528
529#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
530static struct resource bfin_twi0_resource[] = {
531 [0] = {
532 .start = TWI0_REGBASE,
533 .end = TWI0_REGBASE + 0xFF,
534 .flags = IORESOURCE_MEM,
535 },
536 [1] = {
537 .start = IRQ_TWI0,
538 .end = IRQ_TWI0,
539 .flags = IORESOURCE_IRQ,
540 },
541};
542
543static struct platform_device i2c_bfin_twi0_device = {
544 .name = "i2c-bfin-twi",
545 .id = 0,
546 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
547 .resource = bfin_twi0_resource,
548};
549
550#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
551static struct resource bfin_twi1_resource[] = {
552 [0] = {
553 .start = TWI1_REGBASE,
554 .end = TWI1_REGBASE + 0xFF,
555 .flags = IORESOURCE_MEM,
556 },
557 [1] = {
558 .start = IRQ_TWI1,
559 .end = IRQ_TWI1,
560 .flags = IORESOURCE_IRQ,
561 },
562};
563
564static struct platform_device i2c_bfin_twi1_device = {
565 .name = "i2c-bfin-twi",
566 .id = 1,
567 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
568 .resource = bfin_twi1_resource,
569};
570#endif
571#endif
572
573#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
574#include <linux/gpio_keys.h>
575
576static struct gpio_keys_button bfin_gpio_keys_table[] = {
577 {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
578};
579
580static struct gpio_keys_platform_data bfin_gpio_keys_data = {
581 .buttons = bfin_gpio_keys_table,
582 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
583};
584
585static struct platform_device bfin_device_gpiokeys = {
586 .name = "gpio-keys",
587 .dev = {
588 .platform_data = &bfin_gpio_keys_data,
589 },
590};
591#endif
592
593static struct platform_device *cm_bf548_devices[] __initdata = {
594#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
595 &rtc_device,
596#endif
597
598#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
599 &bfin_uart_device,
600#endif
601
5be36d22
GY		 602#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
603 &bfin_sir_device,
604#endif
605
db68254f
MH		 606#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
607 &bf54x_lq043_device,
608#endif
609
610#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
611 &smsc911x_device,
612#endif
613
614#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
615 &musb_device,
616#endif
617
618#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
619 &bfin_atapi_device,
620#endif
621
622#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
623 &bf5xx_nand_device,
624#endif
625
626#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
627 &bf54x_sdh_device,
628#endif
629
630#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
631 &bf54x_spi_master0,
632 &bf54x_spi_master1,
633#endif
634
635#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
636 &bf54x_kpad_device,
637#endif
638
639#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
640/* &i2c_bfin_twi0_device, */
641#if !defined(CONFIG_BF542)
642 &i2c_bfin_twi1_device,
643#endif
644#endif
645
646#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
647 &bfin_device_gpiokeys,
648#endif
649};
650
651static int __init cm_bf548_init(void)
652{
653 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
654 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
655
656#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
657 spi_register_board_info(bf54x_spi_board_info,
658 ARRAY_SIZE(bf54x_spi_board_info));
659#endif
660
661 return 0;
662}
663
664arch_initcall(cm_bf548_init);
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