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Blackfin: bf538-ezkit: add SPI IRQ resources
[net-next-2.6.git] / arch / blackfin / mach-bf538 / boards / ezkit.c
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1/*
2 * File: arch/blackfin/mach-bf538/boards/ezkit.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
f1cb6462 34#include <linux/mtd/physmap.h>
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35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#include <linux/irq.h>
39#include <linux/interrupt.h>
40#include <asm/bfin5xx_spi.h>
41#include <asm/dma.h>
42#include <asm/gpio.h>
43#include <asm/nand.h>
44#include <asm/portmux.h>
45#include <asm/dpmc.h>
46#include <linux/input.h>
47
48/*
49 * Name the Board for the /proc/cpuinfo
50 */
fe85cad2 51const char bfin_board_name[] = "ADI BF538-EZKIT";
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52
53/*
54 * Driver needs to know address, irq and flag pin.
55 */
56
57
58#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
59static struct platform_device rtc_device = {
60 .name = "rtc-bfin",
61 .id = -1,
62};
63#endif
64
65#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
66static struct resource bfin_uart_resources[] = {
67#ifdef CONFIG_SERIAL_BFIN_UART0
68 {
69 .start = 0xFFC00400,
70 .end = 0xFFC004FF,
71 .flags = IORESOURCE_MEM,
72 },
73#endif
74#ifdef CONFIG_SERIAL_BFIN_UART1
75 {
76 .start = 0xFFC02000,
77 .end = 0xFFC020FF,
78 .flags = IORESOURCE_MEM,
79 },
80#endif
81#ifdef CONFIG_SERIAL_BFIN_UART2
82 {
83 .start = 0xFFC02100,
84 .end = 0xFFC021FF,
85 .flags = IORESOURCE_MEM,
86 },
87#endif
88};
89
90static struct platform_device bfin_uart_device = {
91 .name = "bfin-uart",
92 .id = 1,
93 .num_resources = ARRAY_SIZE(bfin_uart_resources),
94 .resource = bfin_uart_resources,
95};
96#endif
97
98#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
dc26aec2 99#ifdef CONFIG_BFIN_SIR0
42bd8bcb 100static struct resource bfin_sir0_resources[] = {
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101 {
102 .start = 0xFFC00400,
103 .end = 0xFFC004FF,
104 .flags = IORESOURCE_MEM,
105 },
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106 {
107 .start = IRQ_UART0_RX,
108 .end = IRQ_UART0_RX+1,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = CH_UART0_RX,
113 .end = CH_UART0_RX+1,
114 .flags = IORESOURCE_DMA,
115 },
116};
117static struct platform_device bfin_sir0_device = {
118 .name = "bfin_sir",
119 .id = 0,
120 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
121 .resource = bfin_sir0_resources,
122};
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123#endif
124#ifdef CONFIG_BFIN_SIR1
42bd8bcb 125static struct resource bfin_sir1_resources[] = {
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126 {
127 .start = 0xFFC02000,
128 .end = 0xFFC020FF,
129 .flags = IORESOURCE_MEM,
130 },
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131 {
132 .start = IRQ_UART1_RX,
133 .end = IRQ_UART1_RX+1,
134 .flags = IORESOURCE_IRQ,
135 },
136 {
137 .start = CH_UART1_RX,
138 .end = CH_UART1_RX+1,
139 .flags = IORESOURCE_DMA,
140 },
141};
142static struct platform_device bfin_sir1_device = {
143 .name = "bfin_sir",
144 .id = 1,
145 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
146 .resource = bfin_sir1_resources,
147};
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148#endif
149#ifdef CONFIG_BFIN_SIR2
42bd8bcb 150static struct resource bfin_sir2_resources[] = {
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151 {
152 .start = 0xFFC02100,
153 .end = 0xFFC021FF,
154 .flags = IORESOURCE_MEM,
155 },
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156 {
157 .start = IRQ_UART2_RX,
158 .end = IRQ_UART2_RX+1,
159 .flags = IORESOURCE_IRQ,
160 },
161 {
162 .start = CH_UART2_RX,
163 .end = CH_UART2_RX+1,
164 .flags = IORESOURCE_DMA,
165 },
dc26aec2 166};
42bd8bcb 167static struct platform_device bfin_sir2_device = {
dc26aec2 168 .name = "bfin_sir",
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169 .id = 2,
170 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
171 .resource = bfin_sir2_resources,
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172};
173#endif
42bd8bcb 174#endif
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175
176/*
177 * USB-LAN EzExtender board
178 * Driver needs to know address, irq and flag pin.
179 */
180#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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181#include <linux/smc91x.h>
182
183static struct smc91x_platdata smc91x_info = {
184 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
185 .leda = RPC_LED_100_10,
186 .ledb = RPC_LED_TX_RX,
187};
188
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189static struct resource smc91x_resources[] = {
190 {
191 .name = "smc91x-regs",
192 .start = 0x20310300,
193 .end = 0x20310300 + 16,
194 .flags = IORESOURCE_MEM,
195 }, {
196 .start = IRQ_PF0,
197 .end = IRQ_PF0,
198 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
199 },
200};
201static struct platform_device smc91x_device = {
202 .name = "smc91x",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(smc91x_resources),
205 .resource = smc91x_resources,
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206 .dev = {
207 .platform_data = &smc91x_info,
208 },
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209};
210#endif
211
212#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
213/* all SPI peripherals info goes here */
214#if defined(CONFIG_MTD_M25P80) \
215 || defined(CONFIG_MTD_M25P80_MODULE)
216/* SPI flash chip (m25p16) */
217static struct mtd_partition bfin_spi_flash_partitions[] = {
218 {
219 .name = "bootloader(spi)",
220 .size = 0x00040000,
221 .offset = 0,
222 .mask_flags = MTD_CAP_ROM
223 }, {
224 .name = "linux kernel(spi)",
225 .size = 0x1c0000,
226 .offset = 0x40000
227 }
228};
229
230static struct flash_platform_data bfin_spi_flash_data = {
231 .name = "m25p80",
232 .parts = bfin_spi_flash_partitions,
233 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
234 .type = "m25p16",
235};
236
237static struct bfin5xx_spi_chip spi_flash_chip_info = {
238 .enable_dma = 0, /* use dma transfer with this chip*/
239 .bits_per_word = 8,
240 .cs_change_per_word = 0,
241};
242#endif
243
244#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
245#include <linux/spi/ad7879.h>
246static const struct ad7879_platform_data bfin_ad7879_ts_info = {
247 .model = 7879, /* Model = AD7879 */
248 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
249 .pressure_max = 10000,
250 .pressure_min = 0,
251 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
252 .acquisition_time = 1, /* 4us acquisition time per sample */
253 .median = 2, /* do 8 measurements */
254 .averaging = 1, /* take the average of 4 middle samples */
255 .pen_down_acc_interval = 255, /* 9.4 ms */
256 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
257 .gpio_default = 1, /* During initialization set GPIO = HIGH */
258};
259#endif
260
261#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
262static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
263 .enable_dma = 0,
264 .bits_per_word = 16,
265};
266#endif
267
268#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
269#include <asm/bfin-lq035q1.h>
270
271static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
272 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
273 .use_bl = 0, /* let something else control the LCD Blacklight */
274 .gpio_bl = GPIO_PF7,
275};
276
277static struct resource bfin_lq035q1_resources[] = {
278 {
279 .start = IRQ_PPI_ERROR,
280 .end = IRQ_PPI_ERROR,
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285static struct platform_device bfin_lq035q1_device = {
286 .name = "bfin-lq035q1",
287 .id = -1,
288 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
289 .resource = bfin_lq035q1_resources,
290 .dev = {
291 .platform_data = &bfin_lq035q1_data,
292 },
293};
294#endif
295
296#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
297static struct bfin5xx_spi_chip spidev_chip_info = {
298 .enable_dma = 0,
299 .bits_per_word = 8,
300};
301#endif
302
303#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
304static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
305 .enable_dma = 0,
306 .bits_per_word = 8,
307};
308#endif
309
310static struct spi_board_info bf538_spi_board_info[] __initdata = {
311#if defined(CONFIG_MTD_M25P80) \
312 || defined(CONFIG_MTD_M25P80_MODULE)
313 {
314 /* the modalias must be the same as spi device driver name */
315 .modalias = "m25p80", /* Name of spi_driver for this device */
316 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
317 .bus_num = 0, /* Framework bus number */
318 .chip_select = 1, /* SPI_SSEL1*/
319 .platform_data = &bfin_spi_flash_data,
320 .controller_data = &spi_flash_chip_info,
321 .mode = SPI_MODE_3,
322 },
323#endif
324#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
325 {
326 .modalias = "ad7879",
327 .platform_data = &bfin_ad7879_ts_info,
328 .irq = IRQ_PF3,
329 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
330 .bus_num = 0,
331 .chip_select = 1,
332 .controller_data = &spi_ad7879_chip_info,
333 .mode = SPI_CPHA | SPI_CPOL,
334 },
335#endif
336#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
337 {
338 .modalias = "bfin-lq035q1-spi",
339 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
340 .bus_num = 0,
341 .chip_select = 2,
342 .controller_data = &lq035q1_spi_chip_info,
343 .mode = SPI_CPHA | SPI_CPOL,
344 },
345#endif
346#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
347 {
348 .modalias = "spidev",
349 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
350 .bus_num = 0,
351 .chip_select = 1,
352 .controller_data = &spidev_chip_info,
353 },
354#endif
355};
356
357/* SPI (0) */
358static struct resource bfin_spi0_resource[] = {
359 [0] = {
360 .start = SPI0_REGBASE,
361 .end = SPI0_REGBASE + 0xFF,
362 .flags = IORESOURCE_MEM,
363 },
364 [1] = {
365 .start = CH_SPI0,
366 .end = CH_SPI0,
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367 .flags = IORESOURCE_DMA,
368 },
369 [2] = {
370 .start = IRQ_SPI0,
371 .end = IRQ_SPI0,
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372 .flags = IORESOURCE_IRQ,
373 }
374};
375
376/* SPI (1) */
377static struct resource bfin_spi1_resource[] = {
378 [0] = {
379 .start = SPI1_REGBASE,
380 .end = SPI1_REGBASE + 0xFF,
381 .flags = IORESOURCE_MEM,
382 },
383 [1] = {
384 .start = CH_SPI1,
385 .end = CH_SPI1,
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386 .flags = IORESOURCE_DMA,
387 },
388 [2] = {
389 .start = IRQ_SPI1,
390 .end = IRQ_SPI1,
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391 .flags = IORESOURCE_IRQ,
392 }
393};
394
395/* SPI (2) */
396static struct resource bfin_spi2_resource[] = {
397 [0] = {
398 .start = SPI2_REGBASE,
399 .end = SPI2_REGBASE + 0xFF,
400 .flags = IORESOURCE_MEM,
401 },
402 [1] = {
403 .start = CH_SPI2,
404 .end = CH_SPI2,
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405 .flags = IORESOURCE_DMA,
406 },
407 [2] = {
408 .start = IRQ_SPI2,
409 .end = IRQ_SPI2,
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410 .flags = IORESOURCE_IRQ,
411 }
412};
413
414/* SPI controller data */
415static struct bfin5xx_spi_master bf538_spi_master_info0 = {
416 .num_chipselect = 8,
417 .enable_dma = 1, /* master has the ability to do dma transfer */
418 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
419};
420
421static struct platform_device bf538_spi_master0 = {
422 .name = "bfin-spi",
423 .id = 0, /* Bus number */
424 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
425 .resource = bfin_spi0_resource,
426 .dev = {
427 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
428 },
429};
430
431static struct bfin5xx_spi_master bf538_spi_master_info1 = {
432 .num_chipselect = 8,
433 .enable_dma = 1, /* master has the ability to do dma transfer */
434 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
435};
436
437static struct platform_device bf538_spi_master1 = {
438 .name = "bfin-spi",
439 .id = 1, /* Bus number */
440 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
441 .resource = bfin_spi1_resource,
442 .dev = {
443 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
444 },
445};
446
447static struct bfin5xx_spi_master bf538_spi_master_info2 = {
448 .num_chipselect = 8,
449 .enable_dma = 1, /* master has the ability to do dma transfer */
450 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
451};
452
453static struct platform_device bf538_spi_master2 = {
454 .name = "bfin-spi",
455 .id = 2, /* Bus number */
456 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
457 .resource = bfin_spi2_resource,
458 .dev = {
459 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
460 },
461};
462
463#endif /* spi master and devices */
464
465#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
466static struct resource bfin_twi0_resource[] = {
467 [0] = {
468 .start = TWI0_REGBASE,
469 .end = TWI0_REGBASE + 0xFF,
470 .flags = IORESOURCE_MEM,
471 },
472 [1] = {
473 .start = IRQ_TWI0,
474 .end = IRQ_TWI0,
475 .flags = IORESOURCE_IRQ,
476 },
477};
478
479static struct platform_device i2c_bfin_twi0_device = {
480 .name = "i2c-bfin-twi",
481 .id = 0,
482 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
483 .resource = bfin_twi0_resource,
484};
485
486#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
487static struct resource bfin_twi1_resource[] = {
488 [0] = {
489 .start = TWI1_REGBASE,
490 .end = TWI1_REGBASE + 0xFF,
491 .flags = IORESOURCE_MEM,
492 },
493 [1] = {
494 .start = IRQ_TWI1,
495 .end = IRQ_TWI1,
496 .flags = IORESOURCE_IRQ,
497 },
498};
499
500static struct platform_device i2c_bfin_twi1_device = {
501 .name = "i2c-bfin-twi",
502 .id = 1,
503 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
504 .resource = bfin_twi1_resource,
505};
506#endif
507#endif
508
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509static struct resource bfin_gpios_resources = {
510 .start = 0,
511 .end = MAX_BLACKFIN_GPIOS - 1,
512 .flags = IORESOURCE_IRQ,
513};
514
515static struct platform_device bfin_gpios_device = {
516 .name = "simple-gpio",
517 .id = -1,
518 .num_resources = 1,
519 .resource = &bfin_gpios_resources,
520};
521
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522#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
523#include <linux/gpio_keys.h>
524
525static struct gpio_keys_button bfin_gpio_keys_table[] = {
526 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
527};
528
529static struct gpio_keys_platform_data bfin_gpio_keys_data = {
530 .buttons = bfin_gpio_keys_table,
531 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
532};
533
534static struct platform_device bfin_device_gpiokeys = {
535 .name = "gpio-keys",
536 .dev = {
537 .platform_data = &bfin_gpio_keys_data,
538 },
539};
540#endif
541
542static const unsigned int cclk_vlev_datasheet[] =
543{
544/*
545 * Internal VLEV BF538SBBC1533
546 ****temporarily using these values until data sheet is updated
547 */
548 VRPAIR(VLEV_100, 150000000),
549 VRPAIR(VLEV_100, 250000000),
550 VRPAIR(VLEV_110, 276000000),
551 VRPAIR(VLEV_115, 301000000),
552 VRPAIR(VLEV_120, 525000000),
553 VRPAIR(VLEV_125, 550000000),
554 VRPAIR(VLEV_130, 600000000),
555};
556
557static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
558 .tuple_tab = cclk_vlev_datasheet,
559 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
560 .vr_settling_time = 25 /* us */,
561};
562
563static struct platform_device bfin_dpmc = {
564 .name = "bfin dpmc",
565 .dev = {
566 .platform_data = &bfin_dmpc_vreg_data,
567 },
568};
569
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570#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
571static struct mtd_partition ezkit_partitions[] = {
572 {
573 .name = "bootloader(nor)",
574 .size = 0x40000,
575 .offset = 0,
576 }, {
577 .name = "linux kernel(nor)",
578 .size = 0x180000,
579 .offset = MTDPART_OFS_APPEND,
580 }, {
581 .name = "file system(nor)",
582 .size = MTDPART_SIZ_FULL,
583 .offset = MTDPART_OFS_APPEND,
584 }
585};
586
587static struct physmap_flash_data ezkit_flash_data = {
588 .width = 2,
589 .parts = ezkit_partitions,
590 .nr_parts = ARRAY_SIZE(ezkit_partitions),
591};
592
593static struct resource ezkit_flash_resource = {
594 .start = 0x20000000,
595#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
596 .end = 0x202fffff,
597#else
598 .end = 0x203fffff,
599#endif
600 .flags = IORESOURCE_MEM,
601};
602
603static struct platform_device ezkit_flash_device = {
604 .name = "physmap-flash",
605 .id = 0,
606 .dev = {
607 .platform_data = &ezkit_flash_data,
608 },
609 .num_resources = 1,
610 .resource = &ezkit_flash_resource,
611};
612#endif
613
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614static struct platform_device *cm_bf538_devices[] __initdata = {
615
616 &bfin_dpmc,
617
618#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
619 &rtc_device,
620#endif
621
622#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
623 &bfin_uart_device,
624#endif
625
626#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
627 &bf538_spi_master0,
628 &bf538_spi_master1,
629 &bf538_spi_master2,
630#endif
631
632#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
633 &i2c_bfin_twi0_device,
634 &i2c_bfin_twi1_device,
635#endif
636
637#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
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638#ifdef CONFIG_BFIN_SIR0
639 &bfin_sir0_device,
640#endif
641#ifdef CONFIG_BFIN_SIR1
642 &bfin_sir1_device,
643#endif
644#ifdef CONFIG_BFIN_SIR2
645 &bfin_sir2_device,
646#endif
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647#endif
648
649#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
650 &smc91x_device,
651#endif
652
653#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
654 &bfin_lq035q1_device,
655#endif
656
657#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
658 &bfin_device_gpiokeys,
659#endif
c97618d3
MF
660
661 &bfin_gpios_device,
f1cb6462
BS
662
663#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
664 &ezkit_flash_device,
665#endif
dc26aec2
MH
666};
667
668static int __init ezkit_init(void)
669{
670 printk(KERN_INFO "%s(): registering device resources\n", __func__);
671 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
672
673#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
674 spi_register_board_info(bf538_spi_board_info,
675 ARRAY_SIZE(bf538_spi_board_info));
676#endif
677
678 return 0;
679}
680
681arch_initcall(ezkit_init);