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Blackfin: bf537-stamp: add example AD2S1210 IIO resources
[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032 11#include <linux/platform_device.h>
6e364755 12#include <linux/io.h>
1394f032 13#include <linux/mtd/mtd.h>
fc68911e 14#include <linux/mtd/nand.h>
1394f032 15#include <linux/mtd/partitions.h>
fc68911e 16#include <linux/mtd/plat-ram.h>
de8c43f2 17#include <linux/mtd/physmap.h>
1394f032
BW		 18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 21#include <linux/usb/isp1362.h>
1394f032 22#endif
7a9cc489
SZ		 23#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
0531c467 25#include <linux/etherdevice.h>
0a87e3e9 26#include <linux/ata_platform.h>
1394f032
BW		 27#include <linux/irq.h>
28#include <linux/interrupt.h>
27f5d75a 29#include <linux/usb/sl811.h>
f79ea4cb 30#include <linux/spi/mmc_spi.h>
78756c62
MH		 31#include <linux/leds.h>
32#include <linux/input.h>
c6c4d7bb 33#include <asm/dma.h>
1f83b8f1 34#include <asm/bfin5xx_spi.h>
c6c4d7bb 35#include <asm/reboot.h>
5d448dd5 36#include <asm/portmux.h>
14b03204 37#include <asm/dpmc.h>
f8e6dbff
SZ		 38#ifdef CONFIG_REGULATOR_ADP_SWITCH
39#include <linux/regulator/adp_switch.h>
40#endif
f32792d0
SZ		 41#ifdef CONFIG_REGULATOR_AD5398
42#include <linux/regulator/ad5398.h>
43#endif
44#include <linux/regulator/consumer.h>
45#include <linux/regulator/userspace-consumer.h>
1394f032
BW		 46
47/*
48 * Name the Board for the /proc/cpuinfo
49 */
fe85cad2 50const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 51
52/*
53 * Driver needs to know address, irq and flag pin.
54 */
55
1394f032 56#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 57#include <linux/usb/isp1760.h>
58static struct resource bfin_isp1760_resources[] = {
1394f032 59 [0] = {
3f375690
MH		 60 .start = 0x203C0000,
61 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
3f375690
MH		 65 .start = IRQ_PF7,
66 .end = IRQ_PF7,
6a6be3d1 67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 68 },
69};
70
3f375690
MH		 71static struct isp1760_platform_data isp1760_priv = {
72 .is_isp1761 = 0,
3f375690
MH		 73 .bus_width_16 = 1,
74 .port1_otg = 0,
75 .analog_oc = 0,
76 .dack_polarity_high = 0,
77 .dreq_polarity_high = 0,
1394f032
BW		 78};
79
3f375690 80static struct platform_device bfin_isp1760_device = {
c6feb768 81 .name = "isp1760",
3f375690
MH		 82 .id = 0,
83 .dev = {
84 .platform_data = &isp1760_priv,
85 },
86 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87 .resource = bfin_isp1760_resources,
1394f032 88};
1394f032
BW		 89#endif
90
2463ef22 91#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2463ef22
MH		 92#include <linux/gpio_keys.h>
93
94static struct gpio_keys_button bfin_gpio_keys_table[] = {
95 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99};
100
101static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102 .buttons = bfin_gpio_keys_table,
103 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104};
105
106static struct platform_device bfin_device_gpiokeys = {
107 .name = "gpio-keys",
108 .dev = {
109 .platform_data = &bfin_gpio_keys_data,
110 },
111};
112#endif
113
1394f032
BW		 114#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115static struct resource bfin_pcmcia_cf_resources[] = {
116 {
117 .start = 0x20310000, /* IO PORT */
118 .end = 0x20312000,
119 .flags = IORESOURCE_MEM,
1f83b8f1 120 }, {
d2d50aa9 121 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 122 .end = 0x20311FFF,
123 .flags = IORESOURCE_MEM,
1f83b8f1 124 }, {
1394f032
BW		 125 .start = IRQ_PF4,
126 .end = IRQ_PF4,
127 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 128 }, {
1394f032
BW		 129 .start = 6, /* Card Detect PF6 */
130 .end = 6,
131 .flags = IORESOURCE_IRQ,
132 },
133};
134
135static struct platform_device bfin_pcmcia_cf_device = {
136 .name = "bfin_cf_pcmcia",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139 .resource = bfin_pcmcia_cf_resources,
140};
141#endif
142
143#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147};
148#endif
149
150#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 151#include <linux/smc91x.h>
152
153static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157};
158
1394f032
BW		 159static struct resource smc91x_resources[] = {
160 {
161 .name = "smc91x-regs",
162 .start = 0x20300300,
163 .end = 0x20300300 + 16,
164 .flags = IORESOURCE_MEM,
1f83b8f1 165 }, {
1394f032
BW		 166
167 .start = IRQ_PF7,
168 .end = IRQ_PF7,
169 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170 },
171};
172static struct platform_device smc91x_device = {
173 .name = "smc91x",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(smc91x_resources),
176 .resource = smc91x_resources,
61f09b5a
MH		 177 .dev = {
178 .platform_data = &smc91x_info,
179 },
1394f032
BW		 180};
181#endif
182
f40d24d9
AL		 183#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184static struct resource dm9000_resources[] = {
185 [0] = {
186 .start = 0x203FB800,
b3dec4a4 187 .end = 0x203FB800 + 1,
f40d24d9
AL		 188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
b3dec4a4
BS		 191 .start = 0x203FB804,
192 .end = 0x203FB804 + 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [2] = {
f40d24d9
AL		 196 .start = IRQ_PF9,
197 .end = IRQ_PF9,
198 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199 },
200};
201
202static struct platform_device dm9000_device = {
203 .name = "dm9000",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(dm9000_resources),
206 .resource = dm9000_resources,
207};
208#endif
209
1394f032
BW		 210#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211static struct resource sl811_hcd_resources[] = {
212 {
213 .start = 0x20340000,
214 .end = 0x20340000,
215 .flags = IORESOURCE_MEM,
1f83b8f1 216 }, {
1394f032
BW		 217 .start = 0x20340004,
218 .end = 0x20340004,
219 .flags = IORESOURCE_MEM,
1f83b8f1 220 }, {
01218654
MF		 221 .start = IRQ_PF4,
222 .end = IRQ_PF4,
1394f032
BW		 223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 },
225};
226
227#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228void sl811_port_power(struct device *dev, int is_on)
229{
c6c4d7bb 230 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 231 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 232}
233#endif
234
235static struct sl811_platform_data sl811_priv = {
236 .potpg = 10,
237 .power = 250, /* == 500mA */
238#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239 .port_power = &sl811_port_power,
240#endif
241};
242
243static struct platform_device sl811_hcd_device = {
244 .name = "sl811-hcd",
245 .id = 0,
246 .dev = {
247 .platform_data = &sl811_priv,
248 },
249 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250 .resource = sl811_hcd_resources,
251};
252#endif
253
254#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255static struct resource isp1362_hcd_resources[] = {
256 {
257 .start = 0x20360000,
258 .end = 0x20360000,
259 .flags = IORESOURCE_MEM,
1f83b8f1 260 }, {
1394f032
BW		 261 .start = 0x20360004,
262 .end = 0x20360004,
263 .flags = IORESOURCE_MEM,
1f83b8f1 264 }, {
21b03cfe
MF		 265 .start = IRQ_PF3,
266 .end = IRQ_PF3,
1394f032
BW		 267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
268 },
269};
270
271static struct isp1362_platform_data isp1362_priv = {
272 .sel15Kres = 1,
273 .clknotstop = 0,
274 .oc_enable = 0,
275 .int_act_high = 0,
276 .int_edge_triggered = 0,
277 .remote_wakeup_connected = 0,
278 .no_power_switching = 1,
279 .power_switching_mode = 0,
280};
281
282static struct platform_device isp1362_hcd_device = {
283 .name = "isp1362-hcd",
284 .id = 0,
285 .dev = {
286 .platform_data = &isp1362_priv,
287 },
288 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289 .resource = isp1362_hcd_resources,
290};
291#endif
292
706a01b1
BS		 293#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
294unsigned short bfin_can_peripherals[] = {
295 P_CAN0_RX, P_CAN0_TX, 0
296};
297
298static struct resource bfin_can_resources[] = {
299 {
300 .start = 0xFFC02A00,
301 .end = 0xFFC02FFF,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = IRQ_CAN_RX,
306 .end = IRQ_CAN_RX,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = IRQ_CAN_TX,
311 .end = IRQ_CAN_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_CAN_ERROR,
316 .end = IRQ_CAN_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319};
320
321static struct platform_device bfin_can_device = {
322 .name = "bfin_can",
323 .num_resources = ARRAY_SIZE(bfin_can_resources),
324 .resource = bfin_can_resources,
325 .dev = {
326 .platform_data = &bfin_can_peripherals, /* Passed to driver */
327 },
328};
329#endif
330
1394f032 331#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 332static struct platform_device bfin_mii_bus = {
333 .name = "bfin_mii_bus",
334};
335
1394f032
BW		 336static struct platform_device bfin_mac_device = {
337 .name = "bfin_mac",
65319628 338 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 339};
340#endif
341
342#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
343static struct resource net2272_bfin_resources[] = {
344 {
345 .start = 0x20300000,
346 .end = 0x20300000 + 0x100,
347 .flags = IORESOURCE_MEM,
1f83b8f1 348 }, {
1394f032
BW		 349 .start = IRQ_PF7,
350 .end = IRQ_PF7,
351 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
352 },
353};
354
355static struct platform_device net2272_bfin_device = {
356 .name = "net2272",
357 .id = -1,
358 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
359 .resource = net2272_bfin_resources,
360};
361#endif
362
fc68911e
MF		 363#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
364#ifdef CONFIG_MTD_PARTITIONS
365const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
366
367static struct mtd_partition bfin_plat_nand_partitions[] = {
368 {
aa582977 369 .name = "linux kernel(nand)",
fc68911e
MF		 370 .size = 0x400000,
371 .offset = 0,
372 }, {
aa582977 373 .name = "file system(nand)",
fc68911e
MF		 374 .size = MTDPART_SIZ_FULL,
375 .offset = MTDPART_OFS_APPEND,
376 },
377};
378#endif
379
380#define BFIN_NAND_PLAT_CLE 2
381#define BFIN_NAND_PLAT_ALE 1
382static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
383{
384 struct nand_chip *this = mtd->priv;
385
386 if (cmd == NAND_CMD_NONE)
387 return;
388
389 if (ctrl & NAND_CLE)
390 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
391 else
392 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
393}
394
395#define BFIN_NAND_PLAT_READY GPIO_PF3
396static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
397{
398 return gpio_get_value(BFIN_NAND_PLAT_READY);
399}
400
401static struct platform_nand_data bfin_plat_nand_data = {
402 .chip = {
403 .chip_delay = 30,
404#ifdef CONFIG_MTD_PARTITIONS
405 .part_probe_types = part_probes,
406 .partitions = bfin_plat_nand_partitions,
407 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
408#endif
409 },
410 .ctrl = {
411 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
412 .dev_ready = bfin_plat_nand_dev_ready,
413 },
414};
415
416#define MAX(x, y) (x > y ? x : y)
417static struct resource bfin_plat_nand_resources = {
418 .start = 0x20212000,
419 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
420 .flags = IORESOURCE_IO,
421};
422
423static struct platform_device bfin_async_nand_device = {
424 .name = "gen_nand",
425 .id = -1,
426 .num_resources = 1,
427 .resource = &bfin_plat_nand_resources,
428 .dev = {
429 .platform_data = &bfin_plat_nand_data,
430 },
431};
432
433static void bfin_plat_nand_init(void)
434{
435 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
436}
437#else
438static void bfin_plat_nand_init(void) {}
439#endif
440
793dc27b 441#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 442static struct mtd_partition stamp_partitions[] = {
443 {
aa582977 444 .name = "bootloader(nor)",
edf05641 445 .size = 0x40000,
de8c43f2
MF		 446 .offset = 0,
447 }, {
aa582977 448 .name = "linux kernel(nor)",
6ecb5b6d 449 .size = 0x180000,
de8c43f2
MF		 450 .offset = MTDPART_OFS_APPEND,
451 }, {
aa582977 452 .name = "file system(nor)",
6ecb5b6d 453 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 454 .offset = MTDPART_OFS_APPEND,
455 }, {
aa582977 456 .name = "MAC Address(nor)",
de8c43f2
MF		 457 .size = MTDPART_SIZ_FULL,
458 .offset = 0x3F0000,
459 .mask_flags = MTD_WRITEABLE,
460 }
461};
462
463static struct physmap_flash_data stamp_flash_data = {
464 .width = 2,
465 .parts = stamp_partitions,
466 .nr_parts = ARRAY_SIZE(stamp_partitions),
38e7673f
BS		 467#ifdef CONFIG_ROMKERNEL
468 .probe_type = "map_rom",
469#endif
de8c43f2
MF		 470};
471
472static struct resource stamp_flash_resource = {
473 .start = 0x20000000,
474 .end = 0x203fffff,
475 .flags = IORESOURCE_MEM,
476};
477
478static struct platform_device stamp_flash_device = {
479 .name = "physmap-flash",
480 .id = 0,
481 .dev = {
482 .platform_data = &stamp_flash_data,
483 },
484 .num_resources = 1,
485 .resource = &stamp_flash_resource,
486};
793dc27b 487#endif
de8c43f2 488
1394f032
BW		 489#if defined(CONFIG_MTD_M25P80) \
490 || defined(CONFIG_MTD_M25P80_MODULE)
491static struct mtd_partition bfin_spi_flash_partitions[] = {
492 {
aa582977 493 .name = "bootloader(spi)",
edf05641 494 .size = 0x00040000,
1394f032
BW		 495 .offset = 0,
496 .mask_flags = MTD_CAP_ROM
1f83b8f1 497 }, {
aa582977 498 .name = "linux kernel(spi)",
6ecb5b6d 499 .size = 0x180000,
edf05641 500 .offset = MTDPART_OFS_APPEND,
1f83b8f1 501 }, {
aa582977 502 .name = "file system(spi)",
edf05641
MF		 503 .size = MTDPART_SIZ_FULL,
504 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 505 }
506};
507
508static struct flash_platform_data bfin_spi_flash_data = {
509 .name = "m25p80",
510 .parts = bfin_spi_flash_partitions,
511 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 512 /* .type = "m25p64", */
1394f032
BW		 513};
514
515/* SPI flash chip (m25p64) */
516static struct bfin5xx_spi_chip spi_flash_chip_info = {
517 .enable_dma = 0, /* use dma transfer with this chip*/
518 .bits_per_word = 8,
519};
520#endif
521
a261eec0
MF		 522#if defined(CONFIG_BFIN_SPI_ADC) \
523 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 524/* SPI ADC chip */
525static struct bfin5xx_spi_chip spi_adc_chip_info = {
526 .enable_dma = 1, /* use dma transfer with this chip*/
527 .bits_per_word = 16,
528};
529#endif
530
d40bd71f
BS		 531#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
532 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032
BW		 533static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
534 .enable_dma = 0,
535 .bits_per_word = 16,
536};
537#endif
538
3b82790c
BS		 539#if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
540 || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
d4b834c1
BS		 541static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
542 .enable_dma = 0,
543 .bits_per_word = 8,
d4b834c1
BS		 544};
545#endif
546
5b7c5775 547#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 548#include <linux/input/ad714x.h>
549static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
550 .enable_dma = 0,
551 .bits_per_word = 16,
552};
553
5b7c5775 554static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
427f277e
BS		 555 {
556 .start_stage = 0,
557 .end_stage = 7,
558 .max_coord = 128,
559 },
560};
561
5b7c5775 562static struct ad714x_button_plat ad7147_spi_button_plat[] = {
427f277e
BS		 563 {
564 .keycode = BTN_FORWARD,
565 .l_mask = 0,
566 .h_mask = 0x600,
567 },
568 {
569 .keycode = BTN_LEFT,
570 .l_mask = 0,
571 .h_mask = 0x500,
572 },
573 {
574 .keycode = BTN_MIDDLE,
575 .l_mask = 0,
576 .h_mask = 0x800,
577 },
578 {
579 .keycode = BTN_RIGHT,
580 .l_mask = 0x100,
581 .h_mask = 0x400,
582 },
583 {
584 .keycode = BTN_BACK,
585 .l_mask = 0x200,
586 .h_mask = 0x400,
587 },
588};
5b7c5775 589static struct ad714x_platform_data ad7147_spi_platform_data = {
427f277e
BS		 590 .slider_num = 1,
591 .button_num = 5,
5b7c5775
MF		 592 .slider = ad7147_spi_slider_plat,
593 .button = ad7147_spi_button_plat,
427f277e
BS		 594 .stage_cfg_reg = {
595 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
596 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
597 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
598 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
599 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
600 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
601 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
602 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
603 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
604 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
605 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
606 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
607 },
608 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
609};
610#endif
611
5b7c5775 612#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
427f277e 613#include <linux/input/ad714x.h>
5b7c5775 614static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
427f277e
BS		 615 {
616 .keycode = BTN_1,
617 .l_mask = 0,
618 .h_mask = 0x1,
619 },
620 {
621 .keycode = BTN_2,
622 .l_mask = 0,
623 .h_mask = 0x2,
624 },
625 {
626 .keycode = BTN_3,
627 .l_mask = 0,
628 .h_mask = 0x4,
629 },
630 {
631 .keycode = BTN_4,
632 .l_mask = 0x0,
633 .h_mask = 0x8,
634 },
635};
5b7c5775 636static struct ad714x_platform_data ad7142_i2c_platform_data = {
427f277e 637 .button_num = 4,
5b7c5775 638 .button = ad7142_i2c_button_plat,
427f277e
BS		 639 .stage_cfg_reg = {
640 /* fixme: figure out right setting for all comoponent according
641 * to hardware feature of EVAL-AD7142EB board */
642 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
643 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
644 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
645 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
646 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
647 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
648 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
649 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
650 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
651 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
652 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
653 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
654 },
655 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
656};
657#endif
658
f5f9531c
GY		 659#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
660static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
661 .enable_dma = 0,
662 .bits_per_word = 16,
663};
664#endif
665
df6a949b
GY		 666#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
667unsigned short ad2s120x_platform_data[] = {
668 /* used as SAMPLE and RDVEL */
669 GPIO_PF5, GPIO_PF6, 0
670};
671
672static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
673 .enable_dma = 0,
674 .bits_per_word = 16,
675};
676#endif
677
848c51cc
GY		 678#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
679unsigned short ad2s1210_platform_data[] = {
680 /* use as SAMPLE, A0, A1 */
681 GPIO_PF7, GPIO_PF8, GPIO_PF9,
682# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
683 /* the RES0 and RES1 pins */
684 GPIO_PF4, GPIO_PF5,
685# endif
686 0,
687};
688
689static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
690 .enable_dma = 0,
691 .bits_per_word = 8,
692};
693#endif
694
f79ea4cb
YL		 695#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
696#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
697
698static int bfin_mmc_spi_init(struct device *dev,
699 irqreturn_t (*detect_int)(int, void *), void *data)
700{
701 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
702 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
703}
704
705static void bfin_mmc_spi_exit(struct device *dev, void *data)
706{
707 free_irq(MMC_SPI_CARD_DETECT_INT, data);
708}
709
710static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
711 .init = bfin_mmc_spi_init,
712 .exit = bfin_mmc_spi_exit,
713 .detect_delay = 100, /* msecs */
714};
715
716static struct bfin5xx_spi_chip mmc_spi_chip_info = {
717 .enable_dma = 0,
718 .bits_per_word = 8,
e68d1ebc 719 .pio_interrupt = 0,
f79ea4cb
YL		 720};
721#endif
722
1394f032 723#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 724#include <linux/spi/ad7877.h>
1394f032 725static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 726 .enable_dma = 0,
727 .bits_per_word = 16,
728};
729
730static const struct ad7877_platform_data bfin_ad7877_ts_info = {
731 .model = 7877,
732 .vref_delay_usecs = 50, /* internal, no capacitor */
733 .x_plate_ohms = 419,
734 .y_plate_ohms = 486,
735 .pressure_max = 1000,
736 .pressure_min = 0,
737 .stopacq_polarity = 1,
738 .first_conversion_delay = 3,
739 .acquisition_time = 1,
740 .averaging = 1,
741 .pen_down_acc_interval = 1,
742};
743#endif
744
46aa04f9
MH		 745#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
746#include <linux/spi/ad7879.h>
46aa04f9
MH		 747static const struct ad7879_platform_data bfin_ad7879_ts_info = {
748 .model = 7879, /* Model = AD7879 */
749 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
750 .pressure_max = 10000,
751 .pressure_min = 0,
752 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
753 .acquisition_time = 1, /* 4us acquisition time per sample */
754 .median = 2, /* do 8 measurements */
755 .averaging = 1, /* take the average of 4 middle samples */
756 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423
MH		 757 .gpio_export = 1, /* Export GPIO to gpiolib */
758 .gpio_base = -1, /* Dynamic allocation */
46aa04f9
MH		 759};
760#endif
761
ffc4d8bc 762#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 763#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 764static const struct adxl34x_platform_data adxl34x_info = {
765 .x_axis_offset = 0,
766 .y_axis_offset = 0,
767 .z_axis_offset = 0,
768 .tap_threshold = 0x31,
769 .tap_duration = 0x10,
770 .tap_latency = 0x60,
771 .tap_window = 0xF0,
772 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
773 .act_axis_control = 0xFF,
774 .activity_threshold = 5,
775 .inactivity_threshold = 3,
776 .inactivity_time = 4,
777 .free_fall_threshold = 0x7,
778 .free_fall_time = 0x20,
779 .data_rate = 0x8,
780 .data_range = ADXL_FULL_RES,
781
782 .ev_type = EV_ABS,
783 .ev_code_x = ABS_X, /* EV_REL */
784 .ev_code_y = ABS_Y, /* EV_REL */
785 .ev_code_z = ABS_Z, /* EV_REL */
786
57af8edf 787 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 788
789/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
790/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
791 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
792 .fifo_mode = ADXL_FIFO_STREAM,
793};
794#endif
795
f5150155
MH		 796#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
797static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
798 .enable_dma = 0,
799 .bits_per_word = 16,
800};
801#endif
802
6e668936
MH		 803#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
804static struct bfin5xx_spi_chip spidev_chip_info = {
805 .enable_dma = 0,
806 .bits_per_word = 8,
807};
808#endif
809
2043f3f7
MH		 810#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
811static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
812 .enable_dma = 0,
813 .bits_per_word = 8,
814};
815#endif
816
85a192e9
MH		 817#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
818static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
819 .enable_dma = 1,
820 .bits_per_word = 8,
821 .cs_gpio = GPIO_PF10,
822};
823#endif
824
efaf7cd9
MH		 825#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
826static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
827 .bits_per_word = 16,
828 .cs_gpio = GPIO_PF10,
829};
830
831#include <linux/spi/adf702x.h>
832#define TXREG 0x0160A470
833static const u32 adf7021_regs[] = {
834 0x09608FA0,
835 0x00575011,
836 0x00A7F092,
837 0x2B141563,
838 0x81F29E94,
839 0x00003155,
840 0x050A4F66,
841 0x00000007,
842 0x00000008,
843 0x000231E9,
844 0x3296354A,
845 0x891A2B3B,
846 0x00000D9C,
847 0x0000000D,
848 0x0000000E,
849 0x0000000F,
850};
851
852static struct adf702x_platform_data adf7021_platform_data = {
853 .regs_base = (void *)SPORT1_TCR1,
854 .dma_ch_rx = CH_SPORT1_RX,
855 .dma_ch_tx = CH_SPORT1_TX,
856 .irq_sport_err = IRQ_SPORT1_ERROR,
857 .gpio_int_rfs = GPIO_PF8,
858 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
859 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
860 .adf702x_model = MODEL_ADF7021,
861 .adf702x_regs = adf7021_regs,
862 .tx_reg = TXREG,
863};
0531c467
MF		 864static inline void adf702x_mac_init(void)
865{
866 random_ether_addr(adf7021_platform_data.mac_addr);
867}
868#else
869static inline void adf702x_mac_init(void) {}
efaf7cd9
MH		 870#endif
871
fe5b25c0
MH		 872#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
873#include <linux/spi/ads7846.h>
874static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
875 .bits_per_word = 8,
876};
877
878static int ads7873_get_pendown_state(void)
879{
880 return gpio_get_value(GPIO_PF6);
881}
882
883static struct ads7846_platform_data __initdata ad7873_pdata = {
884 .model = 7873, /* AD7873 */
885 .x_max = 0xfff,
886 .y_max = 0xfff,
887 .x_plate_ohms = 620,
888 .debounce_max = 1,
889 .debounce_rep = 0,
890 .debounce_tol = (~0),
891 .get_pendown_state = ads7873_get_pendown_state,
892};
893#endif
894
8e9d5c7d
MH		 895#if defined(CONFIG_MTD_DATAFLASH) \
896 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 897
898static struct mtd_partition bfin_spi_dataflash_partitions[] = {
899 {
900 .name = "bootloader(spi)",
901 .size = 0x00040000,
902 .offset = 0,
903 .mask_flags = MTD_CAP_ROM
904 }, {
905 .name = "linux kernel(spi)",
6ecb5b6d 906 .size = 0x180000,
ceac2651
MH		 907 .offset = MTDPART_OFS_APPEND,
908 }, {
909 .name = "file system(spi)",
910 .size = MTDPART_SIZ_FULL,
911 .offset = MTDPART_OFS_APPEND,
912 }
913};
914
915static struct flash_platform_data bfin_spi_dataflash_data = {
916 .name = "SPI Dataflash",
917 .parts = bfin_spi_dataflash_partitions,
918 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
919};
920
8e9d5c7d
MH		 921/* DataFlash chip */
922static struct bfin5xx_spi_chip data_flash_chip_info = {
923 .enable_dma = 0, /* use dma transfer with this chip*/
924 .bits_per_word = 8,
925};
926#endif
927
57af8edf
MH		 928#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
929static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
930 .enable_dma = 0, /* use dma transfer with this chip*/
931 .bits_per_word = 8,
932};
933#endif
934
1394f032
BW		 935static struct spi_board_info bfin_spi_board_info[] __initdata = {
936#if defined(CONFIG_MTD_M25P80) \
937 || defined(CONFIG_MTD_M25P80_MODULE)
938 {
939 /* the modalias must be the same as spi device driver name */
940 .modalias = "m25p80", /* Name of spi_driver for this device */
941 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 942 .bus_num = 0, /* Framework bus number */
1394f032
BW		 943 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
944 .platform_data = &bfin_spi_flash_data,
945 .controller_data = &spi_flash_chip_info,
946 .mode = SPI_MODE_3,
947 },
948#endif
8e9d5c7d
MH		 949#if defined(CONFIG_MTD_DATAFLASH) \
950 || defined(CONFIG_MTD_DATAFLASH_MODULE)
951 { /* DataFlash chip */
952 .modalias = "mtd_dataflash",
ceac2651 953 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 954 .bus_num = 0, /* Framework bus number */
955 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 956 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 957 .controller_data = &data_flash_chip_info,
958 .mode = SPI_MODE_3,
959 },
960#endif
a261eec0
MF		 961#if defined(CONFIG_BFIN_SPI_ADC) \
962 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 963 {
964 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
965 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 966 .bus_num = 0, /* Framework bus number */
1394f032
BW		 967 .chip_select = 1, /* Framework chip select. */
968 .platform_data = NULL, /* No spi_driver specific config */
969 .controller_data = &spi_adc_chip_info,
970 },
971#endif
972
d40bd71f
BS		 973#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
974 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1394f032 975 {
d40bd71f 976 .modalias = "ad183x",
1394f032 977 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 978 .bus_num = 0,
8312440e 979 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
d40bd71f 980 .platform_data = "ad1836", /* only includes chip name for the moment */
1394f032 981 .controller_data = &ad1836_spi_chip_info,
8312440e 982 .mode = SPI_MODE_3,
1394f032
BW		 983 },
984#endif
d4b834c1 985
3b82790c 986#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
d4b834c1 987 {
3b82790c 988 .modalias = "ad193x",
d4b834c1
BS		 989 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
990 .bus_num = 0,
08a54bff 991 .chip_select = 5,
d4b834c1
BS		 992 .controller_data = &ad1938_spi_chip_info,
993 .mode = SPI_MODE_3,
994 },
995#endif
996
5b7c5775 997#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 998 {
999 .modalias = "ad714x_captouch",
1000 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1001 .irq = IRQ_PF4,
1002 .bus_num = 0,
1003 .chip_select = 5,
1004 .mode = SPI_MODE_3,
5b7c5775 1005 .platform_data = &ad7147_spi_platform_data,
427f277e
BS		 1006 .controller_data = &ad7147_spi_chip_info,
1007 },
1008#endif
1009
f5f9531c
GY		 1010#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1011 {
1012 .modalias = "ad2s90",
1013 .bus_num = 0,
1014 .chip_select = 3, /* change it for your board */
1015 .platform_data = NULL,
1016 .controller_data = &ad2s90_spi_chip_info,
1017 },
1018#endif
1019
df6a949b
GY		 1020#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1021 {
1022 .modalias = "ad2s120x",
1023 .bus_num = 0,
1024 .chip_select = 4, /* CS, change it for your board */
1025 .platform_data = ad2s120x_platform_data,
1026 .controller_data = &ad2s120x_spi_chip_info,
1027 },
1028#endif
1029
848c51cc
GY		 1030#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1031 {
1032 .modalias = "ad2s1210",
1033 .max_speed_hz = 8192000,
1034 .bus_num = 0,
1035 .chip_select = 4, /* CS, change it for your board */
1036 .platform_data = ad2s1210_platform_data,
1037 .controller_data = &ad2s1210_spi_chip_info,
1038 },
1039#endif
1040
f79ea4cb
YL		 1041#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1042 {
1043 .modalias = "mmc_spi",
1044 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1045 .bus_num = 0,
1046 .chip_select = 4,
1047 .platform_data = &bfin_mmc_spi_pdata,
1048 .controller_data = &mmc_spi_chip_info,
1049 .mode = SPI_MODE_3,
1050 },
1051#endif
1394f032
BW		 1052#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1053 {
1054 .modalias = "ad7877",
1055 .platform_data = &bfin_ad7877_ts_info,
1056 .irq = IRQ_PF6,
1057 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 1058 .bus_num = 0,
1394f032
BW		 1059 .chip_select = 1,
1060 .controller_data = &spi_ad7877_chip_info,
1061 },
1062#endif
f5150155 1063#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 1064 {
1065 .modalias = "ad7879",
1066 .platform_data = &bfin_ad7879_ts_info,
1067 .irq = IRQ_PF7,
1068 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1069 .bus_num = 0,
1070 .chip_select = 1,
1071 .controller_data = &spi_ad7879_chip_info,
1072 .mode = SPI_CPHA | SPI_CPOL,
1073 },
1074#endif
6e668936
MH		 1075#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1076 {
1077 .modalias = "spidev",
1078 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1079 .bus_num = 0,
1080 .chip_select = 1,
1081 .controller_data = &spidev_chip_info,
1082 },
1083#endif
2043f3f7
MH		 1084#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1085 {
1086 .modalias = "bfin-lq035q1-spi",
1087 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1088 .bus_num = 0,
46aa04f9 1089 .chip_select = 2,
2043f3f7
MH		 1090 .controller_data = &lq035q1_spi_chip_info,
1091 .mode = SPI_CPHA | SPI_CPOL,
1092 },
1093#endif
85a192e9
MH		 1094#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1095 {
1096 .modalias = "enc28j60",
1097 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1098 .irq = IRQ_PF6,
1099 .bus_num = 0,
1100 .chip_select = 0, /* GPIO controlled SSEL */
1101 .controller_data = &enc28j60_spi_chip_info,
1102 .mode = SPI_MODE_0,
1103 },
1104#endif
57af8edf
MH		 1105#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1106 {
1107 .modalias = "adxl34x",
1108 .platform_data = &adxl34x_info,
1109 .irq = IRQ_PF6,
1110 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1111 .bus_num = 0,
1112 .chip_select = 2,
1113 .controller_data = &spi_adxl34x_chip_info,
1114 .mode = SPI_MODE_3,
1115 },
1116#endif
efaf7cd9
MH		 1117#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1118 {
1119 .modalias = "adf702x",
1120 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1121 .bus_num = 0,
1122 .chip_select = 0, /* GPIO controlled SSEL */
1123 .controller_data = &adf7021_spi_chip_info,
1124 .platform_data = &adf7021_platform_data,
1125 .mode = SPI_MODE_0,
1126 },
1127#endif
fe5b25c0
MH		 1128#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1129 {
1130 .modalias = "ads7846",
1131 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1132 .bus_num = 0,
1133 .irq = IRQ_PF6,
1134 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1135 .controller_data = &ad7873_spi_chip_info,
1136 .platform_data = &ad7873_pdata,
1137 .mode = SPI_MODE_0,
1138 },
1139#endif
1394f032
BW		 1140};
1141
5bda2723 1142#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 1143/* SPI controller data */
c6c4d7bb 1144static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 1145 .num_chipselect = 8,
1146 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 1147 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 1148};
1149
c6c4d7bb
BW		 1150/* SPI (0) */
1151static struct resource bfin_spi0_resource[] = {
1152 [0] = {
1153 .start = SPI0_REGBASE,
1154 .end = SPI0_REGBASE + 0xFF,
1155 .flags = IORESOURCE_MEM,
1156 },
1157 [1] = {
1158 .start = CH_SPI,
1159 .end = CH_SPI,
e68d1ebc
YL		 1160 .flags = IORESOURCE_DMA,
1161 },
1162 [2] = {
1163 .start = IRQ_SPI,
1164 .end = IRQ_SPI,
c6c4d7bb
BW		 1165 .flags = IORESOURCE_IRQ,
1166 },
1167};
1168
1169static struct platform_device bfin_spi0_device = {
1170 .name = "bfin-spi",
1171 .id = 0, /* Bus number */
1172 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1173 .resource = bfin_spi0_resource,
1394f032 1174 .dev = {
c6c4d7bb 1175 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 1176 },
1177};
1178#endif /* spi master and devices */
1179
1e9aa955
CC		 1180#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1181
1182/* SPORT SPI controller data */
1183static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1184 .num_chipselect = 1, /* master only supports one device */
1185 .enable_dma = 0, /* master don't support DMA */
1186 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1187 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1188};
1189
1190static struct resource bfin_sport_spi0_resource[] = {
1191 [0] = {
1192 .start = SPORT0_TCR1,
1193 .end = SPORT0_TCR1 + 0xFF,
1194 .flags = IORESOURCE_MEM,
1195 },
1196 [1] = {
1197 .start = IRQ_SPORT0_ERROR,
1198 .end = IRQ_SPORT0_ERROR,
1199 .flags = IORESOURCE_IRQ,
1200 },
1201};
1202
1203static struct platform_device bfin_sport_spi0_device = {
1204 .name = "bfin-sport-spi",
1205 .id = 1, /* Bus number */
1206 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1207 .resource = bfin_sport_spi0_resource,
1208 .dev = {
1209 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1210 },
1211};
1212
1213static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1214 .num_chipselect = 1, /* master only supports one device */
1215 .enable_dma = 0, /* master don't support DMA */
1216 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1217 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1218};
1219
1220static struct resource bfin_sport_spi1_resource[] = {
1221 [0] = {
1222 .start = SPORT1_TCR1,
1223 .end = SPORT1_TCR1 + 0xFF,
1224 .flags = IORESOURCE_MEM,
1225 },
1226 [1] = {
1227 .start = IRQ_SPORT1_ERROR,
1228 .end = IRQ_SPORT1_ERROR,
1229 .flags = IORESOURCE_IRQ,
1230 },
1231};
1232
1233static struct platform_device bfin_sport_spi1_device = {
1234 .name = "bfin-sport-spi",
1235 .id = 2, /* Bus number */
1236 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1237 .resource = bfin_sport_spi1_resource,
1238 .dev = {
1239 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1240 },
1241};
1242
1243#endif /* sport spi master and devices */
1244
1394f032
BW		 1245#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1246static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1247 .name = "bf537-lq035",
1248};
1249#endif
1250
2043f3f7
MH		 1251#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1252#include <asm/bfin-lq035q1.h>
1253
1254static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
d94a1aa4
MH		 1255 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1256 .ppi_mode = USE_RGB565_16_BIT_PPI,
1257 .use_bl = 0, /* let something else control the LCD Blacklight */
1258 .gpio_bl = GPIO_PF7,
2043f3f7
MH		 1259};
1260
1261static struct resource bfin_lq035q1_resources[] = {
1262 {
1263 .start = IRQ_PPI_ERROR,
1264 .end = IRQ_PPI_ERROR,
1265 .flags = IORESOURCE_IRQ,
1266 },
1267};
1268
1269static struct platform_device bfin_lq035q1_device = {
1270 .name = "bfin-lq035q1",
1271 .id = -1,
d94a1aa4
MH		 1272 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1273 .resource = bfin_lq035q1_resources,
2043f3f7
MH		 1274 .dev = {
1275 .platform_data = &bfin_lq035q1_data,
1276 },
1277};
1278#endif
1279
1394f032 1280#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
233b28a9 1281#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 1282static struct resource bfin_uart0_resources[] = {
1394f032 1283 {
6bd1fbea
SZ		 1284 .start = UART0_THR,
1285 .end = UART0_GCTL+2,
1394f032 1286 .flags = IORESOURCE_MEM,
233b28a9 1287 },
6bd1fbea
SZ		 1288 {
1289 .start = IRQ_UART0_RX,
1290 .end = IRQ_UART0_RX+1,
1291 .flags = IORESOURCE_IRQ,
1292 },
1293 {
1294 .start = IRQ_UART0_ERROR,
1295 .end = IRQ_UART0_ERROR,
1296 .flags = IORESOURCE_IRQ,
1297 },
1298 {
1299 .start = CH_UART0_TX,
1300 .end = CH_UART0_TX,
1301 .flags = IORESOURCE_DMA,
1302 },
1303 {
1304 .start = CH_UART0_RX,
1305 .end = CH_UART0_RX,
1306 .flags = IORESOURCE_DMA,
1307 },
1308#ifdef CONFIG_BFIN_UART0_CTSRTS
1309 { /* CTS pin */
1310 .start = GPIO_PG7,
1311 .end = GPIO_PG7,
1312 .flags = IORESOURCE_IO,
1313 },
1314 { /* RTS pin */
1315 .start = GPIO_PG6,
1316 .end = GPIO_PG6,
1317 .flags = IORESOURCE_IO,
1318 },
1319#endif
1320};
1321
1322unsigned short bfin_uart0_peripherals[] = {
1323 P_UART0_TX, P_UART0_RX, 0
1324};
1325
1326static struct platform_device bfin_uart0_device = {
1327 .name = "bfin-uart",
1328 .id = 0,
1329 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1330 .resource = bfin_uart0_resources,
1331 .dev = {
1332 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1333 },
1334};
233b28a9
SZ		 1335#endif
1336#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 1337static struct resource bfin_uart1_resources[] = {
233b28a9 1338 {
6bd1fbea
SZ		 1339 .start = UART1_THR,
1340 .end = UART1_GCTL+2,
1394f032
BW		 1341 .flags = IORESOURCE_MEM,
1342 },
6bd1fbea
SZ		 1343 {
1344 .start = IRQ_UART1_RX,
1345 .end = IRQ_UART1_RX+1,
1346 .flags = IORESOURCE_IRQ,
1347 },
1348 {
1349 .start = IRQ_UART1_ERROR,
1350 .end = IRQ_UART1_ERROR,
1351 .flags = IORESOURCE_IRQ,
1352 },
1353 {
1354 .start = CH_UART1_TX,
1355 .end = CH_UART1_TX,
1356 .flags = IORESOURCE_DMA,
1357 },
1358 {
1359 .start = CH_UART1_RX,
1360 .end = CH_UART1_RX,
1361 .flags = IORESOURCE_DMA,
1362 },
1363};
1364
1365unsigned short bfin_uart1_peripherals[] = {
1366 P_UART1_TX, P_UART1_RX, 0
1394f032
BW		 1367};
1368
6bd1fbea 1369static struct platform_device bfin_uart1_device = {
1394f032
BW		 1370 .name = "bfin-uart",
1371 .id = 1,
6bd1fbea
SZ		 1372 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1373 .resource = bfin_uart1_resources,
1374 .dev = {
1375 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1376 },
1394f032
BW		 1377};
1378#endif
6bd1fbea 1379#endif
1394f032 1380
5be36d22 1381#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1382#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1383static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1384 {
1385 .start = 0xFFC00400,
1386 .end = 0xFFC004FF,
1387 .flags = IORESOURCE_MEM,
1388 },
42bd8bcb
GY		 1389 {
1390 .start = IRQ_UART0_RX,
1391 .end = IRQ_UART0_RX+1,
1392 .flags = IORESOURCE_IRQ,
1393 },
1394 {
1395 .start = CH_UART0_RX,
1396 .end = CH_UART0_RX+1,
1397 .flags = IORESOURCE_DMA,
1398 },
1399};
1400
1401static struct platform_device bfin_sir0_device = {
1402 .name = "bfin_sir",
1403 .id = 0,
1404 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1405 .resource = bfin_sir0_resources,
1406};
5be36d22
GY		 1407#endif
1408#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1409static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1410 {
1411 .start = 0xFFC02000,
1412 .end = 0xFFC020FF,
1413 .flags = IORESOURCE_MEM,
1414 },
42bd8bcb
GY		 1415 {
1416 .start = IRQ_UART1_RX,
1417 .end = IRQ_UART1_RX+1,
1418 .flags = IORESOURCE_IRQ,
1419 },
1420 {
1421 .start = CH_UART1_RX,
1422 .end = CH_UART1_RX+1,
1423 .flags = IORESOURCE_DMA,
1424 },
5be36d22
GY		 1425};
1426
42bd8bcb 1427static struct platform_device bfin_sir1_device = {
5be36d22 1428 .name = "bfin_sir",
42bd8bcb
GY		 1429 .id = 1,
1430 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1431 .resource = bfin_sir1_resources,
5be36d22
GY		 1432};
1433#endif
42bd8bcb 1434#endif
5be36d22 1435
1394f032 1436#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1437static struct resource bfin_twi0_resource[] = {
1438 [0] = {
1439 .start = TWI0_REGBASE,
1440 .end = TWI0_REGBASE,
1441 .flags = IORESOURCE_MEM,
1442 },
1443 [1] = {
1444 .start = IRQ_TWI,
1445 .end = IRQ_TWI,
1446 .flags = IORESOURCE_IRQ,
1447 },
1448};
1449
1394f032
BW		 1450static struct platform_device i2c_bfin_twi_device = {
1451 .name = "i2c-bfin-twi",
1452 .id = 0,
c6c4d7bb
BW		 1453 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1454 .resource = bfin_twi0_resource,
1394f032
BW		 1455};
1456#endif
1457
51ed9ad7 1458#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
51ed9ad7
MH		 1459static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1460 [0] = KEY_GRAVE,
1461 [1] = KEY_1,
1462 [2] = KEY_2,
1463 [3] = KEY_3,
1464 [4] = KEY_4,
1465 [5] = KEY_5,
1466 [6] = KEY_6,
1467 [7] = KEY_7,
1468 [8] = KEY_8,
1469 [9] = KEY_9,
1470 [10] = KEY_0,
1471 [11] = KEY_MINUS,
1472 [12] = KEY_EQUAL,
1473 [13] = KEY_BACKSLASH,
1474 [15] = KEY_KP0,
1475 [16] = KEY_Q,
1476 [17] = KEY_W,
1477 [18] = KEY_E,
1478 [19] = KEY_R,
1479 [20] = KEY_T,
1480 [21] = KEY_Y,
1481 [22] = KEY_U,
1482 [23] = KEY_I,
1483 [24] = KEY_O,
1484 [25] = KEY_P,
1485 [26] = KEY_LEFTBRACE,
1486 [27] = KEY_RIGHTBRACE,
1487 [29] = KEY_KP1,
1488 [30] = KEY_KP2,
1489 [31] = KEY_KP3,
1490 [32] = KEY_A,
1491 [33] = KEY_S,
1492 [34] = KEY_D,
1493 [35] = KEY_F,
1494 [36] = KEY_G,
1495 [37] = KEY_H,
1496 [38] = KEY_J,
1497 [39] = KEY_K,
1498 [40] = KEY_L,
1499 [41] = KEY_SEMICOLON,
1500 [42] = KEY_APOSTROPHE,
1501 [43] = KEY_BACKSLASH,
1502 [45] = KEY_KP4,
1503 [46] = KEY_KP5,
1504 [47] = KEY_KP6,
1505 [48] = KEY_102ND,
1506 [49] = KEY_Z,
1507 [50] = KEY_X,
1508 [51] = KEY_C,
1509 [52] = KEY_V,
1510 [53] = KEY_B,
1511 [54] = KEY_N,
1512 [55] = KEY_M,
1513 [56] = KEY_COMMA,
1514 [57] = KEY_DOT,
1515 [58] = KEY_SLASH,
1516 [60] = KEY_KPDOT,
1517 [61] = KEY_KP7,
1518 [62] = KEY_KP8,
1519 [63] = KEY_KP9,
1520 [64] = KEY_SPACE,
1521 [65] = KEY_BACKSPACE,
1522 [66] = KEY_TAB,
1523 [67] = KEY_KPENTER,
1524 [68] = KEY_ENTER,
1525 [69] = KEY_ESC,
1526 [70] = KEY_DELETE,
1527 [74] = KEY_KPMINUS,
1528 [76] = KEY_UP,
1529 [77] = KEY_DOWN,
1530 [78] = KEY_RIGHT,
1531 [79] = KEY_LEFT,
1532};
1533
1534static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1535 .rows = 8,
1536 .cols = 10,
1537 .keymap = adp5588_keymap,
1538 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1539 .repeat = 0,
1540};
1541#endif
1542
3ea57218
MH		 1543#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1544#include <linux/mfd/adp5520.h>
1545
1546 /*
1547 * ADP5520/5501 Backlight Data
1548 */
1549
1d23dc89
MH		 1550static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1551 .fade_in = ADP5520_FADE_T_1200ms,
1552 .fade_out = ADP5520_FADE_T_1200ms,
1553 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1554 .en_ambl_sens = 1,
1555 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1556 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1557 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1558 .l2_office_max = ADP5520_BL_CUR_mA(7),
1559 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1560 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1561 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1562 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1563 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1564 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1565 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
3ea57218
MH		 1566};
1567
1568 /*
1569 * ADP5520/5501 LEDs Data
1570 */
1571
3ea57218
MH		 1572static struct led_info adp5520_leds[] = {
1573 {
1574 .name = "adp5520-led1",
1575 .default_trigger = "none",
1d23dc89 1576 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
3ea57218
MH		 1577 },
1578#ifdef ADP5520_EN_ALL_LEDS
1579 {
1580 .name = "adp5520-led2",
1581 .default_trigger = "none",
1582 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1583 },
1584 {
1585 .name = "adp5520-led3",
1586 .default_trigger = "none",
1587 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1588 },
1589#endif
1590};
1591
1d23dc89 1592static struct adp5520_leds_platform_data adp5520_leds_data = {
3ea57218
MH		 1593 .num_leds = ARRAY_SIZE(adp5520_leds),
1594 .leds = adp5520_leds,
1d23dc89
MH		 1595 .fade_in = ADP5520_FADE_T_600ms,
1596 .fade_out = ADP5520_FADE_T_600ms,
1597 .led_on_time = ADP5520_LED_ONT_600ms,
3ea57218
MH		 1598};
1599
1600 /*
1601 * ADP5520 GPIO Data
1602 */
1603
1d23dc89 1604static struct adp5520_gpio_platform_data adp5520_gpio_data = {
3ea57218 1605 .gpio_start = 50,
1d23dc89
MH		 1606 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1607 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
3ea57218
MH		 1608};
1609
1610 /*
1611 * ADP5520 Keypad Data
1612 */
1613
3ea57218 1614static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1d23dc89
MH		 1615 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1616 [ADP5520_KEY(0, 1)] = KEY_1,
1617 [ADP5520_KEY(0, 2)] = KEY_2,
1618 [ADP5520_KEY(0, 3)] = KEY_3,
1619 [ADP5520_KEY(1, 0)] = KEY_4,
1620 [ADP5520_KEY(1, 1)] = KEY_5,
1621 [ADP5520_KEY(1, 2)] = KEY_6,
1622 [ADP5520_KEY(1, 3)] = KEY_7,
1623 [ADP5520_KEY(2, 0)] = KEY_8,
1624 [ADP5520_KEY(2, 1)] = KEY_9,
1625 [ADP5520_KEY(2, 2)] = KEY_0,
1626 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1627 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1628 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1629 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1630 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1631};
1632
1633static struct adp5520_keys_platform_data adp5520_keys_data = {
1634 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1635 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
3ea57218
MH		 1636 .keymap = adp5520_keymap,
1637 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1638 .repeat = 0,
1639};
1640
1641 /*
1642 * ADP5520/5501 Multifuction Device Init Data
1643 */
1644
3ea57218 1645static struct adp5520_platform_data adp5520_pdev_data = {
1d23dc89
MH		 1646 .backlight = &adp5520_backlight_data,
1647 .leds = &adp5520_leds_data,
1648 .gpio = &adp5520_gpio_data,
1649 .keys = &adp5520_keys_data,
3ea57218
MH		 1650};
1651
1652#endif
1653
ba877d44 1654#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1d23dc89 1655static struct adp5588_gpio_platform_data adp5588_gpio_data = {
ba877d44
MH		 1656 .gpio_start = 50,
1657 .pullup_dis_mask = 0,
1658};
1659#endif
1660
78756c62
MH		 1661#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1662#include <linux/i2c/adp8870.h>
1663static struct led_info adp8870_leds[] = {
1664 {
1665 .name = "adp8870-led7",
1666 .default_trigger = "none",
1667 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1668 },
1669};
1670
1671
1672static struct adp8870_backlight_platform_data adp8870_pdata = {
1673 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1674 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1675 .pwm_assign = 0, /* 1 = Enables PWM mode */
1676
1677 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1678 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1679 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1680
1681 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1682 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1683
1684 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1685 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1686 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1687 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1688 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1689 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1690 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1691 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1692 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1693 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1694
1695 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1696 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1697 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1698 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1699 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1700 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1701 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1702 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1703
1704 .leds = adp8870_leds,
1705 .num_leds = ARRAY_SIZE(adp8870_leds),
1706 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1707 .led_fade_in = ADP8870_FADE_T_600ms,
1708 .led_fade_out = ADP8870_FADE_T_600ms,
1709 .led_on_time = ADP8870_LED_ONT_200ms,
1710};
1711#endif
1712
72fa2e92
MH		 1713#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1714#include <linux/i2c/adp8860.h>
1715static struct led_info adp8860_leds[] = {
1716 {
1717 .name = "adp8860-led7",
1718 .default_trigger = "none",
1719 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
1720 },
1721};
1722
1723static struct adp8860_backlight_platform_data adp8860_pdata = {
1724 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
1725 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
1726
1727 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
1728 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1729 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1730
1731 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1732 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1733
1734 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1735 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1736 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1737 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1738 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1739 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1740
1741 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1742 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1743 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1744 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1745
1746 .leds = adp8860_leds,
1747 .num_leds = ARRAY_SIZE(adp8860_leds),
1748 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1749 .led_fade_in = ADP8860_FADE_T_600ms,
1750 .led_fade_out = ADP8860_FADE_T_600ms,
1751 .led_on_time = ADP8860_LED_ONT_200ms,
1752};
1753#endif
1754
f32792d0
SZ		 1755#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1756static struct regulator_consumer_supply ad5398_consumer = {
1757 .supply = "current",
1758};
1759
1760static struct regulator_init_data ad5398_regulator_data = {
1761 .constraints = {
1762 .name = "current range",
1763 .max_uA = 120000,
1764 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
1765 },
1766 .num_consumer_supplies = 1,
1767 .consumer_supplies = &ad5398_consumer,
1768};
1769
1770static struct ad5398_platform_data ad5398_i2c_platform_data = {
1771 .current_bits = 10,
1772 .current_offset = 4,
1773 .regulator_data = &ad5398_regulator_data,
1774};
1775
1776#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
1777 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
1778static struct platform_device ad5398_virt_consumer_device = {
1779 .name = "reg-virt-consumer",
1780 .id = 0,
1781 .dev = {
1782 .platform_data = "current", /* Passed to driver */
1783 },
1784};
1785#endif
1786#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
1787 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
1788static struct regulator_bulk_data ad5398_bulk_data = {
1789 .supply = "current",
1790};
1791
1792static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
1793 .name = "ad5398",
1794 .num_supplies = 1,
1795 .supplies = &ad5398_bulk_data,
1796};
1797
1798static struct platform_device ad5398_userspace_consumer_device = {
1799 .name = "reg-userspace-consumer",
1800 .id = 0,
1801 .dev = {
1802 .platform_data = &ad5398_userspace_comsumer_data,
1803 },
1804};
1805#endif
1806#endif
1807
81d9c7f2 1808static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
5b7c5775 1809#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
81d9c7f2 1810 {
427f277e 1811 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1812 .irq = IRQ_PG5,
5b7c5775 1813 .platform_data = (void *)&ad7142_i2c_platform_data,
81d9c7f2
BW		 1814 },
1815#endif
ad6720c0
BS		 1816
1817#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
1818 {
1819 I2C_BOARD_INFO("ad7150", 0x48),
1820 .irq = IRQ_PG5, /* fixme: use real interrupt number */
1821 },
1822#endif
1823
1824#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
1825 {
1826 I2C_BOARD_INFO("ad7152", 0x48),
1827 },
1828#endif
1829
1830#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
1831 {
1832 I2C_BOARD_INFO("ad774x", 0x48),
1833 },
1834#endif
1835
5f022594
SZ		 1836#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
1837 {
1838 I2C_BOARD_INFO("ad7414", 0x9),
1839 .irq = IRQ_PG5,
1840 /*
1841 * platform_data pointer is borrwoed by the driver to
1842 * store custimer defined IRQ ALART level mode.
1843 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
1844 */
1845 .platform_data = (void *)IRQF_TRIGGER_LOW,
1846 },
1847#endif
1848
ef8873e0
SZ		 1849#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
1850 {
1851 I2C_BOARD_INFO("ad7417", 0xb),
1852 .irq = IRQ_PG5,
1853 /*
1854 * platform_data pointer is borrwoed by the driver to
1855 * store custimer defined IRQ ALART level mode.
1856 * only IRQF_TRIGGER_HIGH and IRQF_TRIGGER_LOW are valid.
1857 */
1858 .platform_data = (void *)IRQF_TRIGGER_LOW,
1859 },
1860#endif
1861
ebd58333 1862#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1863 {
1864 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1865 },
1866#endif
204844eb 1867#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1868 {
1869 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1870 .irq = IRQ_PG6,
1871 },
1872#endif
1873#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1874 {
1875 I2C_BOARD_INFO("ad7879", 0x2F),
1876 .irq = IRQ_PG5,
1877 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1878 },
1879#endif
51ed9ad7
MH		 1880#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1881 {
1882 I2C_BOARD_INFO("adp5588-keys", 0x34),
1883 .irq = IRQ_PG0,
1884 .platform_data = (void *)&adp5588_kpad_data,
1885 },
1886#endif
3ea57218
MH		 1887#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1888 {
1889 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1890 .irq = IRQ_PG0,
3ea57218
MH		 1891 .platform_data = (void *)&adp5520_pdev_data,
1892 },
1893#endif
ffc4d8bc
MH		 1894#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1895 {
1896 I2C_BOARD_INFO("adxl34x", 0x53),
1897 .irq = IRQ_PG3,
1898 .platform_data = (void *)&adxl34x_info,
1899 },
1900#endif
ba877d44
MH		 1901#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1902 {
1903 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1904 .platform_data = (void *)&adp5588_gpio_data,
1905 },
1906#endif
50c4c086
MH		 1907#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1908 {
1909 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1910 },
1911#endif
ddcd7cb8
MH		 1912#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1913 {
1914 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1915 },
1916#endif
78756c62
MH		 1917#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1918 {
1919 I2C_BOARD_INFO("adp8870", 0x2B),
1920 .platform_data = (void *)&adp8870_pdata,
1921 },
1922#endif
d53127ff
CC		 1923#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1924 {
1925 I2C_BOARD_INFO("adau1371", 0x1A),
1926 },
1927#endif
04267638
CC		 1928#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1929 {
1930 I2C_BOARD_INFO("adau1761", 0x38),
1931 },
1932#endif
c48d7675
CC		 1933#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
1934 {
1935 I2C_BOARD_INFO("adau1361", 0x38),
1936 },
1937#endif
1f13f2fd
MH		 1938#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1939 {
1940 I2C_BOARD_INFO("ad5258", 0x18),
1941 },
1942#endif
29bb3bc0
CC		 1943#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1944 {
1945 I2C_BOARD_INFO("ssm2602", 0x1b),
1946 },
1947#endif
f32792d0
SZ		 1948#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
1949 {
1950 I2C_BOARD_INFO("ad5398", 0xC),
1951 .platform_data = (void *)&ad5398_i2c_platform_data,
1952 },
1953#endif
72fa2e92
MH		 1954#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1955 {
1956 I2C_BOARD_INFO("adp8860", 0x2A),
1957 .platform_data = (void *)&adp8860_pdata,
1958 },
1959#endif
81d9c7f2 1960};
81d9c7f2 1961
1394f032 1962#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 1963#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1964static struct resource bfin_sport0_uart_resources[] = {
1965 {
1966 .start = SPORT0_TCR1,
1967 .end = SPORT0_MRCS3+4,
1968 .flags = IORESOURCE_MEM,
1969 },
1970 {
1971 .start = IRQ_SPORT0_RX,
1972 .end = IRQ_SPORT0_RX+1,
1973 .flags = IORESOURCE_IRQ,
1974 },
1975 {
1976 .start = IRQ_SPORT0_ERROR,
1977 .end = IRQ_SPORT0_ERROR,
1978 .flags = IORESOURCE_IRQ,
1979 },
1980};
1981
1982unsigned short bfin_sport0_peripherals[] = {
1983 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1984 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1985};
1986
1394f032
BW		 1987static struct platform_device bfin_sport0_uart_device = {
1988 .name = "bfin-sport-uart",
1989 .id = 0,
df5de261
SZ		 1990 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1991 .resource = bfin_sport0_uart_resources,
1992 .dev = {
1993 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1994 },
1995};
1996#endif
1997#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1998static struct resource bfin_sport1_uart_resources[] = {
1999 {
2000 .start = SPORT1_TCR1,
2001 .end = SPORT1_MRCS3+4,
2002 .flags = IORESOURCE_MEM,
2003 },
2004 {
2005 .start = IRQ_SPORT1_RX,
2006 .end = IRQ_SPORT1_RX+1,
2007 .flags = IORESOURCE_IRQ,
2008 },
2009 {
2010 .start = IRQ_SPORT1_ERROR,
2011 .end = IRQ_SPORT1_ERROR,
2012 .flags = IORESOURCE_IRQ,
2013 },
2014};
2015
2016unsigned short bfin_sport1_peripherals[] = {
2017 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2018 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
1394f032
BW		 2019};
2020
2021static struct platform_device bfin_sport1_uart_device = {
2022 .name = "bfin-sport-uart",
2023 .id = 1,
df5de261
SZ		 2024 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2025 .resource = bfin_sport1_uart_resources,
2026 .dev = {
2027 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2028 },
1394f032
BW		 2029};
2030#endif
df5de261 2031#endif
1394f032 2032
c6c4d7bb 2033#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 2034#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2035/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 2036
2c8beb2c
MH		 2037#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2038#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 2039static struct pata_platform_info bfin_pata_platform_data = {
2040 .ioport_shift = 1,
64e5c512 2041 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 2042};
2043
2044static struct resource bfin_pata_resources[] = {
2045 {
2046 .start = 0x20314020,
2047 .end = 0x2031403F,
2048 .flags = IORESOURCE_MEM,
2049 },
2050 {
2051 .start = 0x2031401C,
2052 .end = 0x2031401F,
2053 .flags = IORESOURCE_MEM,
2054 },
2055 {
2056 .start = PATA_INT,
2057 .end = PATA_INT,
2058 .flags = IORESOURCE_IRQ,
2059 },
2060};
2c8beb2c
MH		 2061#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2062static struct pata_platform_info bfin_pata_platform_data = {
2063 .ioport_shift = 0,
2064};
648882d9
MH		 2065/* CompactFlash Storage Card Memory Mapped Adressing
2066 * /REG = A11 = 1
2067 */
2c8beb2c
MH		 2068static struct resource bfin_pata_resources[] = {
2069 {
648882d9
MH		 2070 .start = 0x20211800,
2071 .end = 0x20211807,
2c8beb2c
MH		 2072 .flags = IORESOURCE_MEM,
2073 },
2074 {
648882d9
MH		 2075 .start = 0x2021180E, /* Device Ctl */
2076 .end = 0x2021180E,
2c8beb2c
MH		 2077 .flags = IORESOURCE_MEM,
2078 },
2079};
2080#endif
c6c4d7bb
BW		 2081
2082static struct platform_device bfin_pata_device = {
2083 .name = "pata_platform",
2084 .id = -1,
2085 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2086 .resource = bfin_pata_resources,
2087 .dev = {
2088 .platform_data = &bfin_pata_platform_data,
2089 }
2090};
2091#endif
2092
14b03204
MH		 2093static const unsigned int cclk_vlev_datasheet[] =
2094{
2095 VRPAIR(VLEV_085, 250000000),
2096 VRPAIR(VLEV_090, 376000000),
2097 VRPAIR(VLEV_095, 426000000),
2098 VRPAIR(VLEV_100, 426000000),
2099 VRPAIR(VLEV_105, 476000000),
2100 VRPAIR(VLEV_110, 476000000),
2101 VRPAIR(VLEV_115, 476000000),
2102 VRPAIR(VLEV_120, 500000000),
2103 VRPAIR(VLEV_125, 533000000),
2104 VRPAIR(VLEV_130, 600000000),
2105};
2106
2107static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2108 .tuple_tab = cclk_vlev_datasheet,
2109 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2110 .vr_settling_time = 25 /* us */,
2111};
2112
2113static struct platform_device bfin_dpmc = {
2114 .name = "bfin dpmc",
2115 .dev = {
2116 .platform_data = &bfin_dmpc_vreg_data,
2117 },
2118};
2119
336746ed
BS		 2120#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2121static struct platform_device bfin_i2s = {
2122 .name = "bfin-i2s",
2123 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2124 /* TODO: add platform data here */
2125};
2126#endif
2127
8312440e
BS		 2128#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2129static struct platform_device bfin_tdm = {
2130 .name = "bfin-tdm",
336746ed
BS		 2131 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2132 /* TODO: add platform data here */
2133};
2134#endif
2135
2136#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2137static struct platform_device bfin_ac97 = {
2138 .name = "bfin-ac97",
2139 .id = CONFIG_SND_BF5XX_SPORT_NUM,
8312440e
BS		 2140 /* TODO: add platform data here */
2141};
2142#endif
2143
f8e6dbff
SZ		 2144#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2145#define REGULATOR_ADP122 "adp122"
2146#define REGULATOR_ADP150 "adp150"
2147
2148static struct regulator_consumer_supply adp122_consumers = {
2149 .supply = REGULATOR_ADP122,
2150};
2151
2152static struct regulator_consumer_supply adp150_consumers = {
2153 .supply = REGULATOR_ADP150,
2154};
2155
2156static struct regulator_init_data adp_switch_regulator_data[] = {
2157 {
2158 .constraints = {
2159 .name = REGULATOR_ADP122,
2160 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
5f022594
SZ		 2161 .min_uA = 0,
2162 .max_uA = 300000,
f8e6dbff
SZ		 2163 },
2164 .num_consumer_supplies = 1, /* only 1 */
2165 .consumer_supplies = &adp122_consumers,
2166 .driver_data = (void *)GPIO_PF2, /* gpio port only */
2167 },
2168 {
2169 .constraints = {
2170 .name = REGULATOR_ADP150,
2171 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
5f022594
SZ		 2172 .min_uA = 0,
2173 .max_uA = 150000,
f8e6dbff
SZ		 2174 },
2175 .num_consumer_supplies = 1, /* only 1 */
2176 .consumer_supplies = &adp150_consumers,
2177 .driver_data = (void *)GPIO_PF3, /* gpio port only */
2178 },
2179};
2180
2181static struct adp_switch_platform_data adp_switch_pdata = {
2182 .regulator_num = ARRAY_SIZE(adp_switch_regulator_data),
2183 .regulator_data = adp_switch_regulator_data,
2184};
2185
2186static struct platform_device adp_switch_device = {
2187 .name = "adp_switch",
2188 .id = 0,
2189 .dev = {
2190 .platform_data = &adp_switch_pdata,
2191 },
2192};
2193
2194#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2195 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2196static struct regulator_bulk_data adp122_bulk_data = {
2197 .supply = REGULATOR_ADP122,
2198};
2199
2200static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2201 .name = REGULATOR_ADP122,
2202 .num_supplies = 1,
2203 .supplies = &adp122_bulk_data,
2204};
2205
2206static struct platform_device adp122_userspace_consumer_device = {
2207 .name = "reg-userspace-consumer",
2208 .id = 0,
2209 .dev = {
2210 .platform_data = &adp122_userspace_comsumer_data,
2211 },
2212};
2213
2214static struct regulator_bulk_data adp150_bulk_data = {
2215 .supply = REGULATOR_ADP150,
2216};
2217
2218static struct regulator_userspace_consumer_data adp150_userspace_comsumer_data = {
2219 .name = REGULATOR_ADP150,
2220 .num_supplies = 1,
2221 .supplies = &adp150_bulk_data,
2222};
2223
2224static struct platform_device adp150_userspace_consumer_device = {
2225 .name = "reg-userspace-consumer",
2226 .id = 1,
2227 .dev = {
2228 .platform_data = &adp150_userspace_comsumer_data,
2229 },
2230};
2231#endif
2232#endif
2233
2234
1394f032 2235static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 2236
2237 &bfin_dpmc,
2238
1394f032
BW		 2239#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2240 &bfin_pcmcia_cf_device,
2241#endif
2242
2243#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2244 &rtc_device,
2245#endif
2246
2247#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2248 &sl811_hcd_device,
2249#endif
2250
2251#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2252 &isp1362_hcd_device,
2253#endif
2254
3f375690
MH		 2255#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2256 &bfin_isp1760_device,
2257#endif
2258
1394f032
BW		 2259#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2260 &smc91x_device,
2261#endif
2262
f40d24d9
AL		 2263#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2264 &dm9000_device,
2265#endif
2266
706a01b1
BS		 2267#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2268 &bfin_can_device,
2269#endif
2270
1394f032 2271#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 2272 &bfin_mii_bus,
1394f032
BW		 2273 &bfin_mac_device,
2274#endif
2275
2276#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2277 &net2272_bfin_device,
2278#endif
2279
2280#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 2281 &bfin_spi0_device,
1394f032
BW		 2282#endif
2283
1e9aa955
CC		 2284#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2285 &bfin_sport_spi0_device,
2286 &bfin_sport_spi1_device,
2287#endif
2288
1394f032
BW		 2289#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2290 &bfin_fb_device,
2291#endif
2292
2043f3f7
MH		 2293#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2294 &bfin_lq035q1_device,
2295#endif
2296
1394f032 2297#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 2298#ifdef CONFIG_SERIAL_BFIN_UART0
2299 &bfin_uart0_device,
2300#endif
2301#ifdef CONFIG_SERIAL_BFIN_UART1
2302 &bfin_uart1_device,
2303#endif
1394f032
BW		 2304#endif
2305
5be36d22 2306#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 2307#ifdef CONFIG_BFIN_SIR0
2308 &bfin_sir0_device,
2309#endif
2310#ifdef CONFIG_BFIN_SIR1
2311 &bfin_sir1_device,
2312#endif
5be36d22
GY		 2313#endif
2314
1394f032
BW		 2315#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2316 &i2c_bfin_twi_device,
2317#endif
2318
2319#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 2320#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1394f032 2321 &bfin_sport0_uart_device,
df5de261
SZ		 2322#endif
2323#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1394f032
BW		 2324 &bfin_sport1_uart_device,
2325#endif
df5de261 2326#endif
c6c4d7bb
BW		 2327
2328#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2329 &bfin_pata_device,
2330#endif
2463ef22
MH		 2331
2332#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2333 &bfin_device_gpiokeys,
2334#endif
cad2ab65 2335
fc68911e
MF		 2336#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2337 &bfin_async_nand_device,
2338#endif
2339
793dc27b 2340#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 2341 &stamp_flash_device,
793dc27b 2342#endif
8312440e 2343
336746ed
BS		 2344#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2345 &bfin_i2s,
2346#endif
2347
8312440e
BS		 2348#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2349 &bfin_tdm,
2350#endif
336746ed
BS		 2351
2352#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2353 &bfin_ac97,
2354#endif
f32792d0
SZ		 2355#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2356#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2357 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2358 &ad5398_virt_consumer_device,
2359#endif
2360#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2361 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2362 &ad5398_userspace_consumer_device,
2363#endif
2364#endif
f8e6dbff
SZ		 2365
2366#if defined(CONFIG_REGULATOR_ADP_SWITCH) || defined(CONFIG_REGULATOR_ADP_SWITCH_MODULE)
2367 &adp_switch_device,
2368#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2369 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2370 &adp122_userspace_consumer_device,
2371 &adp150_userspace_consumer_device,
2372#endif
2373#endif
1394f032
BW		 2374};
2375
2376static int __init stamp_init(void)
2377{
b85d858b 2378 printk(KERN_INFO "%s(): registering device resources\n", __func__);
fc68911e 2379 bfin_plat_nand_init();
0531c467 2380 adf702x_mac_init();
1394f032 2381 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
df5de261
SZ		 2382 i2c_register_board_info(0, bfin_i2c_board_info,
2383 ARRAY_SIZE(bfin_i2c_board_info));
5bda2723 2384 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 2385
1394f032
BW		 2386 return 0;
2387}
2388
2389arch_initcall(stamp_init);
c6c4d7bb 2390
c13ce9fd
SZ		 2391
2392static struct platform_device *stamp_early_devices[] __initdata = {
2393#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2394#ifdef CONFIG_SERIAL_BFIN_UART0
2395 &bfin_uart0_device,
2396#endif
2397#ifdef CONFIG_SERIAL_BFIN_UART1
2398 &bfin_uart1_device,
2399#endif
2400#endif
2401
2402#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2403#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2404 &bfin_sport0_uart_device,
2405#endif
2406#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2407 &bfin_sport1_uart_device,
2408#endif
2409#endif
2410};
2411
2412void __init native_machine_early_platform_add_devices(void)
2413{
2414 printk(KERN_INFO "register early platform devices\n");
2415 early_platform_add_devices(stamp_early_devices,
2416 ARRAY_SIZE(stamp_early_devices));
2417}
2418
c6c4d7bb
BW		 2419void native_machine_restart(char *cmd)
2420{
2421 /* workaround reboot hang when booting from SPI */
2422 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 2423 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 2424}
137b1529
MF		 2425
2426/*
2427 * Currently the MAC address is saved in Flash by U-Boot
2428 */
2429#define FLASH_MAC 0x203f0000
9862cc52 2430void bfin_get_ether_addr(char *addr)
137b1529
MF		 2431{
2432 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2433 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2434}
9862cc52 2435EXPORT_SYMBOL(bfin_get_ether_addr);
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