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Blackfin: move on-chip UART resources to boards files
[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / stamp.c
CommitLineData
1394f032 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
1394f032 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
1394f032
BW		 7 */
8
9#include <linux/device.h>
fc68911e 10#include <linux/kernel.h>
1394f032 11#include <linux/platform_device.h>
6e364755 12#include <linux/io.h>
1394f032 13#include <linux/mtd/mtd.h>
fc68911e 14#include <linux/mtd/nand.h>
1394f032 15#include <linux/mtd/partitions.h>
fc68911e 16#include <linux/mtd/plat-ram.h>
de8c43f2 17#include <linux/mtd/physmap.h>
1394f032
BW		 18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 21#include <linux/usb/isp1362.h>
1394f032 22#endif
0a87e3e9 23#include <linux/ata_platform.h>
1394f032
BW		 24#include <linux/irq.h>
25#include <linux/interrupt.h>
81d9c7f2 26#include <linux/i2c.h>
27f5d75a 27#include <linux/usb/sl811.h>
f79ea4cb 28#include <linux/spi/mmc_spi.h>
78756c62
MH		 29#include <linux/leds.h>
30#include <linux/input.h>
c6c4d7bb 31#include <asm/dma.h>
1f83b8f1 32#include <asm/bfin5xx_spi.h>
c6c4d7bb 33#include <asm/reboot.h>
5d448dd5 34#include <asm/portmux.h>
14b03204 35#include <asm/dpmc.h>
1394f032
BW		 36
37/*
38 * Name the Board for the /proc/cpuinfo
39 */
fe85cad2 40const char bfin_board_name[] = "ADI BF537-STAMP";
1394f032
BW		 41
42/*
43 * Driver needs to know address, irq and flag pin.
44 */
45
1394f032 46#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 47#include <linux/usb/isp1760.h>
48static struct resource bfin_isp1760_resources[] = {
1394f032 49 [0] = {
3f375690
MH		 50 .start = 0x203C0000,
51 .end = 0x203C0000 + 0x000fffff,
1394f032
BW		 52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
3f375690
MH		 55 .start = IRQ_PF7,
56 .end = IRQ_PF7,
6a6be3d1 57 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1394f032
BW		 58 },
59};
60
3f375690
MH		 61static struct isp1760_platform_data isp1760_priv = {
62 .is_isp1761 = 0,
3f375690
MH		 63 .bus_width_16 = 1,
64 .port1_otg = 0,
65 .analog_oc = 0,
66 .dack_polarity_high = 0,
67 .dreq_polarity_high = 0,
1394f032
BW		 68};
69
3f375690 70static struct platform_device bfin_isp1760_device = {
c6feb768 71 .name = "isp1760",
3f375690
MH		 72 .id = 0,
73 .dev = {
74 .platform_data = &isp1760_priv,
75 },
76 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
77 .resource = bfin_isp1760_resources,
1394f032 78};
1394f032
BW		 79#endif
80
2463ef22 81#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2463ef22
MH		 82#include <linux/gpio_keys.h>
83
84static struct gpio_keys_button bfin_gpio_keys_table[] = {
85 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
86 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
87 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
88 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
89};
90
91static struct gpio_keys_platform_data bfin_gpio_keys_data = {
92 .buttons = bfin_gpio_keys_table,
93 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
94};
95
96static struct platform_device bfin_device_gpiokeys = {
97 .name = "gpio-keys",
98 .dev = {
99 .platform_data = &bfin_gpio_keys_data,
100 },
101};
102#endif
103
1394f032
BW		 104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
105static struct resource bfin_pcmcia_cf_resources[] = {
106 {
107 .start = 0x20310000, /* IO PORT */
108 .end = 0x20312000,
109 .flags = IORESOURCE_MEM,
1f83b8f1 110 }, {
d2d50aa9 111 .start = 0x20311000, /* Attribute Memory */
1394f032
BW		 112 .end = 0x20311FFF,
113 .flags = IORESOURCE_MEM,
1f83b8f1 114 }, {
1394f032
BW		 115 .start = IRQ_PF4,
116 .end = IRQ_PF4,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1 118 }, {
1394f032
BW		 119 .start = 6, /* Card Detect PF6 */
120 .end = 6,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct platform_device bfin_pcmcia_cf_device = {
126 .name = "bfin_cf_pcmcia",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
129 .resource = bfin_pcmcia_cf_resources,
130};
131#endif
132
133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
134static struct platform_device rtc_device = {
135 .name = "rtc-bfin",
136 .id = -1,
137};
138#endif
139
140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 141#include <linux/smc91x.h>
142
143static struct smc91x_platdata smc91x_info = {
144 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
145 .leda = RPC_LED_100_10,
146 .ledb = RPC_LED_TX_RX,
147};
148
1394f032
BW		 149static struct resource smc91x_resources[] = {
150 {
151 .name = "smc91x-regs",
152 .start = 0x20300300,
153 .end = 0x20300300 + 16,
154 .flags = IORESOURCE_MEM,
1f83b8f1 155 }, {
1394f032
BW		 156
157 .start = IRQ_PF7,
158 .end = IRQ_PF7,
159 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
160 },
161};
162static struct platform_device smc91x_device = {
163 .name = "smc91x",
164 .id = 0,
165 .num_resources = ARRAY_SIZE(smc91x_resources),
166 .resource = smc91x_resources,
61f09b5a
MH		 167 .dev = {
168 .platform_data = &smc91x_info,
169 },
1394f032
BW		 170};
171#endif
172
f40d24d9
AL		 173#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
174static struct resource dm9000_resources[] = {
175 [0] = {
176 .start = 0x203FB800,
b3dec4a4 177 .end = 0x203FB800 + 1,
f40d24d9
AL		 178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
b3dec4a4
BS		 181 .start = 0x203FB804,
182 .end = 0x203FB804 + 1,
183 .flags = IORESOURCE_MEM,
184 },
185 [2] = {
f40d24d9
AL		 186 .start = IRQ_PF9,
187 .end = IRQ_PF9,
188 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
189 },
190};
191
192static struct platform_device dm9000_device = {
193 .name = "dm9000",
194 .id = -1,
195 .num_resources = ARRAY_SIZE(dm9000_resources),
196 .resource = dm9000_resources,
197};
198#endif
199
1394f032
BW		 200#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
201static struct resource sl811_hcd_resources[] = {
202 {
203 .start = 0x20340000,
204 .end = 0x20340000,
205 .flags = IORESOURCE_MEM,
1f83b8f1 206 }, {
1394f032
BW		 207 .start = 0x20340004,
208 .end = 0x20340004,
209 .flags = IORESOURCE_MEM,
1f83b8f1 210 }, {
1394f032
BW		 211 .start = CONFIG_USB_SL811_BFIN_IRQ,
212 .end = CONFIG_USB_SL811_BFIN_IRQ,
213 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
214 },
215};
216
217#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
218void sl811_port_power(struct device *dev, int is_on)
219{
c6c4d7bb 220 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 221 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032
BW		 222}
223#endif
224
225static struct sl811_platform_data sl811_priv = {
226 .potpg = 10,
227 .power = 250, /* == 500mA */
228#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
229 .port_power = &sl811_port_power,
230#endif
231};
232
233static struct platform_device sl811_hcd_device = {
234 .name = "sl811-hcd",
235 .id = 0,
236 .dev = {
237 .platform_data = &sl811_priv,
238 },
239 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
240 .resource = sl811_hcd_resources,
241};
242#endif
243
244#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
245static struct resource isp1362_hcd_resources[] = {
246 {
247 .start = 0x20360000,
248 .end = 0x20360000,
249 .flags = IORESOURCE_MEM,
1f83b8f1 250 }, {
1394f032
BW		 251 .start = 0x20360004,
252 .end = 0x20360004,
253 .flags = IORESOURCE_MEM,
1f83b8f1 254 }, {
21b03cfe
MF		 255 .start = IRQ_PF3,
256 .end = IRQ_PF3,
1394f032
BW		 257 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
258 },
259};
260
261static struct isp1362_platform_data isp1362_priv = {
262 .sel15Kres = 1,
263 .clknotstop = 0,
264 .oc_enable = 0,
265 .int_act_high = 0,
266 .int_edge_triggered = 0,
267 .remote_wakeup_connected = 0,
268 .no_power_switching = 1,
269 .power_switching_mode = 0,
270};
271
272static struct platform_device isp1362_hcd_device = {
273 .name = "isp1362-hcd",
274 .id = 0,
275 .dev = {
276 .platform_data = &isp1362_priv,
277 },
278 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
279 .resource = isp1362_hcd_resources,
280};
281#endif
282
706a01b1
BS		 283#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
284unsigned short bfin_can_peripherals[] = {
285 P_CAN0_RX, P_CAN0_TX, 0
286};
287
288static struct resource bfin_can_resources[] = {
289 {
290 .start = 0xFFC02A00,
291 .end = 0xFFC02FFF,
292 .flags = IORESOURCE_MEM,
293 },
294 {
295 .start = IRQ_CAN_RX,
296 .end = IRQ_CAN_RX,
297 .flags = IORESOURCE_IRQ,
298 },
299 {
300 .start = IRQ_CAN_TX,
301 .end = IRQ_CAN_TX,
302 .flags = IORESOURCE_IRQ,
303 },
304 {
305 .start = IRQ_CAN_ERROR,
306 .end = IRQ_CAN_ERROR,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct platform_device bfin_can_device = {
312 .name = "bfin_can",
313 .num_resources = ARRAY_SIZE(bfin_can_resources),
314 .resource = bfin_can_resources,
315 .dev = {
316 .platform_data = &bfin_can_peripherals, /* Passed to driver */
317 },
318};
319#endif
320
1394f032 321#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 322static struct platform_device bfin_mii_bus = {
323 .name = "bfin_mii_bus",
324};
325
1394f032
BW		 326static struct platform_device bfin_mac_device = {
327 .name = "bfin_mac",
65319628 328 .dev.platform_data = &bfin_mii_bus,
1394f032
BW		 329};
330#endif
331
332#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
333static struct resource net2272_bfin_resources[] = {
334 {
335 .start = 0x20300000,
336 .end = 0x20300000 + 0x100,
337 .flags = IORESOURCE_MEM,
1f83b8f1 338 }, {
1394f032
BW		 339 .start = IRQ_PF7,
340 .end = IRQ_PF7,
341 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
342 },
343};
344
345static struct platform_device net2272_bfin_device = {
346 .name = "net2272",
347 .id = -1,
348 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
349 .resource = net2272_bfin_resources,
350};
351#endif
352
fc68911e
MF		 353#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
354#ifdef CONFIG_MTD_PARTITIONS
355const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
356
357static struct mtd_partition bfin_plat_nand_partitions[] = {
358 {
aa582977 359 .name = "linux kernel(nand)",
fc68911e
MF		 360 .size = 0x400000,
361 .offset = 0,
362 }, {
aa582977 363 .name = "file system(nand)",
fc68911e
MF		 364 .size = MTDPART_SIZ_FULL,
365 .offset = MTDPART_OFS_APPEND,
366 },
367};
368#endif
369
370#define BFIN_NAND_PLAT_CLE 2
371#define BFIN_NAND_PLAT_ALE 1
372static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
373{
374 struct nand_chip *this = mtd->priv;
375
376 if (cmd == NAND_CMD_NONE)
377 return;
378
379 if (ctrl & NAND_CLE)
380 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
381 else
382 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
383}
384
385#define BFIN_NAND_PLAT_READY GPIO_PF3
386static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
387{
388 return gpio_get_value(BFIN_NAND_PLAT_READY);
389}
390
391static struct platform_nand_data bfin_plat_nand_data = {
392 .chip = {
393 .chip_delay = 30,
394#ifdef CONFIG_MTD_PARTITIONS
395 .part_probe_types = part_probes,
396 .partitions = bfin_plat_nand_partitions,
397 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
398#endif
399 },
400 .ctrl = {
401 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
402 .dev_ready = bfin_plat_nand_dev_ready,
403 },
404};
405
406#define MAX(x, y) (x > y ? x : y)
407static struct resource bfin_plat_nand_resources = {
408 .start = 0x20212000,
409 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
410 .flags = IORESOURCE_IO,
411};
412
413static struct platform_device bfin_async_nand_device = {
414 .name = "gen_nand",
415 .id = -1,
416 .num_resources = 1,
417 .resource = &bfin_plat_nand_resources,
418 .dev = {
419 .platform_data = &bfin_plat_nand_data,
420 },
421};
422
423static void bfin_plat_nand_init(void)
424{
425 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
426}
427#else
428static void bfin_plat_nand_init(void) {}
429#endif
430
793dc27b 431#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2
MF		 432static struct mtd_partition stamp_partitions[] = {
433 {
aa582977 434 .name = "bootloader(nor)",
edf05641 435 .size = 0x40000,
de8c43f2
MF		 436 .offset = 0,
437 }, {
aa582977 438 .name = "linux kernel(nor)",
6ecb5b6d 439 .size = 0x180000,
de8c43f2
MF		 440 .offset = MTDPART_OFS_APPEND,
441 }, {
aa582977 442 .name = "file system(nor)",
6ecb5b6d 443 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
de8c43f2
MF		 444 .offset = MTDPART_OFS_APPEND,
445 }, {
aa582977 446 .name = "MAC Address(nor)",
de8c43f2
MF		 447 .size = MTDPART_SIZ_FULL,
448 .offset = 0x3F0000,
449 .mask_flags = MTD_WRITEABLE,
450 }
451};
452
453static struct physmap_flash_data stamp_flash_data = {
454 .width = 2,
455 .parts = stamp_partitions,
456 .nr_parts = ARRAY_SIZE(stamp_partitions),
457};
458
459static struct resource stamp_flash_resource = {
460 .start = 0x20000000,
461 .end = 0x203fffff,
462 .flags = IORESOURCE_MEM,
463};
464
465static struct platform_device stamp_flash_device = {
466 .name = "physmap-flash",
467 .id = 0,
468 .dev = {
469 .platform_data = &stamp_flash_data,
470 },
471 .num_resources = 1,
472 .resource = &stamp_flash_resource,
473};
793dc27b 474#endif
de8c43f2 475
1394f032
BW		 476#if defined(CONFIG_MTD_M25P80) \
477 || defined(CONFIG_MTD_M25P80_MODULE)
478static struct mtd_partition bfin_spi_flash_partitions[] = {
479 {
aa582977 480 .name = "bootloader(spi)",
edf05641 481 .size = 0x00040000,
1394f032
BW		 482 .offset = 0,
483 .mask_flags = MTD_CAP_ROM
1f83b8f1 484 }, {
aa582977 485 .name = "linux kernel(spi)",
6ecb5b6d 486 .size = 0x180000,
edf05641 487 .offset = MTDPART_OFS_APPEND,
1f83b8f1 488 }, {
aa582977 489 .name = "file system(spi)",
edf05641
MF		 490 .size = MTDPART_SIZ_FULL,
491 .offset = MTDPART_OFS_APPEND,
1394f032
BW		 492 }
493};
494
495static struct flash_platform_data bfin_spi_flash_data = {
496 .name = "m25p80",
497 .parts = bfin_spi_flash_partitions,
498 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
88a8078b 499 /* .type = "m25p64", */
1394f032
BW		 500};
501
502/* SPI flash chip (m25p64) */
503static struct bfin5xx_spi_chip spi_flash_chip_info = {
504 .enable_dma = 0, /* use dma transfer with this chip*/
505 .bits_per_word = 8,
506};
507#endif
508
a261eec0
MF		 509#if defined(CONFIG_BFIN_SPI_ADC) \
510 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 511/* SPI ADC chip */
512static struct bfin5xx_spi_chip spi_adc_chip_info = {
513 .enable_dma = 1, /* use dma transfer with this chip*/
514 .bits_per_word = 16,
515};
516#endif
517
8312440e
BS		 518#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
519 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032
BW		 520static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
521 .enable_dma = 0,
522 .bits_per_word = 16,
523};
524#endif
525
d4b834c1
BS		 526#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
527 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
528static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
529 .enable_dma = 0,
530 .bits_per_word = 8,
531 .cs_gpio = GPIO_PF5,
532};
533#endif
534
5b7c5775 535#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 536#include <linux/input/ad714x.h>
537static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
538 .enable_dma = 0,
539 .bits_per_word = 16,
540};
541
5b7c5775 542static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
427f277e
BS		 543 {
544 .start_stage = 0,
545 .end_stage = 7,
546 .max_coord = 128,
547 },
548};
549
5b7c5775 550static struct ad714x_button_plat ad7147_spi_button_plat[] = {
427f277e
BS		 551 {
552 .keycode = BTN_FORWARD,
553 .l_mask = 0,
554 .h_mask = 0x600,
555 },
556 {
557 .keycode = BTN_LEFT,
558 .l_mask = 0,
559 .h_mask = 0x500,
560 },
561 {
562 .keycode = BTN_MIDDLE,
563 .l_mask = 0,
564 .h_mask = 0x800,
565 },
566 {
567 .keycode = BTN_RIGHT,
568 .l_mask = 0x100,
569 .h_mask = 0x400,
570 },
571 {
572 .keycode = BTN_BACK,
573 .l_mask = 0x200,
574 .h_mask = 0x400,
575 },
576};
5b7c5775 577static struct ad714x_platform_data ad7147_spi_platform_data = {
427f277e
BS		 578 .slider_num = 1,
579 .button_num = 5,
5b7c5775
MF		 580 .slider = ad7147_spi_slider_plat,
581 .button = ad7147_spi_button_plat,
427f277e
BS		 582 .stage_cfg_reg = {
583 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
584 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
585 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
586 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
587 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
588 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
590 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
591 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
592 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
593 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
594 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
595 },
596 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
597};
598#endif
599
5b7c5775 600#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
427f277e 601#include <linux/input/ad714x.h>
5b7c5775 602static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
427f277e
BS		 603 {
604 .keycode = BTN_1,
605 .l_mask = 0,
606 .h_mask = 0x1,
607 },
608 {
609 .keycode = BTN_2,
610 .l_mask = 0,
611 .h_mask = 0x2,
612 },
613 {
614 .keycode = BTN_3,
615 .l_mask = 0,
616 .h_mask = 0x4,
617 },
618 {
619 .keycode = BTN_4,
620 .l_mask = 0x0,
621 .h_mask = 0x8,
622 },
623};
5b7c5775 624static struct ad714x_platform_data ad7142_i2c_platform_data = {
427f277e 625 .button_num = 4,
5b7c5775 626 .button = ad7142_i2c_button_plat,
427f277e
BS		 627 .stage_cfg_reg = {
628 /* fixme: figure out right setting for all comoponent according
629 * to hardware feature of EVAL-AD7142EB board */
630 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
631 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
632 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
633 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
634 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
635 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
636 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
637 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642 },
643 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
644};
645#endif
646
f79ea4cb
YL		 647#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
648#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
649
650static int bfin_mmc_spi_init(struct device *dev,
651 irqreturn_t (*detect_int)(int, void *), void *data)
652{
653 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
654 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
655}
656
657static void bfin_mmc_spi_exit(struct device *dev, void *data)
658{
659 free_irq(MMC_SPI_CARD_DETECT_INT, data);
660}
661
662static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
663 .init = bfin_mmc_spi_init,
664 .exit = bfin_mmc_spi_exit,
665 .detect_delay = 100, /* msecs */
666};
667
668static struct bfin5xx_spi_chip mmc_spi_chip_info = {
669 .enable_dma = 0,
670 .bits_per_word = 8,
e68d1ebc 671 .pio_interrupt = 0,
f79ea4cb
YL		 672};
673#endif
674
1394f032 675#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
46aa04f9 676#include <linux/spi/ad7877.h>
1394f032 677static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032
BW		 678 .enable_dma = 0,
679 .bits_per_word = 16,
680};
681
682static const struct ad7877_platform_data bfin_ad7877_ts_info = {
683 .model = 7877,
684 .vref_delay_usecs = 50, /* internal, no capacitor */
685 .x_plate_ohms = 419,
686 .y_plate_ohms = 486,
687 .pressure_max = 1000,
688 .pressure_min = 0,
689 .stopacq_polarity = 1,
690 .first_conversion_delay = 3,
691 .acquisition_time = 1,
692 .averaging = 1,
693 .pen_down_acc_interval = 1,
694};
695#endif
696
46aa04f9
MH		 697#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
698#include <linux/spi/ad7879.h>
46aa04f9
MH		 699static const struct ad7879_platform_data bfin_ad7879_ts_info = {
700 .model = 7879, /* Model = AD7879 */
701 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
702 .pressure_max = 10000,
703 .pressure_min = 0,
704 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
705 .acquisition_time = 1, /* 4us acquisition time per sample */
706 .median = 2, /* do 8 measurements */
707 .averaging = 1, /* take the average of 4 middle samples */
708 .pen_down_acc_interval = 255, /* 9.4 ms */
709 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
710 .gpio_default = 1, /* During initialization set GPIO = HIGH */
711};
712#endif
713
ffc4d8bc 714#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
57af8edf 715#include <linux/input/adxl34x.h>
ffc4d8bc
MH		 716static const struct adxl34x_platform_data adxl34x_info = {
717 .x_axis_offset = 0,
718 .y_axis_offset = 0,
719 .z_axis_offset = 0,
720 .tap_threshold = 0x31,
721 .tap_duration = 0x10,
722 .tap_latency = 0x60,
723 .tap_window = 0xF0,
724 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
725 .act_axis_control = 0xFF,
726 .activity_threshold = 5,
727 .inactivity_threshold = 3,
728 .inactivity_time = 4,
729 .free_fall_threshold = 0x7,
730 .free_fall_time = 0x20,
731 .data_rate = 0x8,
732 .data_range = ADXL_FULL_RES,
733
734 .ev_type = EV_ABS,
735 .ev_code_x = ABS_X, /* EV_REL */
736 .ev_code_y = ABS_Y, /* EV_REL */
737 .ev_code_z = ABS_Z, /* EV_REL */
738
57af8edf 739 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
ffc4d8bc
MH		 740
741/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
742/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
743 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
744 .fifo_mode = ADXL_FIFO_STREAM,
745};
746#endif
747
f5150155
MH		 748#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
749static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
750 .enable_dma = 0,
751 .bits_per_word = 16,
752};
753#endif
754
6e668936
MH		 755#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
756static struct bfin5xx_spi_chip spidev_chip_info = {
757 .enable_dma = 0,
758 .bits_per_word = 8,
759};
760#endif
761
2043f3f7
MH		 762#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
763static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
764 .enable_dma = 0,
765 .bits_per_word = 8,
766};
767#endif
768
85a192e9
MH		 769#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
770static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
771 .enable_dma = 1,
772 .bits_per_word = 8,
773 .cs_gpio = GPIO_PF10,
774};
775#endif
776
efaf7cd9
MH		 777#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
778static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
779 .bits_per_word = 16,
780 .cs_gpio = GPIO_PF10,
781};
782
783#include <linux/spi/adf702x.h>
784#define TXREG 0x0160A470
785static const u32 adf7021_regs[] = {
786 0x09608FA0,
787 0x00575011,
788 0x00A7F092,
789 0x2B141563,
790 0x81F29E94,
791 0x00003155,
792 0x050A4F66,
793 0x00000007,
794 0x00000008,
795 0x000231E9,
796 0x3296354A,
797 0x891A2B3B,
798 0x00000D9C,
799 0x0000000D,
800 0x0000000E,
801 0x0000000F,
802};
803
804static struct adf702x_platform_data adf7021_platform_data = {
805 .regs_base = (void *)SPORT1_TCR1,
806 .dma_ch_rx = CH_SPORT1_RX,
807 .dma_ch_tx = CH_SPORT1_TX,
808 .irq_sport_err = IRQ_SPORT1_ERROR,
809 .gpio_int_rfs = GPIO_PF8,
810 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
811 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
812 .adf702x_model = MODEL_ADF7021,
813 .adf702x_regs = adf7021_regs,
814 .tx_reg = TXREG,
815};
816#endif
817
8e9d5c7d
MH		 818#if defined(CONFIG_MTD_DATAFLASH) \
819 || defined(CONFIG_MTD_DATAFLASH_MODULE)
ceac2651
MH		 820
821static struct mtd_partition bfin_spi_dataflash_partitions[] = {
822 {
823 .name = "bootloader(spi)",
824 .size = 0x00040000,
825 .offset = 0,
826 .mask_flags = MTD_CAP_ROM
827 }, {
828 .name = "linux kernel(spi)",
6ecb5b6d 829 .size = 0x180000,
ceac2651
MH		 830 .offset = MTDPART_OFS_APPEND,
831 }, {
832 .name = "file system(spi)",
833 .size = MTDPART_SIZ_FULL,
834 .offset = MTDPART_OFS_APPEND,
835 }
836};
837
838static struct flash_platform_data bfin_spi_dataflash_data = {
839 .name = "SPI Dataflash",
840 .parts = bfin_spi_dataflash_partitions,
841 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
842};
843
8e9d5c7d
MH		 844/* DataFlash chip */
845static struct bfin5xx_spi_chip data_flash_chip_info = {
846 .enable_dma = 0, /* use dma transfer with this chip*/
847 .bits_per_word = 8,
848};
849#endif
850
57af8edf
MH		 851#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
852static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
853 .enable_dma = 0, /* use dma transfer with this chip*/
854 .bits_per_word = 8,
855};
856#endif
857
1394f032
BW		 858static struct spi_board_info bfin_spi_board_info[] __initdata = {
859#if defined(CONFIG_MTD_M25P80) \
860 || defined(CONFIG_MTD_M25P80_MODULE)
861 {
862 /* the modalias must be the same as spi device driver name */
863 .modalias = "m25p80", /* Name of spi_driver for this device */
864 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 865 .bus_num = 0, /* Framework bus number */
1394f032
BW		 866 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
867 .platform_data = &bfin_spi_flash_data,
868 .controller_data = &spi_flash_chip_info,
869 .mode = SPI_MODE_3,
870 },
871#endif
8e9d5c7d
MH		 872#if defined(CONFIG_MTD_DATAFLASH) \
873 || defined(CONFIG_MTD_DATAFLASH_MODULE)
874 { /* DataFlash chip */
875 .modalias = "mtd_dataflash",
ceac2651 876 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
8e9d5c7d
MH		 877 .bus_num = 0, /* Framework bus number */
878 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
ceac2651 879 .platform_data = &bfin_spi_dataflash_data,
8e9d5c7d
MH		 880 .controller_data = &data_flash_chip_info,
881 .mode = SPI_MODE_3,
882 },
883#endif
a261eec0
MF		 884#if defined(CONFIG_BFIN_SPI_ADC) \
885 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032
BW		 886 {
887 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
888 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 889 .bus_num = 0, /* Framework bus number */
1394f032
BW		 890 .chip_select = 1, /* Framework chip select. */
891 .platform_data = NULL, /* No spi_driver specific config */
892 .controller_data = &spi_adc_chip_info,
893 },
894#endif
895
8312440e
BS		 896#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
897 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1394f032 898 {
dac98174 899 .modalias = "ad1836",
1394f032 900 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 901 .bus_num = 0,
8312440e 902 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
1394f032 903 .controller_data = &ad1836_spi_chip_info,
8312440e 904 .mode = SPI_MODE_3,
1394f032
BW		 905 },
906#endif
d4b834c1
BS		 907
908#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
909 {
dac98174 910 .modalias = "ad1938",
d4b834c1
BS		 911 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
912 .bus_num = 0,
913 .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
914 .controller_data = &ad1938_spi_chip_info,
915 .mode = SPI_MODE_3,
916 },
917#endif
918
5b7c5775 919#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
427f277e
BS		 920 {
921 .modalias = "ad714x_captouch",
922 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
923 .irq = IRQ_PF4,
924 .bus_num = 0,
925 .chip_select = 5,
926 .mode = SPI_MODE_3,
5b7c5775 927 .platform_data = &ad7147_spi_platform_data,
427f277e
BS		 928 .controller_data = &ad7147_spi_chip_info,
929 },
930#endif
931
f79ea4cb
YL		 932#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
933 {
934 .modalias = "mmc_spi",
935 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
936 .bus_num = 0,
937 .chip_select = 4,
938 .platform_data = &bfin_mmc_spi_pdata,
939 .controller_data = &mmc_spi_chip_info,
940 .mode = SPI_MODE_3,
941 },
942#endif
1394f032
BW		 943#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
944 {
945 .modalias = "ad7877",
946 .platform_data = &bfin_ad7877_ts_info,
947 .irq = IRQ_PF6,
948 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966 949 .bus_num = 0,
1394f032
BW		 950 .chip_select = 1,
951 .controller_data = &spi_ad7877_chip_info,
952 },
953#endif
f5150155 954#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
46aa04f9
MH		 955 {
956 .modalias = "ad7879",
957 .platform_data = &bfin_ad7879_ts_info,
958 .irq = IRQ_PF7,
959 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
960 .bus_num = 0,
961 .chip_select = 1,
962 .controller_data = &spi_ad7879_chip_info,
963 .mode = SPI_CPHA | SPI_CPOL,
964 },
965#endif
6e668936
MH		 966#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
967 {
968 .modalias = "spidev",
969 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
970 .bus_num = 0,
971 .chip_select = 1,
972 .controller_data = &spidev_chip_info,
973 },
974#endif
2043f3f7
MH		 975#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
976 {
977 .modalias = "bfin-lq035q1-spi",
978 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
979 .bus_num = 0,
46aa04f9 980 .chip_select = 2,
2043f3f7
MH		 981 .controller_data = &lq035q1_spi_chip_info,
982 .mode = SPI_CPHA | SPI_CPOL,
983 },
984#endif
85a192e9
MH		 985#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
986 {
987 .modalias = "enc28j60",
988 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
989 .irq = IRQ_PF6,
990 .bus_num = 0,
991 .chip_select = 0, /* GPIO controlled SSEL */
992 .controller_data = &enc28j60_spi_chip_info,
993 .mode = SPI_MODE_0,
994 },
995#endif
57af8edf
MH		 996#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
997 {
998 .modalias = "adxl34x",
999 .platform_data = &adxl34x_info,
1000 .irq = IRQ_PF6,
1001 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1002 .bus_num = 0,
1003 .chip_select = 2,
1004 .controller_data = &spi_adxl34x_chip_info,
1005 .mode = SPI_MODE_3,
1006 },
1007#endif
efaf7cd9
MH		 1008#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1009 {
1010 .modalias = "adf702x",
1011 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1012 .bus_num = 0,
1013 .chip_select = 0, /* GPIO controlled SSEL */
1014 .controller_data = &adf7021_spi_chip_info,
1015 .platform_data = &adf7021_platform_data,
1016 .mode = SPI_MODE_0,
1017 },
1018#endif
1019
1394f032
BW		 1020};
1021
5bda2723 1022#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1394f032 1023/* SPI controller data */
c6c4d7bb 1024static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032
BW		 1025 .num_chipselect = 8,
1026 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 1027 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032
BW		 1028};
1029
c6c4d7bb
BW		 1030/* SPI (0) */
1031static struct resource bfin_spi0_resource[] = {
1032 [0] = {
1033 .start = SPI0_REGBASE,
1034 .end = SPI0_REGBASE + 0xFF,
1035 .flags = IORESOURCE_MEM,
1036 },
1037 [1] = {
1038 .start = CH_SPI,
1039 .end = CH_SPI,
e68d1ebc
YL		 1040 .flags = IORESOURCE_DMA,
1041 },
1042 [2] = {
1043 .start = IRQ_SPI,
1044 .end = IRQ_SPI,
c6c4d7bb
BW		 1045 .flags = IORESOURCE_IRQ,
1046 },
1047};
1048
1049static struct platform_device bfin_spi0_device = {
1050 .name = "bfin-spi",
1051 .id = 0, /* Bus number */
1052 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1053 .resource = bfin_spi0_resource,
1394f032 1054 .dev = {
c6c4d7bb 1055 .platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032
BW		 1056 },
1057};
1058#endif /* spi master and devices */
1059
1e9aa955
CC		 1060#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1061
1062/* SPORT SPI controller data */
1063static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1064 .num_chipselect = 1, /* master only supports one device */
1065 .enable_dma = 0, /* master don't support DMA */
1066 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1067 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1068};
1069
1070static struct resource bfin_sport_spi0_resource[] = {
1071 [0] = {
1072 .start = SPORT0_TCR1,
1073 .end = SPORT0_TCR1 + 0xFF,
1074 .flags = IORESOURCE_MEM,
1075 },
1076 [1] = {
1077 .start = IRQ_SPORT0_ERROR,
1078 .end = IRQ_SPORT0_ERROR,
1079 .flags = IORESOURCE_IRQ,
1080 },
1081};
1082
1083static struct platform_device bfin_sport_spi0_device = {
1084 .name = "bfin-sport-spi",
1085 .id = 1, /* Bus number */
1086 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1087 .resource = bfin_sport_spi0_resource,
1088 .dev = {
1089 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1090 },
1091};
1092
1093static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1094 .num_chipselect = 1, /* master only supports one device */
1095 .enable_dma = 0, /* master don't support DMA */
1096 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1097 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1098};
1099
1100static struct resource bfin_sport_spi1_resource[] = {
1101 [0] = {
1102 .start = SPORT1_TCR1,
1103 .end = SPORT1_TCR1 + 0xFF,
1104 .flags = IORESOURCE_MEM,
1105 },
1106 [1] = {
1107 .start = IRQ_SPORT1_ERROR,
1108 .end = IRQ_SPORT1_ERROR,
1109 .flags = IORESOURCE_IRQ,
1110 },
1111};
1112
1113static struct platform_device bfin_sport_spi1_device = {
1114 .name = "bfin-sport-spi",
1115 .id = 2, /* Bus number */
1116 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1117 .resource = bfin_sport_spi1_resource,
1118 .dev = {
1119 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1120 },
1121};
1122
1123#endif /* sport spi master and devices */
1124
1394f032
BW		 1125#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1126static struct platform_device bfin_fb_device = {
c6c4d7bb
BW		 1127 .name = "bf537-lq035",
1128};
1129#endif
1130
2043f3f7
MH		 1131#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1132#include <asm/bfin-lq035q1.h>
1133
1134static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1135 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
46aa04f9 1136 .use_bl = 0, /* let something else control the LCD Blacklight */
2043f3f7
MH		 1137 .gpio_bl = GPIO_PF7,
1138};
1139
1140static struct resource bfin_lq035q1_resources[] = {
1141 {
1142 .start = IRQ_PPI_ERROR,
1143 .end = IRQ_PPI_ERROR,
1144 .flags = IORESOURCE_IRQ,
1145 },
1146};
1147
1148static struct platform_device bfin_lq035q1_device = {
1149 .name = "bfin-lq035q1",
1150 .id = -1,
1151 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1152 .resource = bfin_lq035q1_resources,
1153 .dev = {
1154 .platform_data = &bfin_lq035q1_data,
1155 },
1156};
1157#endif
1158
1394f032 1159#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
233b28a9 1160#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 1161static struct resource bfin_uart0_resources[] = {
1394f032 1162 {
6bd1fbea
SZ		 1163 .start = UART0_THR,
1164 .end = UART0_GCTL+2,
1394f032 1165 .flags = IORESOURCE_MEM,
233b28a9 1166 },
6bd1fbea
SZ		 1167 {
1168 .start = IRQ_UART0_RX,
1169 .end = IRQ_UART0_RX+1,
1170 .flags = IORESOURCE_IRQ,
1171 },
1172 {
1173 .start = IRQ_UART0_ERROR,
1174 .end = IRQ_UART0_ERROR,
1175 .flags = IORESOURCE_IRQ,
1176 },
1177 {
1178 .start = CH_UART0_TX,
1179 .end = CH_UART0_TX,
1180 .flags = IORESOURCE_DMA,
1181 },
1182 {
1183 .start = CH_UART0_RX,
1184 .end = CH_UART0_RX,
1185 .flags = IORESOURCE_DMA,
1186 },
1187#ifdef CONFIG_BFIN_UART0_CTSRTS
1188 { /* CTS pin */
1189 .start = GPIO_PG7,
1190 .end = GPIO_PG7,
1191 .flags = IORESOURCE_IO,
1192 },
1193 { /* RTS pin */
1194 .start = GPIO_PG6,
1195 .end = GPIO_PG6,
1196 .flags = IORESOURCE_IO,
1197 },
1198#endif
1199};
1200
1201unsigned short bfin_uart0_peripherals[] = {
1202 P_UART0_TX, P_UART0_RX, 0
1203};
1204
1205static struct platform_device bfin_uart0_device = {
1206 .name = "bfin-uart",
1207 .id = 0,
1208 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1209 .resource = bfin_uart0_resources,
1210 .dev = {
1211 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1212 },
1213};
233b28a9
SZ		 1214#endif
1215#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 1216static struct resource bfin_uart1_resources[] = {
233b28a9 1217 {
6bd1fbea
SZ		 1218 .start = UART1_THR,
1219 .end = UART1_GCTL+2,
1394f032
BW		 1220 .flags = IORESOURCE_MEM,
1221 },
6bd1fbea
SZ		 1222 {
1223 .start = IRQ_UART1_RX,
1224 .end = IRQ_UART1_RX+1,
1225 .flags = IORESOURCE_IRQ,
1226 },
1227 {
1228 .start = IRQ_UART1_ERROR,
1229 .end = IRQ_UART1_ERROR,
1230 .flags = IORESOURCE_IRQ,
1231 },
1232 {
1233 .start = CH_UART1_TX,
1234 .end = CH_UART1_TX,
1235 .flags = IORESOURCE_DMA,
1236 },
1237 {
1238 .start = CH_UART1_RX,
1239 .end = CH_UART1_RX,
1240 .flags = IORESOURCE_DMA,
1241 },
1242};
1243
1244unsigned short bfin_uart1_peripherals[] = {
1245 P_UART1_TX, P_UART1_RX, 0
1394f032
BW		 1246};
1247
6bd1fbea 1248static struct platform_device bfin_uart1_device = {
1394f032
BW		 1249 .name = "bfin-uart",
1250 .id = 1,
6bd1fbea
SZ		 1251 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1252 .resource = bfin_uart1_resources,
1253 .dev = {
1254 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1255 },
1394f032
BW		 1256};
1257#endif
6bd1fbea 1258#endif
1394f032 1259
5be36d22 1260#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 1261#ifdef CONFIG_BFIN_SIR0
42bd8bcb 1262static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 1263 {
1264 .start = 0xFFC00400,
1265 .end = 0xFFC004FF,
1266 .flags = IORESOURCE_MEM,
1267 },
42bd8bcb
GY		 1268 {
1269 .start = IRQ_UART0_RX,
1270 .end = IRQ_UART0_RX+1,
1271 .flags = IORESOURCE_IRQ,
1272 },
1273 {
1274 .start = CH_UART0_RX,
1275 .end = CH_UART0_RX+1,
1276 .flags = IORESOURCE_DMA,
1277 },
1278};
1279
1280static struct platform_device bfin_sir0_device = {
1281 .name = "bfin_sir",
1282 .id = 0,
1283 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1284 .resource = bfin_sir0_resources,
1285};
5be36d22
GY		 1286#endif
1287#ifdef CONFIG_BFIN_SIR1
42bd8bcb 1288static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 1289 {
1290 .start = 0xFFC02000,
1291 .end = 0xFFC020FF,
1292 .flags = IORESOURCE_MEM,
1293 },
42bd8bcb
GY		 1294 {
1295 .start = IRQ_UART1_RX,
1296 .end = IRQ_UART1_RX+1,
1297 .flags = IORESOURCE_IRQ,
1298 },
1299 {
1300 .start = CH_UART1_RX,
1301 .end = CH_UART1_RX+1,
1302 .flags = IORESOURCE_DMA,
1303 },
5be36d22
GY		 1304};
1305
42bd8bcb 1306static struct platform_device bfin_sir1_device = {
5be36d22 1307 .name = "bfin_sir",
42bd8bcb
GY		 1308 .id = 1,
1309 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1310 .resource = bfin_sir1_resources,
5be36d22
GY		 1311};
1312#endif
42bd8bcb 1313#endif
5be36d22 1314
1394f032 1315#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
c6c4d7bb
BW		 1316static struct resource bfin_twi0_resource[] = {
1317 [0] = {
1318 .start = TWI0_REGBASE,
1319 .end = TWI0_REGBASE,
1320 .flags = IORESOURCE_MEM,
1321 },
1322 [1] = {
1323 .start = IRQ_TWI,
1324 .end = IRQ_TWI,
1325 .flags = IORESOURCE_IRQ,
1326 },
1327};
1328
1394f032
BW		 1329static struct platform_device i2c_bfin_twi_device = {
1330 .name = "i2c-bfin-twi",
1331 .id = 0,
c6c4d7bb
BW		 1332 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1333 .resource = bfin_twi0_resource,
1394f032
BW		 1334};
1335#endif
1336
51ed9ad7 1337#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
f39d56ec 1338#include <linux/i2c/adp5588.h>
51ed9ad7
MH		 1339static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1340 [0] = KEY_GRAVE,
1341 [1] = KEY_1,
1342 [2] = KEY_2,
1343 [3] = KEY_3,
1344 [4] = KEY_4,
1345 [5] = KEY_5,
1346 [6] = KEY_6,
1347 [7] = KEY_7,
1348 [8] = KEY_8,
1349 [9] = KEY_9,
1350 [10] = KEY_0,
1351 [11] = KEY_MINUS,
1352 [12] = KEY_EQUAL,
1353 [13] = KEY_BACKSLASH,
1354 [15] = KEY_KP0,
1355 [16] = KEY_Q,
1356 [17] = KEY_W,
1357 [18] = KEY_E,
1358 [19] = KEY_R,
1359 [20] = KEY_T,
1360 [21] = KEY_Y,
1361 [22] = KEY_U,
1362 [23] = KEY_I,
1363 [24] = KEY_O,
1364 [25] = KEY_P,
1365 [26] = KEY_LEFTBRACE,
1366 [27] = KEY_RIGHTBRACE,
1367 [29] = KEY_KP1,
1368 [30] = KEY_KP2,
1369 [31] = KEY_KP3,
1370 [32] = KEY_A,
1371 [33] = KEY_S,
1372 [34] = KEY_D,
1373 [35] = KEY_F,
1374 [36] = KEY_G,
1375 [37] = KEY_H,
1376 [38] = KEY_J,
1377 [39] = KEY_K,
1378 [40] = KEY_L,
1379 [41] = KEY_SEMICOLON,
1380 [42] = KEY_APOSTROPHE,
1381 [43] = KEY_BACKSLASH,
1382 [45] = KEY_KP4,
1383 [46] = KEY_KP5,
1384 [47] = KEY_KP6,
1385 [48] = KEY_102ND,
1386 [49] = KEY_Z,
1387 [50] = KEY_X,
1388 [51] = KEY_C,
1389 [52] = KEY_V,
1390 [53] = KEY_B,
1391 [54] = KEY_N,
1392 [55] = KEY_M,
1393 [56] = KEY_COMMA,
1394 [57] = KEY_DOT,
1395 [58] = KEY_SLASH,
1396 [60] = KEY_KPDOT,
1397 [61] = KEY_KP7,
1398 [62] = KEY_KP8,
1399 [63] = KEY_KP9,
1400 [64] = KEY_SPACE,
1401 [65] = KEY_BACKSPACE,
1402 [66] = KEY_TAB,
1403 [67] = KEY_KPENTER,
1404 [68] = KEY_ENTER,
1405 [69] = KEY_ESC,
1406 [70] = KEY_DELETE,
1407 [74] = KEY_KPMINUS,
1408 [76] = KEY_UP,
1409 [77] = KEY_DOWN,
1410 [78] = KEY_RIGHT,
1411 [79] = KEY_LEFT,
1412};
1413
1414static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1415 .rows = 8,
1416 .cols = 10,
1417 .keymap = adp5588_keymap,
1418 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1419 .repeat = 0,
1420};
1421#endif
1422
3ea57218
MH		 1423#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1424#include <linux/mfd/adp5520.h>
1425
1426 /*
1427 * ADP5520/5501 Backlight Data
1428 */
1429
1d23dc89
MH		 1430static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1431 .fade_in = ADP5520_FADE_T_1200ms,
1432 .fade_out = ADP5520_FADE_T_1200ms,
1433 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1434 .en_ambl_sens = 1,
1435 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1436 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1437 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1438 .l2_office_max = ADP5520_BL_CUR_mA(7),
1439 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1440 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1441 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1442 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1443 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1444 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1445 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
3ea57218
MH		 1446};
1447
1448 /*
1449 * ADP5520/5501 LEDs Data
1450 */
1451
3ea57218
MH		 1452static struct led_info adp5520_leds[] = {
1453 {
1454 .name = "adp5520-led1",
1455 .default_trigger = "none",
1d23dc89 1456 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
3ea57218
MH		 1457 },
1458#ifdef ADP5520_EN_ALL_LEDS
1459 {
1460 .name = "adp5520-led2",
1461 .default_trigger = "none",
1462 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1463 },
1464 {
1465 .name = "adp5520-led3",
1466 .default_trigger = "none",
1467 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1468 },
1469#endif
1470};
1471
1d23dc89 1472static struct adp5520_leds_platform_data adp5520_leds_data = {
3ea57218
MH		 1473 .num_leds = ARRAY_SIZE(adp5520_leds),
1474 .leds = adp5520_leds,
1d23dc89
MH		 1475 .fade_in = ADP5520_FADE_T_600ms,
1476 .fade_out = ADP5520_FADE_T_600ms,
1477 .led_on_time = ADP5520_LED_ONT_600ms,
3ea57218
MH		 1478};
1479
1480 /*
1481 * ADP5520 GPIO Data
1482 */
1483
1d23dc89 1484static struct adp5520_gpio_platform_data adp5520_gpio_data = {
3ea57218 1485 .gpio_start = 50,
1d23dc89
MH		 1486 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1487 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
3ea57218
MH		 1488};
1489
1490 /*
1491 * ADP5520 Keypad Data
1492 */
1493
3ea57218 1494static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1d23dc89
MH		 1495 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1496 [ADP5520_KEY(0, 1)] = KEY_1,
1497 [ADP5520_KEY(0, 2)] = KEY_2,
1498 [ADP5520_KEY(0, 3)] = KEY_3,
1499 [ADP5520_KEY(1, 0)] = KEY_4,
1500 [ADP5520_KEY(1, 1)] = KEY_5,
1501 [ADP5520_KEY(1, 2)] = KEY_6,
1502 [ADP5520_KEY(1, 3)] = KEY_7,
1503 [ADP5520_KEY(2, 0)] = KEY_8,
1504 [ADP5520_KEY(2, 1)] = KEY_9,
1505 [ADP5520_KEY(2, 2)] = KEY_0,
1506 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1507 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1508 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1509 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1510 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1511};
1512
1513static struct adp5520_keys_platform_data adp5520_keys_data = {
1514 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1515 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
3ea57218
MH		 1516 .keymap = adp5520_keymap,
1517 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1518 .repeat = 0,
1519};
1520
1521 /*
1522 * ADP5520/5501 Multifuction Device Init Data
1523 */
1524
3ea57218 1525static struct adp5520_platform_data adp5520_pdev_data = {
1d23dc89
MH		 1526 .backlight = &adp5520_backlight_data,
1527 .leds = &adp5520_leds_data,
1528 .gpio = &adp5520_gpio_data,
1529 .keys = &adp5520_keys_data,
3ea57218
MH		 1530};
1531
1532#endif
1533
ba877d44
MH		 1534#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1535#include <linux/i2c/adp5588.h>
1d23dc89 1536static struct adp5588_gpio_platform_data adp5588_gpio_data = {
ba877d44
MH		 1537 .gpio_start = 50,
1538 .pullup_dis_mask = 0,
1539};
1540#endif
1541
78756c62
MH		 1542#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1543#include <linux/i2c/adp8870.h>
1544static struct led_info adp8870_leds[] = {
1545 {
1546 .name = "adp8870-led7",
1547 .default_trigger = "none",
1548 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1549 },
1550};
1551
1552
1553static struct adp8870_backlight_platform_data adp8870_pdata = {
1554 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1555 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1556 .pwm_assign = 0, /* 1 = Enables PWM mode */
1557
1558 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1559 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1560 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1561
1562 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1563 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1564
1565 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1566 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1567 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1568 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1569 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1570 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1571 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1572 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1573 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1574 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1575
1576 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1577 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1578 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1579 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1580 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1581 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1582 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1583 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1584
1585 .leds = adp8870_leds,
1586 .num_leds = ARRAY_SIZE(adp8870_leds),
1587 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1588 .led_fade_in = ADP8870_FADE_T_600ms,
1589 .led_fade_out = ADP8870_FADE_T_600ms,
1590 .led_on_time = ADP8870_LED_ONT_200ms,
1591};
1592#endif
1593
81d9c7f2 1594static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
5b7c5775 1595#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
81d9c7f2 1596 {
427f277e 1597 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
4c94c3e0 1598 .irq = IRQ_PG5,
5b7c5775 1599 .platform_data = (void *)&ad7142_i2c_platform_data,
81d9c7f2
BW		 1600 },
1601#endif
ebd58333 1602#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
81d9c7f2
BW		 1603 {
1604 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
81d9c7f2
BW		 1605 },
1606#endif
204844eb 1607#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
81d9c7f2
BW		 1608 {
1609 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
f5150155
MH		 1610 .irq = IRQ_PG6,
1611 },
1612#endif
1613#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1614 {
1615 I2C_BOARD_INFO("ad7879", 0x2F),
1616 .irq = IRQ_PG5,
1617 .platform_data = (void *)&bfin_ad7879_ts_info,
81d9c7f2
BW		 1618 },
1619#endif
51ed9ad7
MH		 1620#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1621 {
1622 I2C_BOARD_INFO("adp5588-keys", 0x34),
1623 .irq = IRQ_PG0,
1624 .platform_data = (void *)&adp5588_kpad_data,
1625 },
1626#endif
3ea57218
MH		 1627#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1628 {
1629 I2C_BOARD_INFO("pmic-adp5520", 0x32),
4f84b6e0 1630 .irq = IRQ_PG0,
3ea57218
MH		 1631 .platform_data = (void *)&adp5520_pdev_data,
1632 },
1633#endif
ffc4d8bc
MH		 1634#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1635 {
1636 I2C_BOARD_INFO("adxl34x", 0x53),
1637 .irq = IRQ_PG3,
1638 .platform_data = (void *)&adxl34x_info,
1639 },
1640#endif
ba877d44
MH		 1641#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1642 {
1643 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1644 .platform_data = (void *)&adp5588_gpio_data,
1645 },
1646#endif
50c4c086
MH		 1647#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1648 {
1649 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1650 },
1651#endif
ddcd7cb8
MH		 1652#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1653 {
1654 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1655 },
1656#endif
78756c62
MH		 1657#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1658 {
1659 I2C_BOARD_INFO("adp8870", 0x2B),
1660 .platform_data = (void *)&adp8870_pdata,
1661 },
1662#endif
d53127ff
CC		 1663#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1664 {
1665 I2C_BOARD_INFO("adau1371", 0x1A),
1666 },
1667#endif
04267638
CC		 1668#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1669 {
1670 I2C_BOARD_INFO("adau1761", 0x38),
1671 },
1672#endif
1f13f2fd
MH		 1673#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1674 {
1675 I2C_BOARD_INFO("ad5258", 0x18),
1676 },
1677#endif
81d9c7f2 1678};
81d9c7f2 1679
1394f032
BW		 1680#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1681static struct platform_device bfin_sport0_uart_device = {
1682 .name = "bfin-sport-uart",
1683 .id = 0,
1684};
1685
1686static struct platform_device bfin_sport1_uart_device = {
1687 .name = "bfin-sport-uart",
1688 .id = 1,
1689};
1690#endif
1691
c6c4d7bb 1692#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2c8beb2c
MH		 1693#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1694/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
c6c4d7bb 1695
2c8beb2c
MH		 1696#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1697#define PATA_INT IRQ_PF5
c6c4d7bb
BW		 1698static struct pata_platform_info bfin_pata_platform_data = {
1699 .ioport_shift = 1,
64e5c512 1700 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
c6c4d7bb
BW		 1701};
1702
1703static struct resource bfin_pata_resources[] = {
1704 {
1705 .start = 0x20314020,
1706 .end = 0x2031403F,
1707 .flags = IORESOURCE_MEM,
1708 },
1709 {
1710 .start = 0x2031401C,
1711 .end = 0x2031401F,
1712 .flags = IORESOURCE_MEM,
1713 },
1714 {
1715 .start = PATA_INT,
1716 .end = PATA_INT,
1717 .flags = IORESOURCE_IRQ,
1718 },
1719};
2c8beb2c
MH		 1720#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1721static struct pata_platform_info bfin_pata_platform_data = {
1722 .ioport_shift = 0,
1723};
648882d9
MH		 1724/* CompactFlash Storage Card Memory Mapped Adressing
1725 * /REG = A11 = 1
1726 */
2c8beb2c
MH		 1727static struct resource bfin_pata_resources[] = {
1728 {
648882d9
MH		 1729 .start = 0x20211800,
1730 .end = 0x20211807,
2c8beb2c
MH		 1731 .flags = IORESOURCE_MEM,
1732 },
1733 {
648882d9
MH		 1734 .start = 0x2021180E, /* Device Ctl */
1735 .end = 0x2021180E,
2c8beb2c
MH		 1736 .flags = IORESOURCE_MEM,
1737 },
1738};
1739#endif
c6c4d7bb
BW		 1740
1741static struct platform_device bfin_pata_device = {
1742 .name = "pata_platform",
1743 .id = -1,
1744 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1745 .resource = bfin_pata_resources,
1746 .dev = {
1747 .platform_data = &bfin_pata_platform_data,
1748 }
1749};
1750#endif
1751
14b03204
MH		 1752static const unsigned int cclk_vlev_datasheet[] =
1753{
1754 VRPAIR(VLEV_085, 250000000),
1755 VRPAIR(VLEV_090, 376000000),
1756 VRPAIR(VLEV_095, 426000000),
1757 VRPAIR(VLEV_100, 426000000),
1758 VRPAIR(VLEV_105, 476000000),
1759 VRPAIR(VLEV_110, 476000000),
1760 VRPAIR(VLEV_115, 476000000),
1761 VRPAIR(VLEV_120, 500000000),
1762 VRPAIR(VLEV_125, 533000000),
1763 VRPAIR(VLEV_130, 600000000),
1764};
1765
1766static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1767 .tuple_tab = cclk_vlev_datasheet,
1768 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1769 .vr_settling_time = 25 /* us */,
1770};
1771
1772static struct platform_device bfin_dpmc = {
1773 .name = "bfin dpmc",
1774 .dev = {
1775 .platform_data = &bfin_dmpc_vreg_data,
1776 },
1777};
1778
8312440e
BS		 1779#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1780static struct platform_device bfin_tdm = {
1781 .name = "bfin-tdm",
1782 /* TODO: add platform data here */
1783};
1784#endif
1785
1394f032 1786static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1787
1788 &bfin_dpmc,
1789
1394f032
BW		 1790#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1791 &bfin_pcmcia_cf_device,
1792#endif
1793
1794#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1795 &rtc_device,
1796#endif
1797
1798#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1799 &sl811_hcd_device,
1800#endif
1801
1802#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1803 &isp1362_hcd_device,
1804#endif
1805
3f375690
MH		 1806#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1807 &bfin_isp1760_device,
1808#endif
1809
1394f032
BW		 1810#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1811 &smc91x_device,
1812#endif
1813
f40d24d9
AL		 1814#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1815 &dm9000_device,
1816#endif
1817
706a01b1
BS		 1818#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1819 &bfin_can_device,
1820#endif
1821
1394f032 1822#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1823 &bfin_mii_bus,
1394f032
BW		 1824 &bfin_mac_device,
1825#endif
1826
1827#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1828 &net2272_bfin_device,
1829#endif
1830
1831#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 1832 &bfin_spi0_device,
1394f032
BW		 1833#endif
1834
1e9aa955
CC		 1835#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1836 &bfin_sport_spi0_device,
1837 &bfin_sport_spi1_device,
1838#endif
1839
1394f032
BW		 1840#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1841 &bfin_fb_device,
1842#endif
1843
2043f3f7
MH		 1844#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1845 &bfin_lq035q1_device,
1846#endif
1847
1394f032 1848#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1849#ifdef CONFIG_SERIAL_BFIN_UART0
1850 &bfin_uart0_device,
1851#endif
1852#ifdef CONFIG_SERIAL_BFIN_UART1
1853 &bfin_uart1_device,
1854#endif
1394f032
BW		 1855#endif
1856
5be36d22 1857#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1858#ifdef CONFIG_BFIN_SIR0
1859 &bfin_sir0_device,
1860#endif
1861#ifdef CONFIG_BFIN_SIR1
1862 &bfin_sir1_device,
1863#endif
5be36d22
GY		 1864#endif
1865
1394f032
BW		 1866#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1867 &i2c_bfin_twi_device,
1868#endif
1869
1870#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1871 &bfin_sport0_uart_device,
1872 &bfin_sport1_uart_device,
1873#endif
c6c4d7bb
BW		 1874
1875#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1876 &bfin_pata_device,
1877#endif
2463ef22
MH		 1878
1879#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1880 &bfin_device_gpiokeys,
1881#endif
cad2ab65 1882
fc68911e
MF		 1883#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1884 &bfin_async_nand_device,
1885#endif
1886
793dc27b 1887#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
de8c43f2 1888 &stamp_flash_device,
793dc27b 1889#endif
8312440e
BS		 1890
1891#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1892 &bfin_tdm,
1893#endif
1394f032
BW		 1894};
1895
1896static int __init stamp_init(void)
1897{
b85d858b 1898 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW		 1899 i2c_register_board_info(0, bfin_i2c_board_info,
1900 ARRAY_SIZE(bfin_i2c_board_info));
fc68911e 1901 bfin_plat_nand_init();
1394f032 1902 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1903 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
c6c4d7bb 1904
1394f032
BW		 1905 return 0;
1906}
1907
1908arch_initcall(stamp_init);
c6c4d7bb
BW		 1909
1910void native_machine_restart(char *cmd)
1911{
1912 /* workaround reboot hang when booting from SPI */
1913 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1914 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
c6c4d7bb 1915}
137b1529
MF		 1916
1917/*
1918 * Currently the MAC address is saved in Flash by U-Boot
1919 */
1920#define FLASH_MAC 0x203f0000
9862cc52 1921void bfin_get_ether_addr(char *addr)
137b1529
MF		 1922{
1923 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
1924 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
1925}
9862cc52 1926EXPORT_SYMBOL(bfin_get_ether_addr);
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