[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / pnav10.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <linux/usb/sl811.h>

#include <linux/spi/ad7877.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "ADI PNAV-1.0";

/*
 *  Driver needs to know address, irq and flag pin.
 */

#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
static struct resource bfin_pcmcia_cf_resources[] = {
	{
		.start = 0x20310000, /* IO PORT */
		.end = 0x20312000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20311000, /* Attribute Memory */
		.end = 0x20311FFF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF4,
		.end = IRQ_PF4,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	}, {
		.start = 6, /* Card Detect PF6 */
		.end = 6,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pcmcia_cf_device = {
	.name = "bfin_cf_pcmcia",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	.resource = bfin_pcmcia_cf_resources,
};
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {

		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
static struct resource sl811_hcd_resources[] = {
	{
		.start = 0x20340000,
		.end = 0x20340000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20340004,
		.end = 0x20340004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = CONFIG_USB_SL811_BFIN_IRQ,
		.end = CONFIG_USB_SL811_BFIN_IRQ,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
void sl811_port_power(struct device *dev, int is_on)
{
	gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
	gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);

}
#endif

static struct sl811_platform_data sl811_priv = {
	.potpg = 10,
	.power = 250,       /* == 500mA */
#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
	.port_power = &sl811_port_power,
#endif
};

static struct platform_device sl811_hcd_device = {
	.name = "sl811-hcd",
	.id = 0,
	.dev = {
		.platform_data = &sl811_priv,
	},
	.num_resources = ARRAY_SIZE(sl811_hcd_resources),
	.resource = sl811_hcd_resources,
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev.platform_data = &bfin_mii_bus,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) \
	|| defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) \
	|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};

static const struct ad7877_platform_data bfin_ad7877_ts_info = {
	.model			= 7877,
	.vref_delay_usecs	= 50,	/* internal, no capacitor */
	.x_plate_ohms		= 419,
	.y_plate_ohms		= 486,
	.pressure_max		= 1000,
	.pressure_min		= 0,
	.stopacq_polarity 	= 1,
	.first_conversion_delay = 3,
	.acquisition_time 	= 1,
	.averaging 		= 1,
	.pen_down_acc_interval 	= 1,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) \
	|| defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) \
	|| defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) \
	|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif
#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 5,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
{
	.modalias		= "ad7877",
	.platform_data		= &bfin_ad7877_ts_info,
	.irq			= IRQ_PF2,
	.max_speed_hz		= 12500000,     /* max spi clock (SCK) speed in HZ */
	.bus_num		= 0,
	.chip_select  		= 5,
	.controller_data = &spi_ad7877_chip_info,
},
#endif

};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-lq035",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = UART0_THR,
		.end = UART0_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
};

unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
static struct resource bfin_uart1_resources[] = {
	{
		.start = UART1_THR,
		.end = UART1_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART1_ERROR,
		.end = IRQ_UART1_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_TX,
		.end = CH_UART1_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX,
		.flags = IORESOURCE_DMA,
	},
};

unsigned short bfin_uart1_peripherals[] = {
	P_UART1_TX, P_UART1_RX, 0
};

static struct platform_device bfin_uart1_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	.resource = bfin_uart1_resources,
	.dev = {
		.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

static struct platform_device *stamp_devices[] __initdata = {
#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	&bfin_pcmcia_cf_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
	&sl811_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
	&bfin_fb_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	&bfin_uart1_device,
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif
};

static int __init pnav_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info,
				ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(pnav_init);

void bfin_get_ether_addr(char *addr)
{
	random_ether_addr(addr);
	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2005 National ICT Australia (NICTA)
	4	* Aidan Williams <aidan@nicta.com.au>
1394f032	5	*
96f1050d	6	* Licensed under the GPL-2 or later.
1394f032 BW	7	*/
	8
	9	#include <linux/device.h>
43f73fef	10	#include <linux/etherdevice.h>
1394f032 BW	11	#include <linux/platform_device.h>
	12	#include <linux/mtd/mtd.h>
	13	#include <linux/mtd/partitions.h>
	14	#include <linux/spi/spi.h>
	15	#include <linux/spi/flash.h>
1f83b8f1	16	#include <linux/irq.h>
c6c4d7bb	17	#include <asm/dma.h>
1394f032	18	#include <asm/bfin5xx_spi.h>
5d448dd5	19	#include <asm/portmux.h>
27f5d75a	20	#include <linux/usb/sl811.h>
1394f032 BW	21
	22	#include <linux/spi/ad7877.h>
	23
	24	/*
	25	* Name the Board for the /proc/cpuinfo
	26	*/
fe85cad2	27	const char bfin_board_name[] = "ADI PNAV-1.0";
1394f032 BW	28
	29	/*
	30	* Driver needs to know address, irq and flag pin.
	31	*/
	32
	33	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	34	static struct resource bfin_pcmcia_cf_resources[] = {
	35	{
	36	.start = 0x20310000, /* IO PORT */
	37	.end = 0x20312000,
	38	.flags = IORESOURCE_MEM,
1f83b8f1	39	}, {
d2d50aa9	40	.start = 0x20311000, /* Attribute Memory */
1394f032 BW	41	.end = 0x20311FFF,
1394f032 BW	42	.flags = IORESOURCE_MEM,
1f83b8f1	43	}, {
1394f032 BW	44	.start = IRQ_PF4,
	45	.end = IRQ_PF4,
	46	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
1f83b8f1	47	}, {
1394f032 BW	48	.start = 6, /* Card Detect PF6 */
	49	.end = 6,
	50	.flags = IORESOURCE_IRQ,
	51	},
	52	};
	53
	54	static struct platform_device bfin_pcmcia_cf_device = {
	55	.name = "bfin_cf_pcmcia",
	56	.id = -1,
	57	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	58	.resource = bfin_pcmcia_cf_resources,
	59	};
	60	#endif
	61
	62	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	63	static struct platform_device rtc_device = {
	64	.name = "rtc-bfin",
	65	.id = -1,
	66	};
	67	#endif
	68
	69	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	70	#include <linux/smc91x.h>
	71
	72	static struct smc91x_platdata smc91x_info = {
	73	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	74	.leda = RPC_LED_100_10,
	75	.ledb = RPC_LED_TX_RX,
	76	};
	77
1394f032 BW	78	static struct resource smc91x_resources[] = {
	79	{
	80	.name = "smc91x-regs",
	81	.start = 0x20300300,
	82	.end = 0x20300300 + 16,
	83	.flags = IORESOURCE_MEM,
1f83b8f1	84	}, {
1394f032 BW	85
	86	.start = IRQ_PF7,
	87	.end = IRQ_PF7,
	88	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	89	},
	90	};
	91	static struct platform_device smc91x_device = {
	92	.name = "smc91x",
	93	.id = 0,
	94	.num_resources = ARRAY_SIZE(smc91x_resources),
	95	.resource = smc91x_resources,
61f09b5a MH	96	.dev = {
	97	.platform_data = &smc91x_info,
	98	},
1394f032 BW	99	};
	100	#endif
	101
	102	#if defined(CONFIG_USB_SL811_HCD) \|\| defined(CONFIG_USB_SL811_HCD_MODULE)
	103	static struct resource sl811_hcd_resources[] = {
	104	{
	105	.start = 0x20340000,
	106	.end = 0x20340000,
	107	.flags = IORESOURCE_MEM,
1f83b8f1	108	}, {
1394f032 BW	109	.start = 0x20340004,
	110	.end = 0x20340004,
	111	.flags = IORESOURCE_MEM,
1f83b8f1	112	}, {
1394f032 BW	113	.start = CONFIG_USB_SL811_BFIN_IRQ,
	114	.end = CONFIG_USB_SL811_BFIN_IRQ,
	115	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	116	},
	117	};
	118
	119	#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
	120	void sl811_port_power(struct device *dev, int is_on)
	121	{
c6c4d7bb	122	gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263	123	gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
1394f032	124
1394f032 BW	125	}
	126	#endif
	127
	128	static struct sl811_platform_data sl811_priv = {
	129	.potpg = 10,
	130	.power = 250, /* == 500mA */
	131	#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
	132	.port_power = &sl811_port_power,
	133	#endif
	134	};
	135
	136	static struct platform_device sl811_hcd_device = {
	137	.name = "sl811-hcd",
	138	.id = 0,
	139	.dev = {
	140	.platform_data = &sl811_priv,
	141	},
	142	.num_resources = ARRAY_SIZE(sl811_hcd_resources),
	143	.resource = sl811_hcd_resources,
	144	};
	145	#endif
	146
1394f032	147	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628 GY	148	static struct platform_device bfin_mii_bus = {
	149	.name = "bfin_mii_bus",
	150	};
	151
1394f032 BW	152	static struct platform_device bfin_mac_device = {
1394f032 BW	153	.name = "bfin_mac",
65319628	154	.dev.platform_data = &bfin_mii_bus,
1394f032 BW	155	};
	156	#endif
	157
	158	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	159	static struct resource net2272_bfin_resources[] = {
	160	{
	161	.start = 0x20300000,
	162	.end = 0x20300000 + 0x100,
	163	.flags = IORESOURCE_MEM,
1f83b8f1	164	}, {
1394f032 BW	165	.start = IRQ_PF7,
	166	.end = IRQ_PF7,
	167	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	168	},
	169	};
	170
	171	static struct platform_device net2272_bfin_device = {
	172	.name = "net2272",
	173	.id = -1,
	174	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	175	.resource = net2272_bfin_resources,
	176	};
	177	#endif
	178
	179	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	180	/* all SPI peripherals info goes here */
	181
	182	#if defined(CONFIG_MTD_M25P80) \
	183	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	184	static struct mtd_partition bfin_spi_flash_partitions[] = {
	185	{
aa582977	186	.name = "bootloader(spi)",
1394f032 BW	187	.size = 0x00020000,
	188	.offset = 0,
	189	.mask_flags = MTD_CAP_ROM
1f83b8f1	190	}, {
aa582977	191	.name = "linux kernel(spi)",
1394f032 BW	192	.size = 0xe0000,
1394f032 BW	193	.offset = 0x20000
1f83b8f1	194	}, {
aa582977	195	.name = "file system(spi)",
1394f032 BW	196	.size = 0x700000,
	197	.offset = 0x00100000,
	198	}
	199	};
	200
	201	static struct flash_platform_data bfin_spi_flash_data = {
	202	.name = "m25p80",
	203	.parts = bfin_spi_flash_partitions,
	204	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	205	.type = "m25p64",
	206	};
	207
	208	/* SPI flash chip (m25p64) */
	209	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	210	.enable_dma = 0, /* use dma transfer with this chip*/
	211	.bits_per_word = 8,
	212	};
	213	#endif
	214
a261eec0 MF	215	#if defined(CONFIG_BFIN_SPI_ADC) \
a261eec0 MF	216	\|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	217	/* SPI ADC chip */
	218	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	219	.enable_dma = 1, /* use dma transfer with this chip*/
	220	.bits_per_word = 16,
	221	};
	222	#endif
	223
	224	#if defined(CONFIG_SND_BLACKFIN_AD1836) \
	225	\|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	226	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	227	.enable_dma = 0,
	228	.bits_per_word = 16,
	229	};
	230	#endif
	231
f3f704d3 MH	232	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	233	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	234	.enable_dma = 0,
1394f032 BW	235	.bits_per_word = 8,
	236	};
	237	#endif
	238
1394f032 BW	239	#if defined(CONFIG_TOUCHSCREEN_AD7877) \|\| defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1394f032 BW	240	static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
1394f032 BW	241	.enable_dma = 0,
	242	.bits_per_word = 16,
	243	};
	244
	245	static const struct ad7877_platform_data bfin_ad7877_ts_info = {
	246	.model = 7877,
	247	.vref_delay_usecs = 50, /* internal, no capacitor */
	248	.x_plate_ohms = 419,
	249	.y_plate_ohms = 486,
	250	.pressure_max = 1000,
	251	.pressure_min = 0,
	252	.stopacq_polarity = 1,
	253	.first_conversion_delay = 3,
	254	.acquisition_time = 1,
	255	.averaging = 1,
	256	.pen_down_acc_interval = 1,
	257	};
	258	#endif
	259
	260	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	261	#if defined(CONFIG_MTD_M25P80) \
	262	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	263	{
	264	/* the modalias must be the same as spi device driver name */
	265	.modalias = "m25p80", /* Name of spi_driver for this device */
	266	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	267	.bus_num = 0, /* Framework bus number */
1394f032 BW	268	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	269	.platform_data = &bfin_spi_flash_data,
	270	.controller_data = &spi_flash_chip_info,
	271	.mode = SPI_MODE_3,
	272	},
	273	#endif
	274
a261eec0 MF	275	#if defined(CONFIG_BFIN_SPI_ADC) \
a261eec0 MF	276	\|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	277	{
	278	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	279	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	280	.bus_num = 0, /* Framework bus number */
1394f032 BW	281	.chip_select = 1, /* Framework chip select. */
	282	.platform_data = NULL, /* No spi_driver specific config */
	283	.controller_data = &spi_adc_chip_info,
	284	},
	285	#endif
	286
	287	#if defined(CONFIG_SND_BLACKFIN_AD1836) \
	288	\|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	289	{
dac98174	290	.modalias = "ad1836",
1394f032	291	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	292	.bus_num = 0,
1394f032 BW	293	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	294	.controller_data = &ad1836_spi_chip_info,
	295	},
	296	#endif
f3f704d3	297	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	298	{
f3f704d3	299	.modalias = "mmc_spi",
1394f032	300	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	301	.bus_num = 0,
f3f704d3 MH	302	.chip_select = 5,
f3f704d3 MH	303	.controller_data = &mmc_spi_chip_info,
1394f032 BW	304	.mode = SPI_MODE_3,
	305	},
	306	#endif
1394f032 BW	307	#if defined(CONFIG_TOUCHSCREEN_AD7877) \|\| defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
	308	{
	309	.modalias = "ad7877",
	310	.platform_data = &bfin_ad7877_ts_info,
	311	.irq = IRQ_PF2,
	312	.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
c7d48966	313	.bus_num = 0,
1394f032 BW	314	.chip_select = 5,
	315	.controller_data = &spi_ad7877_chip_info,
	316	},
	317	#endif
	318
	319	};
	320
c6c4d7bb BW	321	/* SPI (0) */
	322	static struct resource bfin_spi0_resource[] = {
	323	[0] = {
	324	.start = SPI0_REGBASE,
	325	.end = SPI0_REGBASE + 0xFF,
	326	.flags = IORESOURCE_MEM,
	327	},
	328	[1] = {
	329	.start = CH_SPI,
	330	.end = CH_SPI,
53122693 YL	331	.flags = IORESOURCE_DMA,
	332	},
	333	[2] = {
	334	.start = IRQ_SPI,
	335	.end = IRQ_SPI,
c6c4d7bb	336	.flags = IORESOURCE_IRQ,
53122693	337	},
c6c4d7bb BW	338	};
c6c4d7bb BW	339
1394f032	340	/* SPI controller data */
c6c4d7bb	341	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	342	.num_chipselect = 8,
1394f032 BW	343	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	344	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	345	};
1394f032 BW	346
c6c4d7bb BW	347	static struct platform_device bfin_spi0_device = {
	348	.name = "bfin-spi",
	349	.id = 0, /* Bus number */
	350	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	351	.resource = bfin_spi0_resource,
1394f032	352	.dev = {
c6c4d7bb	353	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	354	},
	355	};
	356	#endif /* spi master and devices */
	357
	358	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	359	static struct platform_device bfin_fb_device = {
c6c4d7bb	360	.name = "bf537-lq035",
1394f032 BW	361	};
	362	#endif
	363
	364	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	365	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	366	static struct resource bfin_uart0_resources[] = {
1394f032	367	{
6bd1fbea SZ	368	.start = UART0_THR,
6bd1fbea SZ	369	.end = UART0_GCTL+2,
1394f032	370	.flags = IORESOURCE_MEM,
6bd1fbea SZ	371	},
	372	{
	373	.start = IRQ_UART0_RX,
	374	.end = IRQ_UART0_RX+1,
	375	.flags = IORESOURCE_IRQ,
	376	},
	377	{
	378	.start = IRQ_UART0_ERROR,
	379	.end = IRQ_UART0_ERROR,
	380	.flags = IORESOURCE_IRQ,
	381	},
	382	{
	383	.start = CH_UART0_TX,
	384	.end = CH_UART0_TX,
	385	.flags = IORESOURCE_DMA,
	386	},
	387	{
	388	.start = CH_UART0_RX,
	389	.end = CH_UART0_RX,
	390	.flags = IORESOURCE_DMA,
	391	},
	392	};
	393
	394	unsigned short bfin_uart0_peripherals[] = {
	395	P_UART0_TX, P_UART0_RX, 0
	396	};
	397
	398	static struct platform_device bfin_uart0_device = {
	399	.name = "bfin-uart",
	400	.id = 0,
	401	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	402	.resource = bfin_uart0_resources,
	403	.dev = {
	404	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	405	},
	406	};
	407	#endif
	408	#ifdef CONFIG_SERIAL_BFIN_UART1
	409	static struct resource bfin_uart1_resources[] = {
	410	{
	411	.start = UART1_THR,
	412	.end = UART1_GCTL+2,
1394f032 BW	413	.flags = IORESOURCE_MEM,
1394f032 BW	414	},
6bd1fbea SZ	415	{
	416	.start = IRQ_UART1_RX,
	417	.end = IRQ_UART1_RX+1,
	418	.flags = IORESOURCE_IRQ,
	419	},
	420	{
	421	.start = IRQ_UART1_ERROR,
	422	.end = IRQ_UART1_ERROR,
	423	.flags = IORESOURCE_IRQ,
	424	},
	425	{
	426	.start = CH_UART1_TX,
	427	.end = CH_UART1_TX,
	428	.flags = IORESOURCE_DMA,
	429	},
	430	{
	431	.start = CH_UART1_RX,
	432	.end = CH_UART1_RX,
	433	.flags = IORESOURCE_DMA,
	434	},
1394f032 BW	435	};
1394f032 BW	436
6bd1fbea SZ	437	unsigned short bfin_uart1_peripherals[] = {
	438	P_UART1_TX, P_UART1_RX, 0
	439	};
	440
	441	static struct platform_device bfin_uart1_device = {
1394f032 BW	442	.name = "bfin-uart",
1394f032 BW	443	.id = 1,
6bd1fbea SZ	444	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	445	.resource = bfin_uart1_resources,
	446	.dev = {
	447	.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	448	},
1394f032 BW	449	};
1394f032 BW	450	#endif
6bd1fbea	451	#endif
1394f032	452
5be36d22	453	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	454	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	455	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	456	{
	457	.start = 0xFFC00400,
	458	.end = 0xFFC004FF,
	459	.flags = IORESOURCE_MEM,
	460	},
42bd8bcb GY	461	{
	462	.start = IRQ_UART0_RX,
	463	.end = IRQ_UART0_RX+1,
	464	.flags = IORESOURCE_IRQ,
	465	},
	466	{
	467	.start = CH_UART0_RX,
	468	.end = CH_UART0_RX+1,
	469	.flags = IORESOURCE_DMA,
	470	},
	471	};
	472
	473	static struct platform_device bfin_sir0_device = {
	474	.name = "bfin_sir",
	475	.id = 0,
	476	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	477	.resource = bfin_sir0_resources,
	478	};
5be36d22 GY	479	#endif
5be36d22 GY	480	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	481	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	482	{
	483	.start = 0xFFC02000,
	484	.end = 0xFFC020FF,
	485	.flags = IORESOURCE_MEM,
	486	},
42bd8bcb GY	487	{
	488	.start = IRQ_UART1_RX,
	489	.end = IRQ_UART1_RX+1,
	490	.flags = IORESOURCE_IRQ,
	491	},
	492	{
	493	.start = CH_UART1_RX,
	494	.end = CH_UART1_RX+1,
	495	.flags = IORESOURCE_DMA,
	496	},
5be36d22 GY	497	};
5be36d22 GY	498
42bd8bcb	499	static struct platform_device bfin_sir1_device = {
5be36d22	500	.name = "bfin_sir",
42bd8bcb GY	501	.id = 1,
	502	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	503	.resource = bfin_sir1_resources,
5be36d22 GY	504	};
5be36d22 GY	505	#endif
42bd8bcb	506	#endif
1394f032 BW	507
	508	static struct platform_device *stamp_devices[] __initdata = {
	509	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	510	&bfin_pcmcia_cf_device,
	511	#endif
	512
	513	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	514	&rtc_device,
	515	#endif
	516
	517	#if defined(CONFIG_USB_SL811_HCD) \|\| defined(CONFIG_USB_SL811_HCD_MODULE)
	518	&sl811_hcd_device,
	519	#endif
	520
1394f032 BW	521	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	522	&smc91x_device,
	523	#endif
	524
	525	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	526	&bfin_mii_bus,
1394f032 BW	527	&bfin_mac_device,
	528	#endif
	529
	530	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	531	&net2272_bfin_device,
	532	#endif
	533
	534	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb	535	&bfin_spi0_device,
1394f032 BW	536	#endif
	537
	538	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	539	&bfin_fb_device,
	540	#endif
	541
	542	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	543	#ifdef CONFIG_SERIAL_BFIN_UART0
	544	&bfin_uart0_device,
	545	#endif
	546	#ifdef CONFIG_SERIAL_BFIN_UART1
	547	&bfin_uart1_device,
	548	#endif
1394f032	549	#endif
5be36d22 GY	550
5be36d22 GY	551	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	552	#ifdef CONFIG_BFIN_SIR0
	553	&bfin_sir0_device,
	554	#endif
	555	#ifdef CONFIG_BFIN_SIR1
	556	&bfin_sir1_device,
	557	#endif
5be36d22	558	#endif
1394f032 BW	559	};
1394f032 BW	560
7f6678c5	561	static int __init pnav_init(void)
1394f032	562	{
b85d858b	563	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 BW	564	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
	565	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	566	spi_register_board_info(bfin_spi_board_info,
	567	ARRAY_SIZE(bfin_spi_board_info));
	568	#endif
	569	return 0;
	570	}
	571
7f6678c5	572	arch_initcall(pnav_init);
137b1529	573
9862cc52	574	void bfin_get_ether_addr(char *addr)
137b1529 MF	575	{
	576	random_ether_addr(addr);
	577	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
	578	}
9862cc52	579	EXPORT_SYMBOL(bfin_get_ether_addr);