[net-next-2.6.git] / arch / blackfin / mach-bf537 / boards / cm_bf537e.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *           2008-2009 Bluetechnix
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/ata_platform.h>
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <asm/dpmc.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF537E";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
		},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	},
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
static struct platform_device hitachi_fb_device = {
	.name = "hitachi-tx09",
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.start = 0x20200300,
		.end = 0x20200300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF14,
		.end = IRQ_PF14,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
		},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x20308000,
		.end = 0x20308000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20308004,
		.end = 0x20308004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PG15,
		.end = IRQ_PG15,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PG13,
		.end = IRQ_PG13,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
static struct mtd_partition cm_partitions[] = {
	{
		.name   = "bootloader(nor)",
		.size   = 0x40000,
		.offset = 0,
	}, {
		.name   = "linux kernel(nor)",
		.size   = 0x100000,
		.offset = MTDPART_OFS_APPEND,
	}, {
		.name   = "file system(nor)",
		.size   = MTDPART_SIZ_FULL,
		.offset = MTDPART_OFS_APPEND,
	}
};

static struct physmap_flash_data cm_flash_data = {
	.width    = 2,
	.parts    = cm_partitions,
	.nr_parts = ARRAY_SIZE(cm_partitions),
};

static unsigned cm_flash_gpios[] = { GPIO_PF4 };

static struct resource cm_flash_resource[] = {
	{
		.name  = "cfi_probe",
		.start = 0x20000000,
		.end   = 0x201fffff,
		.flags = IORESOURCE_MEM,
	}, {
		.start = (unsigned long)cm_flash_gpios,
		.end   = ARRAY_SIZE(cm_flash_gpios),
		.flags = IORESOURCE_IRQ,
	}
};

static struct platform_device cm_flash_device = {
	.name          = "gpio-addr-flash",
	.id            = 0,
	.dev = {
		.platform_data = &cm_flash_data,
	},
	.num_resources = ARRAY_SIZE(cm_flash_resource),
	.resource      = cm_flash_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = UART0_THR,
		.end = UART0_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
#ifdef CONFIG_BFIN_UART0_CTSRTS
	{
		/*
		 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
		 */
		.start = -1,
		.end = -1,
		.flags = IORESOURCE_IO,
	},
	{
		/*
		 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
		 */
		.start = -1,
		.end = -1,
		.flags = IORESOURCE_IO,
	},
#endif
};

unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
static struct resource bfin_uart1_resources[] = {
	{
		.start = UART1_THR,
		.end = UART1_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART1_ERROR,
		.end = IRQ_UART1_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_TX,
		.end = CH_UART1_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX,
		.flags = IORESOURCE_DMA,
	},
#ifdef CONFIG_BFIN_UART1_CTSRTS
	{
		/*
		 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
		 */
		.start = -1,
		.end = -1,
		.flags = IORESOURCE_IO,
	},
	{
		/*
		 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
		 */
		.start = -1,
		.end = -1,
		.flags = IORESOURCE_IO,
	},
#endif
};

unsigned short bfin_uart1_peripherals[] = {
	P_UART1_TX, P_UART1_RX, 0
};

static struct platform_device bfin_uart1_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
	.resource = bfin_uart1_resources,
	.dev = {
		.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};
static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#ifdef CONFIG_BFIN_SIR1
static struct resource bfin_sir1_resources[] = {
	{
		.start = 0xFFC02000,
		.end = 0xFFC020FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART1_RX,
		.end = IRQ_UART1_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART1_RX,
		.end = CH_UART1_RX+1,
		.flags = IORESOURCE_DMA,
	},
};
static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
};
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
static struct resource bfin_twi0_resource[] = {
	[0] = {
		.start = TWI0_REGBASE,
		.end   = TWI0_REGBASE,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = IRQ_TWI,
		.end   = IRQ_TWI,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device i2c_bfin_twi_device = {
	.name = "i2c-bfin-twi",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	.resource = bfin_twi0_resource,
};
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
};

static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev.platform_data = &bfin_mii_bus,
};
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
#define PATA_INT	IRQ_PF14

static struct pata_platform_info bfin_pata_platform_data = {
	.ioport_shift = 2,
	.irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
};

static struct resource bfin_pata_resources[] = {
	{
		.start = 0x2030C000,
		.end = 0x2030C01F,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = 0x2030D018,
		.end = 0x2030D01B,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = PATA_INT,
		.end = PATA_INT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device bfin_pata_device = {
	.name = "pata_platform",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	.resource = bfin_pata_resources,
	.dev = {
		.platform_data = &bfin_pata_platform_data,
	}
};
#endif

static const unsigned int cclk_vlev_datasheet[] =
{
	VRPAIR(VLEV_085, 250000000),
	VRPAIR(VLEV_090, 376000000),
	VRPAIR(VLEV_095, 426000000),
	VRPAIR(VLEV_100, 426000000),
	VRPAIR(VLEV_105, 476000000),
	VRPAIR(VLEV_110, 476000000),
	VRPAIR(VLEV_115, 476000000),
	VRPAIR(VLEV_120, 500000000),
	VRPAIR(VLEV_125, 533000000),
	VRPAIR(VLEV_130, 600000000),
};

static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	.tuple_tab = cclk_vlev_datasheet,
	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	.vr_settling_time = 25 /* us */,
};

static struct platform_device bfin_dpmc = {
	.name = "bfin dpmc",
	.dev = {
		.platform_data = &bfin_dmpc_vreg_data,
	},
};

static struct platform_device *cm_bf537e_devices[] __initdata = {

	&bfin_dpmc,

#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
	&hitachi_fb_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	&bfin_uart1_device,
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
#endif
#endif

#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	&i2c_bfin_twi_device,
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	&bfin_pata_device,
#endif

#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	&cm_flash_device,
#endif
};

static int __init cm_bf537e_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif

#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
	irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
#endif
	return 0;
}

arch_initcall(cm_bf537e_init);

void bfin_get_ether_addr(char *addr)
{
	random_ether_addr(addr);
	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
}
EXPORT_SYMBOL(bfin_get_ether_addr);
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2008-2009 Bluetechnix
	4	* 2005 National ICT Australia (NICTA)
	5	* Aidan Williams <aidan@nicta.com.au>
1394f032	6	*
96f1050d	7	* Licensed under the GPL-2 or later.
1394f032 BW	8	*/
	9
	10	#include <linux/device.h>
43f73fef	11	#include <linux/etherdevice.h>
1394f032 BW	12	#include <linux/platform_device.h>
	13	#include <linux/mtd/mtd.h>
	14	#include <linux/mtd/partitions.h>
8ea89497	15	#include <linux/mtd/physmap.h>
1394f032 BW	16	#include <linux/spi/spi.h>
1394f032 BW	17	#include <linux/spi/flash.h>
b964c592	18	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	19	#include <linux/usb/isp1362.h>
b964c592	20	#endif
0a87e3e9	21	#include <linux/ata_platform.h>
1f83b8f1	22	#include <linux/irq.h>
c6c4d7bb	23	#include <asm/dma.h>
1394f032	24	#include <asm/bfin5xx_spi.h>
5d448dd5	25	#include <asm/portmux.h>
14b03204	26	#include <asm/dpmc.h>
1394f032 BW	27
	28	/*
	29	* Name the Board for the /proc/cpuinfo
	30	*/
60584344	31	const char bfin_board_name[] = "Bluetechnix CM BF537E";
1394f032 BW	32
	33	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	34	/* all SPI peripherals info goes here */
	35
	36	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	37	static struct mtd_partition bfin_spi_flash_partitions[] = {
	38	{
aa582977	39	.name = "bootloader(spi)",
1394f032 BW	40	.size = 0x00020000,
	41	.offset = 0,
	42	.mask_flags = MTD_CAP_ROM
1f83b8f1	43	}, {
aa582977	44	.name = "linux kernel(spi)",
1394f032 BW	45	.size = 0xe0000,
1394f032 BW	46	.offset = 0x20000
1f83b8f1	47	}, {
aa582977	48	.name = "file system(spi)",
1394f032 BW	49	.size = 0x700000,
	50	.offset = 0x00100000,
	51	}
	52	};
	53
	54	static struct flash_platform_data bfin_spi_flash_data = {
	55	.name = "m25p80",
	56	.parts = bfin_spi_flash_partitions,
	57	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	58	.type = "m25p64",
	59	};
	60
	61	/* SPI flash chip (m25p64) */
	62	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	63	.enable_dma = 0, /* use dma transfer with this chip*/
	64	.bits_per_word = 8,
	65	};
	66	#endif
	67
a261eec0	68	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	69	/* SPI ADC chip */
	70	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	71	.enable_dma = 1, /* use dma transfer with this chip*/
	72	.bits_per_word = 16,
	73	};
	74	#endif
	75
	76	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	77	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	78	.enable_dma = 0,
	79	.bits_per_word = 16,
	80	};
	81	#endif
	82
f3f704d3 MH	83	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	84	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	85	.enable_dma = 0,
1394f032 BW	86	.bits_per_word = 8,
	87	};
	88	#endif
	89
	90	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	91	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	92	{
	93	/* the modalias must be the same as spi device driver name */
	94	.modalias = "m25p80", /* Name of spi_driver for this device */
	95	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	96	.bus_num = 0, /* Framework bus number */
1394f032 BW	97	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	98	.platform_data = &bfin_spi_flash_data,
	99	.controller_data = &spi_flash_chip_info,
	100	.mode = SPI_MODE_3,
	101	},
	102	#endif
	103
a261eec0	104	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	105	{
	106	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	107	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	108	.bus_num = 0, /* Framework bus number */
1394f032 BW	109	.chip_select = 1, /* Framework chip select. */
	110	.platform_data = NULL, /* No spi_driver specific config */
	111	.controller_data = &spi_adc_chip_info,
	112	},
	113	#endif
	114
	115	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	116	{
dac98174	117	.modalias = "ad1836",
1394f032	118	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	119	.bus_num = 0,
1394f032 BW	120	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	121	.controller_data = &ad1836_spi_chip_info,
	122	},
	123	#endif
	124
f3f704d3	125	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
1394f032	126	{
f3f704d3 MH	127	.modalias = "mmc_spi",
f3f704d3 MH	128	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	129	.bus_num = 0,
f3f704d3 MH	130	.chip_select = 1,
f3f704d3 MH	131	.controller_data = &mmc_spi_chip_info,
1394f032 BW	132	.mode = SPI_MODE_3,
	133	},
	134	#endif
	135	};
	136
c6c4d7bb BW	137	/* SPI (0) */
	138	static struct resource bfin_spi0_resource[] = {
	139	[0] = {
	140	.start = SPI0_REGBASE,
	141	.end = SPI0_REGBASE + 0xFF,
	142	.flags = IORESOURCE_MEM,
	143	},
	144	[1] = {
	145	.start = CH_SPI,
	146	.end = CH_SPI,
53122693 YL	147	.flags = IORESOURCE_DMA,
	148	},
	149	[2] = {
	150	.start = IRQ_SPI,
	151	.end = IRQ_SPI,
c6c4d7bb	152	.flags = IORESOURCE_IRQ,
53122693	153	},
c6c4d7bb BW	154	};
c6c4d7bb BW	155
1394f032	156	/* SPI controller data */
c6c4d7bb	157	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	158	.num_chipselect = 8,
1394f032 BW	159	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	160	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	161	};
1394f032 BW	162
c6c4d7bb BW	163	static struct platform_device bfin_spi0_device = {
	164	.name = "bfin-spi",
	165	.id = 0, /* Bus number */
	166	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	167	.resource = bfin_spi0_resource,
1394f032	168	.dev = {
c6c4d7bb	169	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	170	},
	171	};
	172	#endif /* spi master and devices */
	173
	174	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	175	static struct platform_device rtc_device = {
	176	.name = "rtc-bfin",
	177	.id = -1,
	178	};
	179	#endif
	180
0d4a89bb MH	181	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	182	static struct platform_device hitachi_fb_device = {
	183	.name = "hitachi-tx09",
	184	};
	185	#endif
	186
1394f032	187	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	188	#include <linux/smc91x.h>
	189
	190	static struct smc91x_platdata smc91x_info = {
	191	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	192	.leda = RPC_LED_100_10,
	193	.ledb = RPC_LED_TX_RX,
	194	};
	195
1394f032 BW	196	static struct resource smc91x_resources[] = {
	197	{
	198	.start = 0x20200300,
	199	.end = 0x20200300 + 16,
	200	.flags = IORESOURCE_MEM,
1f83b8f1	201	}, {
1394f032 BW	202	.start = IRQ_PF14,
	203	.end = IRQ_PF14,
	204	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	205	},
	206	};
	207
	208	static struct platform_device smc91x_device = {
	209	.name = "smc91x",
	210	.id = 0,
	211	.num_resources = ARRAY_SIZE(smc91x_resources),
	212	.resource = smc91x_resources,
61f09b5a MH	213	.dev = {
	214	.platform_data = &smc91x_info,
	215	},
1394f032 BW	216	};
	217	#endif
	218
	219	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	220	static struct resource isp1362_hcd_resources[] = {
	221	{
	222	.start = 0x20308000,
	223	.end = 0x20308000,
	224	.flags = IORESOURCE_MEM,
1f83b8f1	225	}, {
1394f032 BW	226	.start = 0x20308004,
	227	.end = 0x20308004,
	228	.flags = IORESOURCE_MEM,
1f83b8f1	229	}, {
1394f032 BW	230	.start = IRQ_PG15,
	231	.end = IRQ_PG15,
	232	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	233	},
	234	};
	235
	236	static struct isp1362_platform_data isp1362_priv = {
	237	.sel15Kres = 1,
	238	.clknotstop = 0,
	239	.oc_enable = 0,
	240	.int_act_high = 0,
	241	.int_edge_triggered = 0,
	242	.remote_wakeup_connected = 0,
	243	.no_power_switching = 1,
	244	.power_switching_mode = 0,
	245	};
	246
	247	static struct platform_device isp1362_hcd_device = {
	248	.name = "isp1362-hcd",
	249	.id = 0,
	250	.dev = {
	251	.platform_data = &isp1362_priv,
	252	},
	253	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	254	.resource = isp1362_hcd_resources,
	255	};
	256	#endif
	257
	258	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	259	static struct resource net2272_bfin_resources[] = {
	260	{
60584344 HK	261	.start = 0x20300000,
60584344 HK	262	.end = 0x20300000 + 0x100,
1394f032	263	.flags = IORESOURCE_MEM,
1f83b8f1	264	}, {
60584344 HK	265	.start = IRQ_PG13,
60584344 HK	266	.end = IRQ_PG13,
1394f032 BW	267	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	268	},
	269	};
	270
	271	static struct platform_device net2272_bfin_device = {
	272	.name = "net2272",
	273	.id = -1,
	274	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	275	.resource = net2272_bfin_resources,
	276	};
	277	#endif
	278
8ea89497 MF	279	#if defined(CONFIG_MTD_GPIO_ADDR) \|\| defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	280	static struct mtd_partition cm_partitions[] = {
	281	{
	282	.name = "bootloader(nor)",
	283	.size = 0x40000,
	284	.offset = 0,
	285	}, {
	286	.name = "linux kernel(nor)",
60584344	287	.size = 0x100000,
8ea89497 MF	288	.offset = MTDPART_OFS_APPEND,
	289	}, {
	290	.name = "file system(nor)",
	291	.size = MTDPART_SIZ_FULL,
	292	.offset = MTDPART_OFS_APPEND,
	293	}
	294	};
	295
	296	static struct physmap_flash_data cm_flash_data = {
	297	.width = 2,
	298	.parts = cm_partitions,
	299	.nr_parts = ARRAY_SIZE(cm_partitions),
	300	};
	301
	302	static unsigned cm_flash_gpios[] = { GPIO_PF4 };
	303
	304	static struct resource cm_flash_resource[] = {
	305	{
	306	.name = "cfi_probe",
	307	.start = 0x20000000,
	308	.end = 0x201fffff,
	309	.flags = IORESOURCE_MEM,
	310	}, {
	311	.start = (unsigned long)cm_flash_gpios,
	312	.end = ARRAY_SIZE(cm_flash_gpios),
	313	.flags = IORESOURCE_IRQ,
	314	}
	315	};
	316
	317	static struct platform_device cm_flash_device = {
	318	.name = "gpio-addr-flash",
	319	.id = 0,
	320	.dev = {
	321	.platform_data = &cm_flash_data,
	322	},
	323	.num_resources = ARRAY_SIZE(cm_flash_resource),
	324	.resource = cm_flash_resource,
	325	};
	326	#endif
	327
1394f032	328	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
60584344 HK	329	#ifdef CONFIG_SERIAL_BFIN_UART0
60584344 HK	330	static struct resource bfin_uart0_resources[] = {
1394f032	331	{
6bd1fbea SZ	332	.start = UART0_THR,
6bd1fbea SZ	333	.end = UART0_GCTL+2,
1394f032	334	.flags = IORESOURCE_MEM,
60584344 HK	335	},
	336	{
	337	.start = IRQ_UART0_RX,
	338	.end = IRQ_UART0_RX+1,
	339	.flags = IORESOURCE_IRQ,
	340	},
	341	{
	342	.start = IRQ_UART0_ERROR,
	343	.end = IRQ_UART0_ERROR,
	344	.flags = IORESOURCE_IRQ,
	345	},
	346	{
	347	.start = CH_UART0_TX,
	348	.end = CH_UART0_TX,
	349	.flags = IORESOURCE_DMA,
	350	},
	351	{
	352	.start = CH_UART0_RX,
	353	.end = CH_UART0_RX,
	354	.flags = IORESOURCE_DMA,
	355	},
	356	#ifdef CONFIG_BFIN_UART0_CTSRTS
	357	{
	358	/*
	359	* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
	360	*/
	361	.start = -1,
	362	.end = -1,
	363	.flags = IORESOURCE_IO,
	364	},
	365	{
	366	/*
	367	* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
	368	*/
	369	.start = -1,
	370	.end = -1,
	371	.flags = IORESOURCE_IO,
	372	},
	373	#endif
	374	};
	375
6bd1fbea SZ	376	unsigned short bfin_uart0_peripherals[] = {
	377	P_UART0_TX, P_UART0_RX, 0
	378	};
	379
60584344 HK	380	static struct platform_device bfin_uart0_device = {
	381	.name = "bfin-uart",
	382	.id = 0,
	383	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	384	.resource = bfin_uart0_resources,
6bd1fbea SZ	385	.dev = {
	386	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	387	},
60584344 HK	388	};
	389	#endif
	390	#ifdef CONFIG_SERIAL_BFIN_UART1
	391	static struct resource bfin_uart1_resources[] = {
	392	{
6bd1fbea SZ	393	.start = UART1_THR,
6bd1fbea SZ	394	.end = UART1_GCTL+2,
1394f032 BW	395	.flags = IORESOURCE_MEM,
1394f032 BW	396	},
60584344 HK	397	{
	398	.start = IRQ_UART1_RX,
	399	.end = IRQ_UART1_RX+1,
	400	.flags = IORESOURCE_IRQ,
	401	},
	402	{
	403	.start = IRQ_UART1_ERROR,
	404	.end = IRQ_UART1_ERROR,
	405	.flags = IORESOURCE_IRQ,
	406	},
	407	{
	408	.start = CH_UART1_TX,
	409	.end = CH_UART1_TX,
	410	.flags = IORESOURCE_DMA,
	411	},
	412	{
	413	.start = CH_UART1_RX,
	414	.end = CH_UART1_RX,
	415	.flags = IORESOURCE_DMA,
	416	},
	417	#ifdef CONFIG_BFIN_UART1_CTSRTS
	418	{
	419	/*
	420	* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
	421	*/
	422	.start = -1,
	423	.end = -1,
	424	.flags = IORESOURCE_IO,
	425	},
	426	{
	427	/*
	428	* Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
	429	*/
	430	.start = -1,
	431	.end = -1,
	432	.flags = IORESOURCE_IO,
	433	},
	434	#endif
1394f032 BW	435	};
1394f032 BW	436
6bd1fbea SZ	437	unsigned short bfin_uart1_peripherals[] = {
	438	P_UART1_TX, P_UART1_RX, 0
	439	};
	440
60584344	441	static struct platform_device bfin_uart1_device = {
1394f032 BW	442	.name = "bfin-uart",
1394f032 BW	443	.id = 1,
60584344 HK	444	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
60584344 HK	445	.resource = bfin_uart1_resources,
6bd1fbea SZ	446	.dev = {
	447	.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
	448	},
1394f032 BW	449	};
1394f032 BW	450	#endif
60584344	451	#endif
1394f032	452
5be36d22	453	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	454	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	455	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	456	{
	457	.start = 0xFFC00400,
	458	.end = 0xFFC004FF,
	459	.flags = IORESOURCE_MEM,
	460	},
42bd8bcb GY	461	{
	462	.start = IRQ_UART0_RX,
	463	.end = IRQ_UART0_RX+1,
	464	.flags = IORESOURCE_IRQ,
	465	},
	466	{
	467	.start = CH_UART0_RX,
	468	.end = CH_UART0_RX+1,
	469	.flags = IORESOURCE_DMA,
	470	},
	471	};
	472	static struct platform_device bfin_sir0_device = {
	473	.name = "bfin_sir",
	474	.id = 0,
	475	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	476	.resource = bfin_sir0_resources,
	477	};
5be36d22 GY	478	#endif
5be36d22 GY	479	#ifdef CONFIG_BFIN_SIR1
42bd8bcb	480	static struct resource bfin_sir1_resources[] = {
5be36d22 GY	481	{
	482	.start = 0xFFC02000,
	483	.end = 0xFFC020FF,
	484	.flags = IORESOURCE_MEM,
	485	},
42bd8bcb GY	486	{
	487	.start = IRQ_UART1_RX,
	488	.end = IRQ_UART1_RX+1,
	489	.flags = IORESOURCE_IRQ,
	490	},
	491	{
	492	.start = CH_UART1_RX,
	493	.end = CH_UART1_RX+1,
	494	.flags = IORESOURCE_DMA,
	495	},
5be36d22	496	};
42bd8bcb	497	static struct platform_device bfin_sir1_device = {
5be36d22	498	.name = "bfin_sir",
42bd8bcb GY	499	.id = 1,
	500	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	501	.resource = bfin_sir1_resources,
5be36d22 GY	502	};
5be36d22 GY	503	#endif
42bd8bcb	504	#endif
5be36d22	505
56ce835b MF	506	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	507	static struct resource bfin_twi0_resource[] = {
	508	[0] = {
	509	.start = TWI0_REGBASE,
	510	.end = TWI0_REGBASE,
	511	.flags = IORESOURCE_MEM,
	512	},
	513	[1] = {
	514	.start = IRQ_TWI,
	515	.end = IRQ_TWI,
	516	.flags = IORESOURCE_IRQ,
	517	},
	518	};
	519
	520	static struct platform_device i2c_bfin_twi_device = {
	521	.name = "i2c-bfin-twi",
	522	.id = 0,
	523	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	524	.resource = bfin_twi0_resource,
	525	};
	526	#endif
	527
1394f032 BW	528	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	529	static struct platform_device bfin_sport0_uart_device = {
	530	.name = "bfin-sport-uart",
	531	.id = 0,
	532	};
	533
	534	static struct platform_device bfin_sport1_uart_device = {
	535	.name = "bfin-sport-uart",
	536	.id = 1,
	537	};
	538	#endif
	539
	540	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628 GY	541	static struct platform_device bfin_mii_bus = {
	542	.name = "bfin_mii_bus",
	543	};
	544
1394f032 BW	545	static struct platform_device bfin_mac_device = {
1394f032 BW	546	.name = "bfin_mac",
65319628	547	.dev.platform_data = &bfin_mii_bus,
1394f032 BW	548	};
	549	#endif
	550
c6c4d7bb	551	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
fe5aeb93	552	#define PATA_INT IRQ_PF14
c6c4d7bb BW	553
	554	static struct pata_platform_info bfin_pata_platform_data = {
	555	.ioport_shift = 2,
	556	.irq_type = IRQF_TRIGGER_HIGH \| IRQF_DISABLED,
	557	};
	558
	559	static struct resource bfin_pata_resources[] = {
	560	{
	561	.start = 0x2030C000,
	562	.end = 0x2030C01F,
	563	.flags = IORESOURCE_MEM,
	564	},
	565	{
	566	.start = 0x2030D018,
	567	.end = 0x2030D01B,
	568	.flags = IORESOURCE_MEM,
	569	},
	570	{
	571	.start = PATA_INT,
	572	.end = PATA_INT,
	573	.flags = IORESOURCE_IRQ,
	574	},
	575	};
	576
	577	static struct platform_device bfin_pata_device = {
	578	.name = "pata_platform",
	579	.id = -1,
	580	.num_resources = ARRAY_SIZE(bfin_pata_resources),
	581	.resource = bfin_pata_resources,
	582	.dev = {
	583	.platform_data = &bfin_pata_platform_data,
	584	}
	585	};
	586	#endif
	587
14b03204 MH	588	static const unsigned int cclk_vlev_datasheet[] =
	589	{
	590	VRPAIR(VLEV_085, 250000000),
	591	VRPAIR(VLEV_090, 376000000),
	592	VRPAIR(VLEV_095, 426000000),
	593	VRPAIR(VLEV_100, 426000000),
	594	VRPAIR(VLEV_105, 476000000),
	595	VRPAIR(VLEV_110, 476000000),
	596	VRPAIR(VLEV_115, 476000000),
	597	VRPAIR(VLEV_120, 500000000),
	598	VRPAIR(VLEV_125, 533000000),
	599	VRPAIR(VLEV_130, 600000000),
	600	};
	601
	602	static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	603	.tuple_tab = cclk_vlev_datasheet,
	604	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	605	.vr_settling_time = 25 /* us */,
	606	};
	607
	608	static struct platform_device bfin_dpmc = {
	609	.name = "bfin dpmc",
	610	.dev = {
	611	.platform_data = &bfin_dmpc_vreg_data,
	612	},
	613	};
	614
60584344	615	static struct platform_device *cm_bf537e_devices[] __initdata = {
14b03204 MH	616
	617	&bfin_dpmc,
	618
0d4a89bb MH	619	#if defined(CONFIG_FB_HITACHI_TX09) \|\| defined(CONFIG_FB_HITACHI_TX09_MODULE)
	620	&hitachi_fb_device,
	621	#endif
	622
1394f032 BW	623	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	624	&rtc_device,
	625	#endif
	626
	627	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
60584344 HK	628	#ifdef CONFIG_SERIAL_BFIN_UART0
	629	&bfin_uart0_device,
	630	#endif
	631	#ifdef CONFIG_SERIAL_BFIN_UART1
	632	&bfin_uart1_device,
	633	#endif
1394f032 BW	634	#endif
1394f032 BW	635
5be36d22	636	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	637	#ifdef CONFIG_BFIN_SIR0
	638	&bfin_sir0_device,
	639	#endif
	640	#ifdef CONFIG_BFIN_SIR1
	641	&bfin_sir1_device,
	642	#endif
5be36d22 GY	643	#endif
5be36d22 GY	644
56ce835b MF	645	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	646	&i2c_bfin_twi_device,
	647	#endif
	648
1394f032 BW	649	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	650	&bfin_sport0_uart_device,
	651	&bfin_sport1_uart_device,
	652	#endif
	653
	654	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	655	&isp1362_hcd_device,
	656	#endif
	657
	658	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	659	&smc91x_device,
	660	#endif
	661
	662	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
65319628	663	&bfin_mii_bus,
1394f032 BW	664	&bfin_mac_device,
	665	#endif
	666
	667	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	668	&net2272_bfin_device,
	669	#endif
	670
	671	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb BW	672	&bfin_spi0_device,
	673	#endif
	674
	675	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	676	&bfin_pata_device,
1394f032	677	#endif
8ea89497 MF	678
	679	#if defined(CONFIG_MTD_GPIO_ADDR) \|\| defined(CONFIG_MTD_GPIO_ADDR_MODULE)
	680	&cm_flash_device,
	681	#endif
1394f032 BW	682	};
1394f032 BW	683
60584344	684	static int __init cm_bf537e_init(void)
1394f032	685	{
b85d858b	686	printk(KERN_INFO "%s(): registering device resources\n", __func__);
60584344	687	platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
1394f032 BW	688	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	689	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	690	#endif
c6c4d7bb BW	691
	692	#if defined(CONFIG_PATA_PLATFORM) \|\| defined(CONFIG_PATA_PLATFORM_MODULE)
	693	irq_desc[PATA_INT].status \|= IRQ_NOAUTOEN;
	694	#endif
1394f032 BW	695	return 0;
	696	}
	697
60584344	698	arch_initcall(cm_bf537e_init);
137b1529	699
9862cc52	700	void bfin_get_ether_addr(char *addr)
137b1529 MF	701	{
	702	random_ether_addr(addr);
	703	printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
	704	}
9862cc52	705	EXPORT_SYMBOL(bfin_get_ether_addr);