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1 | /* |
2 | * File: arch/blackfin/mach-bf533/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: 2005 | |
7 | * Description: Board Info File for the BF533-STAMP | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/spi/flash.h> | |
37 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
38 | #include <linux/usb_isp1362.h> | |
39 | #endif | |
1f83b8f1 | 40 | #include <linux/irq.h> |
1394f032 BW |
41 | #include <asm/bfin5xx_spi.h> |
42 | ||
43 | /* | |
44 | * Name the Board for the /proc/cpuinfo | |
45 | */ | |
46 | char *bfin_board_name = "ADDS-BF533-STAMP"; | |
47 | ||
48 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
49 | static struct platform_device rtc_device = { | |
50 | .name = "rtc-bfin", | |
51 | .id = -1, | |
52 | }; | |
53 | #endif | |
54 | ||
55 | /* | |
56 | * Driver needs to know address, irq and flag pin. | |
57 | */ | |
58 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
59 | static struct resource smc91x_resources[] = { | |
60 | { | |
61 | .name = "smc91x-regs", | |
62 | .start = 0x20300300, | |
63 | .end = 0x20300300 + 16, | |
64 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 65 | }, { |
1394f032 BW |
66 | .start = IRQ_PF7, |
67 | .end = IRQ_PF7, | |
68 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
69 | }, | |
70 | }; | |
71 | ||
72 | static struct platform_device smc91x_device = { | |
73 | .name = "smc91x", | |
74 | .id = 0, | |
75 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
76 | .resource = smc91x_resources, | |
77 | }; | |
78 | #endif | |
79 | ||
80 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
81 | static struct resource net2272_bfin_resources[] = { | |
82 | { | |
83 | .start = 0x20300000, | |
84 | .end = 0x20300000 + 0x100, | |
85 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 86 | }, { |
1394f032 BW |
87 | .start = IRQ_PF10, |
88 | .end = IRQ_PF10, | |
89 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
90 | }, | |
91 | }; | |
92 | ||
93 | static struct platform_device net2272_bfin_device = { | |
94 | .name = "net2272", | |
95 | .id = -1, | |
96 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
97 | .resource = net2272_bfin_resources, | |
98 | }; | |
99 | #endif | |
100 | ||
101 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
102 | /* all SPI peripherals info goes here */ | |
103 | ||
104 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
105 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
106 | { | |
107 | .name = "bootloader", | |
108 | .size = 0x00020000, | |
109 | .offset = 0, | |
110 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 111 | }, { |
1394f032 BW |
112 | .name = "kernel", |
113 | .size = 0xe0000, | |
114 | .offset = 0x20000 | |
1f83b8f1 | 115 | }, { |
1394f032 BW |
116 | .name = "file system", |
117 | .size = 0x700000, | |
118 | .offset = 0x00100000, | |
119 | } | |
120 | }; | |
121 | ||
122 | static struct flash_platform_data bfin_spi_flash_data = { | |
123 | .name = "m25p80", | |
124 | .parts = bfin_spi_flash_partitions, | |
125 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
126 | .type = "m25p64", | |
127 | }; | |
128 | ||
129 | /* SPI flash chip (m25p64) */ | |
130 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
131 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
132 | .bits_per_word = 8, | |
133 | }; | |
134 | #endif | |
135 | ||
136 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
137 | /* SPI ADC chip */ | |
138 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
139 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
140 | .bits_per_word = 16, | |
141 | }; | |
142 | #endif | |
143 | ||
144 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
145 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
146 | .enable_dma = 0, | |
147 | .bits_per_word = 16, | |
148 | }; | |
149 | #endif | |
150 | ||
151 | #if defined(CONFIG_PBX) | |
152 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
153 | .ctl_reg = 0x4, /* send zero */ | |
154 | .enable_dma = 0, | |
155 | .bits_per_word = 8, | |
156 | .cs_change_per_word = 1, | |
157 | }; | |
158 | #endif | |
159 | ||
160 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
161 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
162 | .enable_dma = 0, | |
163 | .bits_per_word = 16, | |
164 | }; | |
165 | #endif | |
166 | ||
ed2fbf57 BW |
167 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
168 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
169 | .enable_dma = 1, | |
170 | .bits_per_word = 8, | |
171 | }; | |
172 | #endif | |
173 | ||
1394f032 BW |
174 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
175 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
176 | { | |
177 | /* the modalias must be the same as spi device driver name */ | |
178 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
179 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
180 | .bus_num = 1, /* Framework bus number */ | |
181 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ | |
182 | .platform_data = &bfin_spi_flash_data, | |
183 | .controller_data = &spi_flash_chip_info, | |
184 | .mode = SPI_MODE_3, | |
185 | }, | |
186 | #endif | |
187 | ||
188 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
189 | { | |
190 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
191 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
192 | .bus_num = 1, /* Framework bus number */ | |
193 | .chip_select = 1, /* Framework chip select. */ | |
194 | .platform_data = NULL, /* No spi_driver specific config */ | |
195 | .controller_data = &spi_adc_chip_info, | |
196 | }, | |
197 | #endif | |
198 | ||
199 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
200 | { | |
201 | .modalias = "ad1836-spi", | |
202 | .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */ | |
203 | .bus_num = 1, | |
204 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | |
205 | .controller_data = &ad1836_spi_chip_info, | |
206 | }, | |
207 | #endif | |
208 | ||
ed2fbf57 BW |
209 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
210 | { | |
211 | .modalias = "spi_mmc_dummy", | |
212 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
213 | .bus_num = 1, | |
214 | .chip_select = 0, | |
215 | .platform_data = NULL, | |
216 | .controller_data = &spi_mmc_chip_info, | |
217 | .mode = SPI_MODE_3, | |
218 | }, | |
219 | { | |
220 | .modalias = "spi_mmc", | |
221 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
222 | .bus_num = 1, | |
223 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | |
224 | .platform_data = NULL, | |
225 | .controller_data = &spi_mmc_chip_info, | |
226 | .mode = SPI_MODE_3, | |
227 | }, | |
228 | #endif | |
229 | ||
1394f032 BW |
230 | #if defined(CONFIG_PBX) |
231 | { | |
1f83b8f1 MF |
232 | .modalias = "fxs-spi", |
233 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
234 | .bus_num = 1, | |
235 | .chip_select = 3, | |
236 | .controller_data = &spi_si3xxx_chip_info, | |
1394f032 BW |
237 | .mode = SPI_MODE_3, |
238 | }, | |
239 | { | |
1f83b8f1 MF |
240 | .modalias = "fxo-spi", |
241 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
242 | .bus_num = 1, | |
243 | .chip_select = 2, | |
244 | .controller_data = &spi_si3xxx_chip_info, | |
1394f032 BW |
245 | .mode = SPI_MODE_3, |
246 | }, | |
247 | #endif | |
248 | ||
249 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
250 | { | |
251 | .modalias = "ad5304_spi", | |
252 | .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */ | |
253 | .bus_num = 1, | |
254 | .chip_select = 2, | |
255 | .platform_data = NULL, | |
256 | .controller_data = &ad5304_chip_info, | |
257 | .mode = SPI_MODE_2, | |
258 | }, | |
259 | #endif | |
260 | }; | |
261 | ||
262 | /* SPI controller data */ | |
263 | static struct bfin5xx_spi_master spi_bfin_master_info = { | |
264 | .num_chipselect = 8, | |
265 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
266 | }; | |
267 | ||
268 | static struct platform_device spi_bfin_master_device = { | |
269 | .name = "bfin-spi-master", | |
270 | .id = 1, /* Bus number */ | |
271 | .dev = { | |
272 | .platform_data = &spi_bfin_master_info, /* Passed to driver */ | |
273 | }, | |
274 | }; | |
275 | #endif /* spi master and devices */ | |
276 | ||
277 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
278 | static struct platform_device bfin_fb_device = { | |
279 | .name = "bf537-fb", | |
280 | }; | |
281 | #endif | |
282 | ||
283 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
284 | static struct resource bfin_uart_resources[] = { | |
285 | { | |
286 | .start = 0xFFC00400, | |
287 | .end = 0xFFC004FF, | |
288 | .flags = IORESOURCE_MEM, | |
289 | }, | |
290 | }; | |
291 | ||
292 | static struct platform_device bfin_uart_device = { | |
293 | .name = "bfin-uart", | |
294 | .id = 1, | |
295 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
296 | .resource = bfin_uart_resources, | |
297 | }; | |
298 | #endif | |
299 | ||
300 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
301 | static struct platform_device bfin_sport0_uart_device = { | |
302 | .name = "bfin-sport-uart", | |
303 | .id = 0, | |
304 | }; | |
305 | ||
306 | static struct platform_device bfin_sport1_uart_device = { | |
307 | .name = "bfin-sport-uart", | |
308 | .id = 1, | |
309 | }; | |
310 | #endif | |
311 | ||
312 | static struct platform_device *stamp_devices[] __initdata = { | |
313 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
314 | &rtc_device, | |
315 | #endif | |
316 | ||
317 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
318 | &smc91x_device, | |
319 | #endif | |
320 | ||
321 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) | |
322 | &net2272_bfin_device, | |
323 | #endif | |
324 | ||
325 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
326 | &spi_bfin_master_device, | |
327 | #endif | |
328 | ||
329 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
330 | &bfin_uart_device, | |
331 | #endif | |
332 | ||
333 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
334 | &bfin_sport0_uart_device, | |
335 | &bfin_sport1_uart_device, | |
336 | #endif | |
337 | }; | |
338 | ||
339 | static int __init stamp_init(void) | |
340 | { | |
c0fc525d MF |
341 | int ret; |
342 | ||
1394f032 | 343 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); |
c0fc525d MF |
344 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
345 | if (ret < 0) | |
346 | return ret; | |
347 | ||
348 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
349 | # if defined(CONFIG_BFIN_SHARED_FLASH_ENET) | |
350 | /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */ | |
351 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN)); | |
352 | bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN); | |
353 | SSYNC(); | |
354 | # endif | |
355 | #endif | |
356 | ||
1394f032 | 357 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c0fc525d | 358 | return spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
1394f032 | 359 | #endif |
1394f032 BW |
360 | } |
361 | ||
362 | arch_initcall(stamp_init); |