]>
Commit | Line | Data |
---|---|---|
1394f032 BW |
1 | /* |
2 | * File: arch/blackfin/mach-bf533/stamp.c | |
3 | * Based on: arch/blackfin/mach-bf533/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: 2005 | |
7 | * Description: Board Info File for the BF533-STAMP | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2006 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
de8c43f2 | 35 | #include <linux/mtd/physmap.h> |
1394f032 BW |
36 | #include <linux/spi/spi.h> |
37 | #include <linux/spi/flash.h> | |
38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | |
f02bcec5 | 39 | #include <linux/usb/isp1362.h> |
1394f032 | 40 | #endif |
0a87e3e9 | 41 | #include <linux/ata_platform.h> |
1f83b8f1 | 42 | #include <linux/irq.h> |
c6c4d7bb | 43 | #include <asm/dma.h> |
1394f032 | 44 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb | 45 | #include <asm/reboot.h> |
5d448dd5 | 46 | #include <asm/portmux.h> |
1394f032 BW |
47 | |
48 | /* | |
49 | * Name the Board for the /proc/cpuinfo | |
50 | */ | |
066954a3 | 51 | const char bfin_board_name[] = "ADDS-BF533-STAMP"; |
1394f032 BW |
52 | |
53 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
54 | static struct platform_device rtc_device = { | |
55 | .name = "rtc-bfin", | |
56 | .id = -1, | |
57 | }; | |
58 | #endif | |
59 | ||
60 | /* | |
61 | * Driver needs to know address, irq and flag pin. | |
62 | */ | |
63 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
64 | static struct resource smc91x_resources[] = { | |
65 | { | |
66 | .name = "smc91x-regs", | |
67 | .start = 0x20300300, | |
68 | .end = 0x20300300 + 16, | |
69 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 70 | }, { |
1394f032 BW |
71 | .start = IRQ_PF7, |
72 | .end = IRQ_PF7, | |
73 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
74 | }, | |
75 | }; | |
76 | ||
77 | static struct platform_device smc91x_device = { | |
78 | .name = "smc91x", | |
79 | .id = 0, | |
80 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
81 | .resource = smc91x_resources, | |
82 | }; | |
83 | #endif | |
84 | ||
c6c4d7bb BW |
85 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
86 | static struct platform_device bfin_fb_adv7393_device = { | |
87 | .name = "bfin-adv7393", | |
88 | }; | |
89 | #endif | |
90 | ||
1394f032 BW |
91 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
92 | static struct resource net2272_bfin_resources[] = { | |
93 | { | |
94 | .start = 0x20300000, | |
95 | .end = 0x20300000 + 0x100, | |
96 | .flags = IORESOURCE_MEM, | |
1f83b8f1 | 97 | }, { |
1394f032 BW |
98 | .start = IRQ_PF10, |
99 | .end = IRQ_PF10, | |
100 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
101 | }, | |
102 | }; | |
103 | ||
104 | static struct platform_device net2272_bfin_device = { | |
105 | .name = "net2272", | |
106 | .id = -1, | |
107 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), | |
108 | .resource = net2272_bfin_resources, | |
109 | }; | |
110 | #endif | |
111 | ||
de8c43f2 MF |
112 | static struct mtd_partition stamp_partitions[] = { |
113 | { | |
114 | .name = "Bootloader", | |
115 | .size = 0x20000, | |
116 | .offset = 0, | |
117 | }, { | |
118 | .name = "Kernel", | |
119 | .size = 0xE0000, | |
120 | .offset = MTDPART_OFS_APPEND, | |
121 | }, { | |
122 | .name = "RootFS", | |
123 | .size = MTDPART_SIZ_FULL, | |
124 | .offset = MTDPART_OFS_APPEND, | |
125 | } | |
126 | }; | |
127 | ||
128 | static struct physmap_flash_data stamp_flash_data = { | |
129 | .width = 2, | |
130 | .parts = stamp_partitions, | |
131 | .nr_parts = ARRAY_SIZE(stamp_partitions), | |
132 | }; | |
133 | ||
134 | static struct resource stamp_flash_resource[] = { | |
135 | { | |
136 | .name = "cfi_probe", | |
137 | .start = 0x20000000, | |
138 | .end = 0x203fffff, | |
139 | .flags = IORESOURCE_MEM, | |
140 | }, { | |
141 | .start = CONFIG_ENET_FLASH_PIN, | |
142 | .flags = IORESOURCE_IRQ, | |
143 | } | |
144 | }; | |
145 | ||
146 | static struct platform_device stamp_flash_device = { | |
147 | .name = "BF5xx-Flash", | |
148 | .id = 0, | |
149 | .dev = { | |
150 | .platform_data = &stamp_flash_data, | |
151 | }, | |
152 | .num_resources = ARRAY_SIZE(stamp_flash_resource), | |
153 | .resource = stamp_flash_resource, | |
154 | }; | |
155 | ||
1394f032 BW |
156 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
157 | /* all SPI peripherals info goes here */ | |
158 | ||
159 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
160 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
161 | { | |
162 | .name = "bootloader", | |
163 | .size = 0x00020000, | |
164 | .offset = 0, | |
165 | .mask_flags = MTD_CAP_ROM | |
1f83b8f1 | 166 | }, { |
1394f032 BW |
167 | .name = "kernel", |
168 | .size = 0xe0000, | |
169 | .offset = 0x20000 | |
1f83b8f1 | 170 | }, { |
1394f032 BW |
171 | .name = "file system", |
172 | .size = 0x700000, | |
173 | .offset = 0x00100000, | |
174 | } | |
175 | }; | |
176 | ||
177 | static struct flash_platform_data bfin_spi_flash_data = { | |
178 | .name = "m25p80", | |
179 | .parts = bfin_spi_flash_partitions, | |
180 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
181 | .type = "m25p64", | |
182 | }; | |
183 | ||
184 | /* SPI flash chip (m25p64) */ | |
185 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
186 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
187 | .bits_per_word = 8, | |
188 | }; | |
189 | #endif | |
190 | ||
191 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
192 | /* SPI ADC chip */ | |
193 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | |
194 | .enable_dma = 1, /* use dma transfer with this chip*/ | |
195 | .bits_per_word = 16, | |
196 | }; | |
197 | #endif | |
198 | ||
199 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
200 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
201 | .enable_dma = 0, | |
202 | .bits_per_word = 16, | |
203 | }; | |
204 | #endif | |
205 | ||
206 | #if defined(CONFIG_PBX) | |
207 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { | |
208 | .ctl_reg = 0x4, /* send zero */ | |
209 | .enable_dma = 0, | |
210 | .bits_per_word = 8, | |
211 | .cs_change_per_word = 1, | |
212 | }; | |
213 | #endif | |
214 | ||
215 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
216 | static struct bfin5xx_spi_chip ad5304_chip_info = { | |
217 | .enable_dma = 0, | |
218 | .bits_per_word = 16, | |
219 | }; | |
220 | #endif | |
221 | ||
ed2fbf57 BW |
222 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
223 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | |
224 | .enable_dma = 1, | |
225 | .bits_per_word = 8, | |
226 | }; | |
227 | #endif | |
228 | ||
1394f032 BW |
229 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
230 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) | |
231 | { | |
232 | /* the modalias must be the same as spi device driver name */ | |
233 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
234 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 235 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
236 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ |
237 | .platform_data = &bfin_spi_flash_data, | |
238 | .controller_data = &spi_flash_chip_info, | |
239 | .mode = SPI_MODE_3, | |
240 | }, | |
241 | #endif | |
242 | ||
243 | #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) | |
244 | { | |
245 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | |
246 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 247 | .bus_num = 0, /* Framework bus number */ |
1394f032 BW |
248 | .chip_select = 1, /* Framework chip select. */ |
249 | .platform_data = NULL, /* No spi_driver specific config */ | |
250 | .controller_data = &spi_adc_chip_info, | |
251 | }, | |
252 | #endif | |
253 | ||
254 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
255 | { | |
256 | .modalias = "ad1836-spi", | |
257 | .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 258 | .bus_num = 0, |
1394f032 BW |
259 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
260 | .controller_data = &ad1836_spi_chip_info, | |
261 | }, | |
262 | #endif | |
263 | ||
ed2fbf57 BW |
264 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
265 | { | |
266 | .modalias = "spi_mmc_dummy", | |
111cf97d | 267 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 268 | .bus_num = 0, |
ed2fbf57 BW |
269 | .chip_select = 0, |
270 | .platform_data = NULL, | |
271 | .controller_data = &spi_mmc_chip_info, | |
272 | .mode = SPI_MODE_3, | |
273 | }, | |
274 | { | |
275 | .modalias = "spi_mmc", | |
111cf97d | 276 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
c6c4d7bb | 277 | .bus_num = 0, |
ed2fbf57 BW |
278 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
279 | .platform_data = NULL, | |
280 | .controller_data = &spi_mmc_chip_info, | |
281 | .mode = SPI_MODE_3, | |
282 | }, | |
283 | #endif | |
284 | ||
1394f032 BW |
285 | #if defined(CONFIG_PBX) |
286 | { | |
1f83b8f1 MF |
287 | .modalias = "fxs-spi", |
288 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
289 | .bus_num = 0, |
290 | .chip_select = 8 - CONFIG_J11_JUMPER, | |
1f83b8f1 | 291 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
292 | .mode = SPI_MODE_3, |
293 | }, | |
294 | { | |
1f83b8f1 MF |
295 | .modalias = "fxo-spi", |
296 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb BW |
297 | .bus_num = 0, |
298 | .chip_select = 8 - CONFIG_J19_JUMPER, | |
1f83b8f1 | 299 | .controller_data = &spi_si3xxx_chip_info, |
1394f032 BW |
300 | .mode = SPI_MODE_3, |
301 | }, | |
302 | #endif | |
303 | ||
304 | #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) | |
305 | { | |
306 | .modalias = "ad5304_spi", | |
307 | .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */ | |
c6c4d7bb | 308 | .bus_num = 0, |
1394f032 BW |
309 | .chip_select = 2, |
310 | .platform_data = NULL, | |
311 | .controller_data = &ad5304_chip_info, | |
312 | .mode = SPI_MODE_2, | |
313 | }, | |
314 | #endif | |
315 | }; | |
316 | ||
c6c4d7bb BW |
317 | /* SPI (0) */ |
318 | static struct resource bfin_spi0_resource[] = { | |
319 | [0] = { | |
320 | .start = SPI0_REGBASE, | |
321 | .end = SPI0_REGBASE + 0xFF, | |
322 | .flags = IORESOURCE_MEM, | |
323 | }, | |
324 | [1] = { | |
325 | .start = CH_SPI, | |
326 | .end = CH_SPI, | |
327 | .flags = IORESOURCE_IRQ, | |
328 | } | |
329 | }; | |
330 | ||
1394f032 | 331 | /* SPI controller data */ |
c6c4d7bb | 332 | static struct bfin5xx_spi_master bfin_spi0_info = { |
1394f032 BW |
333 | .num_chipselect = 8, |
334 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 335 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
1394f032 BW |
336 | }; |
337 | ||
c6c4d7bb BW |
338 | static struct platform_device bfin_spi0_device = { |
339 | .name = "bfin-spi", | |
340 | .id = 0, /* Bus number */ | |
341 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
342 | .resource = bfin_spi0_resource, | |
1394f032 | 343 | .dev = { |
c6c4d7bb | 344 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
1394f032 BW |
345 | }, |
346 | }; | |
347 | #endif /* spi master and devices */ | |
348 | ||
349 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) | |
350 | static struct platform_device bfin_fb_device = { | |
351 | .name = "bf537-fb", | |
352 | }; | |
353 | #endif | |
354 | ||
355 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
356 | static struct resource bfin_uart_resources[] = { | |
357 | { | |
358 | .start = 0xFFC00400, | |
359 | .end = 0xFFC004FF, | |
360 | .flags = IORESOURCE_MEM, | |
361 | }, | |
362 | }; | |
363 | ||
364 | static struct platform_device bfin_uart_device = { | |
365 | .name = "bfin-uart", | |
366 | .id = 1, | |
367 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
368 | .resource = bfin_uart_resources, | |
369 | }; | |
370 | #endif | |
371 | ||
372 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
373 | static struct platform_device bfin_sport0_uart_device = { | |
374 | .name = "bfin-sport-uart", | |
375 | .id = 0, | |
376 | }; | |
377 | ||
378 | static struct platform_device bfin_sport1_uart_device = { | |
379 | .name = "bfin-sport-uart", | |
380 | .id = 1, | |
381 | }; | |
382 | #endif | |
383 | ||
c6c4d7bb BW |
384 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
385 | #define PATA_INT 55 | |
386 | ||
387 | static struct pata_platform_info bfin_pata_platform_data = { | |
388 | .ioport_shift = 1, | |
389 | .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED, | |
390 | }; | |
391 | ||
392 | static struct resource bfin_pata_resources[] = { | |
393 | { | |
394 | .start = 0x20314020, | |
395 | .end = 0x2031403F, | |
396 | .flags = IORESOURCE_MEM, | |
397 | }, | |
398 | { | |
399 | .start = 0x2031401C, | |
400 | .end = 0x2031401F, | |
401 | .flags = IORESOURCE_MEM, | |
402 | }, | |
403 | { | |
404 | .start = PATA_INT, | |
405 | .end = PATA_INT, | |
406 | .flags = IORESOURCE_IRQ, | |
407 | }, | |
408 | }; | |
409 | ||
410 | static struct platform_device bfin_pata_device = { | |
411 | .name = "pata_platform", | |
412 | .id = -1, | |
413 | .num_resources = ARRAY_SIZE(bfin_pata_resources), | |
414 | .resource = bfin_pata_resources, | |
415 | .dev = { | |
416 | .platform_data = &bfin_pata_platform_data, | |
417 | } | |
418 | }; | |
419 | #endif | |
420 | ||
2463ef22 MH |
421 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
422 | #include <linux/input.h> | |
423 | #include <linux/gpio_keys.h> | |
424 | ||
425 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
426 | {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"}, | |
427 | {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"}, | |
428 | {BTN_2, GPIO_PF8, 1, "gpio-keys: BTN2"}, | |
429 | }; | |
430 | ||
431 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
432 | .buttons = bfin_gpio_keys_table, | |
433 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
434 | }; | |
435 | ||
436 | static struct platform_device bfin_device_gpiokeys = { | |
437 | .name = "gpio-keys", | |
438 | .dev = { | |
439 | .platform_data = &bfin_gpio_keys_data, | |
440 | }, | |
441 | }; | |
442 | #endif | |
443 | ||
e3163954 BW |
444 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) |
445 | #include <linux/i2c-gpio.h> | |
446 | ||
447 | static struct i2c_gpio_platform_data i2c_gpio_data = { | |
448 | .sda_pin = 2, | |
449 | .scl_pin = 3, | |
450 | .sda_is_open_drain = 0, | |
451 | .scl_is_open_drain = 0, | |
452 | .udelay = 40, | |
453 | }; | |
454 | ||
455 | static struct platform_device i2c_gpio_device = { | |
456 | .name = "i2c-gpio", | |
457 | .id = 0, | |
458 | .dev = { | |
459 | .platform_data = &i2c_gpio_data, | |
460 | }, | |
461 | }; | |
462 | #endif | |
463 | ||
1394f032 BW |
464 | static struct platform_device *stamp_devices[] __initdata = { |
465 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) | |
466 | &rtc_device, | |
467 | #endif | |
468 | ||
469 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
470 | &smc91x_device, | |
471 | #endif | |
472 | ||
c6c4d7bb BW |
473 | #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) |
474 | &bfin_fb_adv7393_device, | |
475 | #endif | |
476 | ||
1394f032 BW |
477 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
478 | &net2272_bfin_device, | |
479 | #endif | |
480 | ||
481 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
c6c4d7bb | 482 | &bfin_spi0_device, |
1394f032 BW |
483 | #endif |
484 | ||
485 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
486 | &bfin_uart_device, | |
487 | #endif | |
488 | ||
489 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | |
490 | &bfin_sport0_uart_device, | |
491 | &bfin_sport1_uart_device, | |
492 | #endif | |
c6c4d7bb BW |
493 | |
494 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
495 | &bfin_pata_device, | |
496 | #endif | |
2463ef22 MH |
497 | |
498 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
499 | &bfin_device_gpiokeys, | |
500 | #endif | |
e3163954 BW |
501 | |
502 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | |
503 | &i2c_gpio_device, | |
504 | #endif | |
de8c43f2 | 505 | &stamp_flash_device, |
1394f032 BW |
506 | }; |
507 | ||
508 | static int __init stamp_init(void) | |
509 | { | |
c0fc525d MF |
510 | int ret; |
511 | ||
1394f032 | 512 | printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); |
c0fc525d MF |
513 | ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
514 | if (ret < 0) | |
515 | return ret; | |
516 | ||
517 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) | |
c0fc525d MF |
518 | /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */ |
519 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN)); | |
520 | bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN); | |
521 | SSYNC(); | |
c0fc525d MF |
522 | #endif |
523 | ||
1394f032 | 524 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c6c4d7bb BW |
525 | spi_register_board_info(bfin_spi_board_info, |
526 | ARRAY_SIZE(bfin_spi_board_info)); | |
527 | #endif | |
528 | #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) | |
529 | irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; | |
1394f032 | 530 | #endif |
c6c4d7bb | 531 | return 0; |
1394f032 BW |
532 | } |
533 | ||
534 | arch_initcall(stamp_init); | |
c6c4d7bb BW |
535 | |
536 | void native_machine_restart(char *cmd) | |
537 | { | |
de8c43f2 | 538 | #define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN) |
c6c4d7bb BW |
539 | bfin_write_FIO_INEN(~BIT_TO_SET); |
540 | bfin_write_FIO_DIR(BIT_TO_SET); | |
541 | bfin_write_FIO_FLAG_C(BIT_TO_SET); | |
c6c4d7bb | 542 | } |