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1/*
2 * File: arch/blackfin/mach-bf533/stamp.c
3 * Based on: arch/blackfin/mach-bf533/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board Info File for the BF533-STAMP
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
de8c43f2 35#include <linux/mtd/physmap.h>
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36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5 39#include <linux/usb/isp1362.h>
1394f032 40#endif
0a87e3e9 41#include <linux/ata_platform.h>
1f83b8f1 42#include <linux/irq.h>
81d9c7f2 43#include <linux/i2c.h>
c6c4d7bb 44#include <asm/dma.h>
1394f032 45#include <asm/bfin5xx_spi.h>
c6c4d7bb 46#include <asm/reboot.h>
5d448dd5 47#include <asm/portmux.h>
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48
49/*
50 * Name the Board for the /proc/cpuinfo
51 */
066954a3 52const char bfin_board_name[] = "ADDS-BF533-STAMP";
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53
54#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
55static struct platform_device rtc_device = {
56 .name = "rtc-bfin",
57 .id = -1,
58};
59#endif
60
61/*
62 * Driver needs to know address, irq and flag pin.
63 */
64#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
65static struct resource smc91x_resources[] = {
66 {
67 .name = "smc91x-regs",
68 .start = 0x20300300,
69 .end = 0x20300300 + 16,
70 .flags = IORESOURCE_MEM,
1f83b8f1 71 }, {
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72 .start = IRQ_PF7,
73 .end = IRQ_PF7,
74 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
75 },
76};
77
78static struct platform_device smc91x_device = {
79 .name = "smc91x",
80 .id = 0,
81 .num_resources = ARRAY_SIZE(smc91x_resources),
82 .resource = smc91x_resources,
83};
84#endif
85
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86#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
87static struct platform_device bfin_fb_adv7393_device = {
88 .name = "bfin-adv7393",
89};
90#endif
91
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92#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
93static struct resource net2272_bfin_resources[] = {
94 {
95 .start = 0x20300000,
96 .end = 0x20300000 + 0x100,
97 .flags = IORESOURCE_MEM,
1f83b8f1 98 }, {
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99 .start = IRQ_PF10,
100 .end = IRQ_PF10,
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
102 },
103};
104
105static struct platform_device net2272_bfin_device = {
106 .name = "net2272",
107 .id = -1,
108 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
109 .resource = net2272_bfin_resources,
110};
111#endif
112
793dc27b 113#if defined(CONFIG_MTD_BF5xx) || defined(CONFIG_MTD_BF5xx_MODULE)
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114static struct mtd_partition stamp_partitions[] = {
115 {
116 .name = "Bootloader",
edf05641 117 .size = 0x40000,
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118 .offset = 0,
119 }, {
120 .name = "Kernel",
121 .size = 0xE0000,
122 .offset = MTDPART_OFS_APPEND,
123 }, {
124 .name = "RootFS",
125 .size = MTDPART_SIZ_FULL,
126 .offset = MTDPART_OFS_APPEND,
127 }
128};
129
130static struct physmap_flash_data stamp_flash_data = {
131 .width = 2,
132 .parts = stamp_partitions,
133 .nr_parts = ARRAY_SIZE(stamp_partitions),
134};
135
136static struct resource stamp_flash_resource[] = {
137 {
138 .name = "cfi_probe",
139 .start = 0x20000000,
140 .end = 0x203fffff,
141 .flags = IORESOURCE_MEM,
142 }, {
143 .start = CONFIG_ENET_FLASH_PIN,
144 .flags = IORESOURCE_IRQ,
145 }
146};
147
148static struct platform_device stamp_flash_device = {
149 .name = "BF5xx-Flash",
150 .id = 0,
151 .dev = {
152 .platform_data = &stamp_flash_data,
153 },
154 .num_resources = ARRAY_SIZE(stamp_flash_resource),
155 .resource = stamp_flash_resource,
156};
793dc27b 157#endif
de8c43f2 158
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159#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
160/* all SPI peripherals info goes here */
161
162#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
163static struct mtd_partition bfin_spi_flash_partitions[] = {
164 {
165 .name = "bootloader",
edf05641 166 .size = 0x00040000,
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167 .offset = 0,
168 .mask_flags = MTD_CAP_ROM
1f83b8f1 169 }, {
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170 .name = "kernel",
171 .size = 0xe0000,
edf05641 172 .offset = MTDPART_OFS_APPEND,
1f83b8f1 173 }, {
1394f032 174 .name = "file system",
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175 .size = MTDPART_SIZ_FULL,
176 .offset = MTDPART_OFS_APPEND,
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177 }
178};
179
180static struct flash_platform_data bfin_spi_flash_data = {
181 .name = "m25p80",
182 .parts = bfin_spi_flash_partitions,
183 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
184 .type = "m25p64",
185};
186
187/* SPI flash chip (m25p64) */
188static struct bfin5xx_spi_chip spi_flash_chip_info = {
189 .enable_dma = 0, /* use dma transfer with this chip*/
190 .bits_per_word = 8,
191};
192#endif
193
194#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
195/* SPI ADC chip */
196static struct bfin5xx_spi_chip spi_adc_chip_info = {
197 .enable_dma = 1, /* use dma transfer with this chip*/
198 .bits_per_word = 16,
199};
200#endif
201
202#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
203static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
204 .enable_dma = 0,
205 .bits_per_word = 16,
206};
207#endif
208
209#if defined(CONFIG_PBX)
210static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
211 .ctl_reg = 0x4, /* send zero */
212 .enable_dma = 0,
213 .bits_per_word = 8,
214 .cs_change_per_word = 1,
215};
216#endif
217
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218#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
219static struct bfin5xx_spi_chip spi_mmc_chip_info = {
220 .enable_dma = 1,
221 .bits_per_word = 8,
222};
223#endif
224
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225#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
226static struct bfin5xx_spi_chip spidev_chip_info = {
227 .enable_dma = 0,
228 .bits_per_word = 8,
229};
230#endif
231
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232static struct spi_board_info bfin_spi_board_info[] __initdata = {
233#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
234 {
235 /* the modalias must be the same as spi device driver name */
236 .modalias = "m25p80", /* Name of spi_driver for this device */
237 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 238 .bus_num = 0, /* Framework bus number */
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239 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
240 .platform_data = &bfin_spi_flash_data,
241 .controller_data = &spi_flash_chip_info,
242 .mode = SPI_MODE_3,
243 },
244#endif
245
246#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
247 {
248 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
249 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 250 .bus_num = 0, /* Framework bus number */
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251 .chip_select = 1, /* Framework chip select. */
252 .platform_data = NULL, /* No spi_driver specific config */
253 .controller_data = &spi_adc_chip_info,
254 },
255#endif
256
257#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
258 {
259 .modalias = "ad1836-spi",
260 .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 261 .bus_num = 0,
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262 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
263 .controller_data = &ad1836_spi_chip_info,
264 },
265#endif
266
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267#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
268 {
269 .modalias = "spi_mmc_dummy",
111cf97d 270 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 271 .bus_num = 0,
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272 .chip_select = 0,
273 .platform_data = NULL,
274 .controller_data = &spi_mmc_chip_info,
275 .mode = SPI_MODE_3,
276 },
277 {
278 .modalias = "spi_mmc",
111cf97d 279 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb 280 .bus_num = 0,
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281 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
282 .platform_data = NULL,
283 .controller_data = &spi_mmc_chip_info,
284 .mode = SPI_MODE_3,
285 },
286#endif
287
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288#if defined(CONFIG_PBX)
289 {
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290 .modalias = "fxs-spi",
291 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
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292 .bus_num = 0,
293 .chip_select = 8 - CONFIG_J11_JUMPER,
1f83b8f1 294 .controller_data = &spi_si3xxx_chip_info,
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295 .mode = SPI_MODE_3,
296 },
297 {
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298 .modalias = "fxo-spi",
299 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
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300 .bus_num = 0,
301 .chip_select = 8 - CONFIG_J19_JUMPER,
1f83b8f1 302 .controller_data = &spi_si3xxx_chip_info,
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303 .mode = SPI_MODE_3,
304 },
305#endif
306
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307#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
308 {
309 .modalias = "spidev",
310 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
311 .bus_num = 0,
312 .chip_select = 1,
313 .controller_data = &spidev_chip_info,
314 },
315#endif
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316};
317
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318/* SPI (0) */
319static struct resource bfin_spi0_resource[] = {
320 [0] = {
321 .start = SPI0_REGBASE,
322 .end = SPI0_REGBASE + 0xFF,
323 .flags = IORESOURCE_MEM,
324 },
325 [1] = {
326 .start = CH_SPI,
327 .end = CH_SPI,
328 .flags = IORESOURCE_IRQ,
329 }
330};
331
1394f032 332/* SPI controller data */
c6c4d7bb 333static struct bfin5xx_spi_master bfin_spi0_info = {
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334 .num_chipselect = 8,
335 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 336 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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337};
338
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339static struct platform_device bfin_spi0_device = {
340 .name = "bfin-spi",
341 .id = 0, /* Bus number */
342 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
343 .resource = bfin_spi0_resource,
1394f032 344 .dev = {
c6c4d7bb 345 .platform_data = &bfin_spi0_info, /* Passed to driver */
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346 },
347};
348#endif /* spi master and devices */
349
350#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
351static struct platform_device bfin_fb_device = {
352 .name = "bf537-fb",
353};
354#endif
355
356#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
357static struct resource bfin_uart_resources[] = {
358 {
359 .start = 0xFFC00400,
360 .end = 0xFFC004FF,
361 .flags = IORESOURCE_MEM,
362 },
363};
364
365static struct platform_device bfin_uart_device = {
366 .name = "bfin-uart",
367 .id = 1,
368 .num_resources = ARRAY_SIZE(bfin_uart_resources),
369 .resource = bfin_uart_resources,
370};
371#endif
372
5be36d22
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373#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
374static struct resource bfin_sir_resources[] = {
375#ifdef CONFIG_BFIN_SIR0
376 {
377 .start = 0xFFC00400,
378 .end = 0xFFC004FF,
379 .flags = IORESOURCE_MEM,
380 },
381#endif
382};
383
384static struct platform_device bfin_sir_device = {
385 .name = "bfin_sir",
386 .id = 0,
387 .num_resources = ARRAY_SIZE(bfin_sir_resources),
388 .resource = bfin_sir_resources,
389};
390#endif
391
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392#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
393static struct platform_device bfin_sport0_uart_device = {
394 .name = "bfin-sport-uart",
395 .id = 0,
396};
397
398static struct platform_device bfin_sport1_uart_device = {
399 .name = "bfin-sport-uart",
400 .id = 1,
401};
402#endif
403
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404#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
405#define PATA_INT 55
406
407static struct pata_platform_info bfin_pata_platform_data = {
408 .ioport_shift = 1,
409 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
410};
411
412static struct resource bfin_pata_resources[] = {
413 {
414 .start = 0x20314020,
415 .end = 0x2031403F,
416 .flags = IORESOURCE_MEM,
417 },
418 {
419 .start = 0x2031401C,
420 .end = 0x2031401F,
421 .flags = IORESOURCE_MEM,
422 },
423 {
424 .start = PATA_INT,
425 .end = PATA_INT,
426 .flags = IORESOURCE_IRQ,
427 },
428};
429
430static struct platform_device bfin_pata_device = {
431 .name = "pata_platform",
432 .id = -1,
433 .num_resources = ARRAY_SIZE(bfin_pata_resources),
434 .resource = bfin_pata_resources,
435 .dev = {
436 .platform_data = &bfin_pata_platform_data,
437 }
438};
439#endif
440
2463ef22
MH
441#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
442#include <linux/input.h>
443#include <linux/gpio_keys.h>
444
445static struct gpio_keys_button bfin_gpio_keys_table[] = {
f1bceb47
MH
446 {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
447 {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
448 {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
2463ef22
MH
449};
450
451static struct gpio_keys_platform_data bfin_gpio_keys_data = {
452 .buttons = bfin_gpio_keys_table,
453 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
454};
455
456static struct platform_device bfin_device_gpiokeys = {
457 .name = "gpio-keys",
458 .dev = {
459 .platform_data = &bfin_gpio_keys_data,
460 },
461};
462#endif
463
cad2ab65
MF
464static struct resource bfin_gpios_resources = {
465 .start = 0,
466 .end = MAX_BLACKFIN_GPIOS - 1,
467 .flags = IORESOURCE_IRQ,
468};
469
470static struct platform_device bfin_gpios_device = {
471 .name = "simple-gpio",
472 .id = -1,
473 .num_resources = 1,
474 .resource = &bfin_gpios_resources,
475};
476
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477#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
478#include <linux/i2c-gpio.h>
479
480static struct i2c_gpio_platform_data i2c_gpio_data = {
481 .sda_pin = 2,
482 .scl_pin = 3,
483 .sda_is_open_drain = 0,
484 .scl_is_open_drain = 0,
485 .udelay = 40,
486};
487
488static struct platform_device i2c_gpio_device = {
489 .name = "i2c-gpio",
490 .id = 0,
491 .dev = {
492 .platform_data = &i2c_gpio_data,
493 },
494};
495#endif
496
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497#ifdef CONFIG_I2C_BOARDINFO
498static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
499#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
500 {
501 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
502 .type = "ad7142_joystick",
503 .irq = 39,
504 },
505#endif
506#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
507 {
508 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
509 .type = "pcf8574_lcd",
510 },
511#endif
512#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
513 {
514 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
515 .type = "pcf8574_keypad",
516 .irq = 39,
517 },
518#endif
519};
520#endif
521
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522static struct platform_device *stamp_devices[] __initdata = {
523#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
524 &rtc_device,
525#endif
526
527#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
528 &smc91x_device,
529#endif
530
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531#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
532 &bfin_fb_adv7393_device,
533#endif
534
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535#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
536 &net2272_bfin_device,
537#endif
538
539#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb 540 &bfin_spi0_device,
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541#endif
542
543#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
544 &bfin_uart_device,
545#endif
546
5be36d22
GY
547#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
548 &bfin_sir_device,
549#endif
550
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551#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
552 &bfin_sport0_uart_device,
553 &bfin_sport1_uart_device,
554#endif
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555
556#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
557 &bfin_pata_device,
558#endif
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MH
559
560#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
561 &bfin_device_gpiokeys,
562#endif
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563
564#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
565 &i2c_gpio_device,
566#endif
cad2ab65
MF
567
568 &bfin_gpios_device,
793dc27b
MF
569
570#if defined(CONFIG_MTD_BF5xx) || defined(CONFIG_MTD_BF5xx_MODULE)
de8c43f2 571 &stamp_flash_device,
793dc27b 572#endif
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573};
574
575static int __init stamp_init(void)
576{
c0fc525d
MF
577 int ret;
578
b85d858b 579 printk(KERN_INFO "%s(): registering device resources\n", __func__);
81d9c7f2
BW
580
581#ifdef CONFIG_I2C_BOARDINFO
582 i2c_register_board_info(0, bfin_i2c_board_info,
583 ARRAY_SIZE(bfin_i2c_board_info));
584#endif
585
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MF
586 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
587 if (ret < 0)
588 return ret;
589
590#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
c0fc525d
MF
591 /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
592 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
593 bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
594 SSYNC();
c0fc525d
MF
595#endif
596
1394f032 597#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb
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598 spi_register_board_info(bfin_spi_board_info,
599 ARRAY_SIZE(bfin_spi_board_info));
600#endif
601#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
602 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
1394f032 603#endif
c6c4d7bb 604 return 0;
1394f032
BW
605}
606
607arch_initcall(stamp_init);
c6c4d7bb
BW
608
609void native_machine_restart(char *cmd)
610{
de8c43f2 611#define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
c6c4d7bb
BW
612 bfin_write_FIO_INEN(~BIT_TO_SET);
613 bfin_write_FIO_DIR(BIT_TO_SET);
614 bfin_write_FIO_FLAG_C(BIT_TO_SET);
c6c4d7bb 615}