[net-next-2.6.git] / arch / blackfin / mach-bf533 / boards / cm_bf533.c

/*
 * Copyright 2004-2009 Analog Devices Inc.
 *           2008-2009 Bluetechnix
 *                2005 National ICT Australia (NICTA)
 *                      Aidan Williams <aidan@nicta.com.au>
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/spi/mmc_spi.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/irq.h>
#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/portmux.h>
#include <asm/dpmc.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "Bluetechnix CM BF533";

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader(spi)",
		.size = 0x00020000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "linux kernel(spi)",
		.size = 0xe0000,
		.offset = 0x20000
	}, {
		.name = "file system(spi)",
		.size = 0x700000,
		.offset = 0x00100000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

/* SPI ADC chip */
#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
};
#endif

static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80",       /* Name of spi_driver for this device */
		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,               /* Framework bus number */
		.chip_select = 1,           /* Framework chip select. On STAMP537 it is SPISSEL1*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,               /* Framework bus number */
		.chip_select = 2,           /* Framework chip select. */
		.platform_data = NULL,      /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836",
		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
	{
		.modalias = "mmc_spi",
		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
		.bus_num = 0,
		.chip_select = 1,
		.controller_data = &mmc_spi_chip_info,
		.mode = SPI_MODE_3,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = IRQ_SPI,
		.end   = IRQ_SPI,
		.flags = IORESOURCE_IRQ,
	}
};

/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
#include <linux/smc91x.h>

static struct smc91x_platdata smc91x_info = {
	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda = RPC_LED_100_10,
	.ledb = RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	{
		.start = 0x20200300,
		.end = 0x20200300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF0,
		.end = IRQ_PF0,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};
static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
};
#endif

#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
#include <linux/smsc911x.h>

static struct resource smsc911x_resources[] = {
	{
		.name = "smsc911x-memory",
		.start = 0x20308000,
		.end = 0x20308000 + 0xFF,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF8,
		.end = IRQ_PF8,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct smsc911x_platform_config smsc911x_config = {
	.flags = SMSC911X_USE_16BIT,
	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.phy_interface = PHY_INTERFACE_MODE_MII,
};

static struct platform_device smsc911x_device = {
	.name = "smsc911x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smsc911x_resources),
	.resource = smsc911x_resources,
	.dev = {
		.platform_data = &smsc911x_config,
	},
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
static struct resource bfin_uart0_resources[] = {
	{
		.start = BFIN_UART_THR,
		.end = BFIN_UART_GCTL+2,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX + 1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = IRQ_UART0_ERROR,
		.end = IRQ_UART0_ERROR,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_TX,
		.end = CH_UART0_TX,
		.flags = IORESOURCE_DMA,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX,
		.flags = IORESOURCE_DMA,
	},
};

unsigned short bfin_uart0_peripherals[] = {
	P_UART0_TX, P_UART0_RX, 0
};

static struct platform_device bfin_uart0_device = {
	.name = "bfin-uart",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	.resource = bfin_uart0_resources,
	.dev = {
		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	},
};
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
};

static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
};
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
static struct resource isp1362_hcd_resources[] = {
	{
		.start = 0x20308000,
		.end = 0x20308000,
		.flags = IORESOURCE_MEM,
	}, {
		.start = 0x20308004,
		.end = 0x20308004,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF4,
		.end = IRQ_PF4,
		.flags = IORESOURCE_IRQ,
	},
};

static struct isp1362_platform_data isp1362_priv = {
	.sel15Kres = 1,
	.clknotstop = 0,
	.oc_enable = 0,
	.int_act_high = 0,
	.int_edge_triggered = 0,
	.remote_wakeup_connected = 0,
	.no_power_switching = 1,
	.power_switching_mode = 0,
};

static struct platform_device isp1362_hcd_device = {
	.name = "isp1362-hcd",
	.id = 0,
	.dev = {
		.platform_data = &isp1362_priv,
	},
	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	.resource = isp1362_hcd_resources,
};
#endif


#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF6,
		.end = IRQ_PF6,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif


#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition para_partitions[] = {
	{
		.name       = "bootloader(nor)",
		.size       = 0x40000,
		.offset     = 0,
	}, {
		.name       = "linux+rootfs(nor)",
		.size       = MTDPART_SIZ_FULL,
		.offset     = MTDPART_OFS_APPEND,
	},
};

static struct physmap_flash_data para_flash_data = {
	.width      = 2,
	.parts      = para_partitions,
	.nr_parts   = ARRAY_SIZE(para_partitions),
};

static struct resource para_flash_resource = {
	.start = 0x20000000,
	.end   = 0x201fffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device para_flash_device = {
	.name          = "physmap-flash",
	.id            = 0,
	.dev = {
		.platform_data = &para_flash_data,
	},
	.num_resources = 1,
	.resource      = &para_flash_resource,
};
#endif


static const unsigned int cclk_vlev_datasheet[] =
{
	VRPAIR(VLEV_085, 250000000),
	VRPAIR(VLEV_090, 376000000),
	VRPAIR(VLEV_095, 426000000),
	VRPAIR(VLEV_100, 426000000),
	VRPAIR(VLEV_105, 476000000),
	VRPAIR(VLEV_110, 476000000),
	VRPAIR(VLEV_115, 476000000),
	VRPAIR(VLEV_120, 600000000),
	VRPAIR(VLEV_125, 600000000),
	VRPAIR(VLEV_130, 600000000),
};

static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	.tuple_tab = cclk_vlev_datasheet,
	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	.vr_settling_time = 25 /* us */,
};

static struct platform_device bfin_dpmc = {
	.name = "bfin dpmc",
	.dev = {
		.platform_data = &bfin_dmpc_vreg_data,
	},
};

static struct platform_device *cm_bf533_devices[] __initdata = {

	&bfin_dpmc,

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
#ifdef CONFIG_SERIAL_BFIN_UART0
	&bfin_uart0_device,
#endif
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#endif

#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
#endif

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
	&isp1362_hcd_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
	&smsc911x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
	&para_flash_device,
#endif
};

static int __init cm_bf533_init(void)
{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(cm_bf533_init);
Commit	Line	Data
1394f032	1	/*
96f1050d RG	2	* Copyright 2004-2009 Analog Devices Inc.
	3	* 2008-2009 Bluetechnix
	4	* 2005 National ICT Australia (NICTA)
	5	* Aidan Williams <aidan@nicta.com.au>
1394f032	6	*
96f1050d	7	* Licensed under the GPL-2 or later.
1394f032 BW	8	*/
	9
	10	#include <linux/device.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/mtd/mtd.h>
	13	#include <linux/mtd/partitions.h>
9c21453e	14	#include <linux/mtd/physmap.h>
1394f032 BW	15	#include <linux/spi/spi.h>
1394f032 BW	16	#include <linux/spi/flash.h>
9c21453e	17	#include <linux/spi/mmc_spi.h>
b964c592	18	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	19	#include <linux/usb/isp1362.h>
b964c592	20	#endif
1f83b8f1	21	#include <linux/irq.h>
c6c4d7bb	22	#include <asm/dma.h>
1394f032	23	#include <asm/bfin5xx_spi.h>
5d448dd5	24	#include <asm/portmux.h>
14b03204	25	#include <asm/dpmc.h>
1394f032 BW	26
	27	/*
	28	* Name the Board for the /proc/cpuinfo
	29	*/
066954a3	30	const char bfin_board_name[] = "Bluetechnix CM BF533";
1394f032 BW	31
	32	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	33	/* all SPI peripherals info goes here */
a15c2dcf	34	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
1394f032 BW	35	static struct mtd_partition bfin_spi_flash_partitions[] = {
1394f032 BW	36	{
aa582977	37	.name = "bootloader(spi)",
1394f032 BW	38	.size = 0x00020000,
	39	.offset = 0,
	40	.mask_flags = MTD_CAP_ROM
1f83b8f1	41	}, {
aa582977	42	.name = "linux kernel(spi)",
1394f032 BW	43	.size = 0xe0000,
1394f032 BW	44	.offset = 0x20000
1f83b8f1	45	}, {
aa582977	46	.name = "file system(spi)",
1394f032 BW	47	.size = 0x700000,
	48	.offset = 0x00100000,
	49	}
	50	};
	51
	52	static struct flash_platform_data bfin_spi_flash_data = {
	53	.name = "m25p80",
	54	.parts = bfin_spi_flash_partitions,
	55	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	56	.type = "m25p64",
	57	};
	58
	59	/* SPI flash chip (m25p64) */
	60	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	61	.enable_dma = 0, /* use dma transfer with this chip*/
	62	.bits_per_word = 8,
	63	};
a15c2dcf	64	#endif
1394f032 BW	65
1394f032 BW	66	/* SPI ADC chip */
a261eec0	67	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
1394f032 BW	68	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	69	.enable_dma = 1, /* use dma transfer with this chip*/
	70	.bits_per_word = 16,
	71	};
a15c2dcf	72	#endif
1394f032 BW	73
	74	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	75	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	76	.enable_dma = 0,
	77	.bits_per_word = 16,
	78	};
	79	#endif
	80
f3f704d3 MH	81	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	82	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	83	.enable_dma = 0,
a15c2dcf MH	84	.bits_per_word = 8,
	85	};
	86	#endif
	87
1394f032	88	static struct spi_board_info bfin_spi_board_info[] __initdata = {
a15c2dcf	89	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
1394f032 BW	90	{
	91	/* the modalias must be the same as spi device driver name */
	92	.modalias = "m25p80", /* Name of spi_driver for this device */
	93	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	94	.bus_num = 0, /* Framework bus number */
1394f032 BW	95	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	96	.platform_data = &bfin_spi_flash_data,
	97	.controller_data = &spi_flash_chip_info,
	98	.mode = SPI_MODE_3,
a15c2dcf MH	99	},
	100	#endif
	101
a261eec0	102	#if defined(CONFIG_BFIN_SPI_ADC) \|\| defined(CONFIG_BFIN_SPI_ADC_MODULE)
a15c2dcf	103	{
1394f032 BW	104	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
1394f032 BW	105	.max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	106	.bus_num = 0, /* Framework bus number */
1394f032 BW	107	.chip_select = 2, /* Framework chip select. */
	108	.platform_data = NULL, /* No spi_driver specific config */
	109	.controller_data = &spi_adc_chip_info,
	110	},
a15c2dcf MH	111	#endif
a15c2dcf MH	112
1394f032 BW	113	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
1394f032 BW	114	{
dac98174	115	.modalias = "ad1836",
1394f032	116	.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
c6c4d7bb	117	.bus_num = 0,
1394f032 BW	118	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
	119	.controller_data = &ad1836_spi_chip_info,
	120	},
	121	#endif
a15c2dcf	122
f3f704d3	123	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
a15c2dcf	124	{
f3f704d3	125	.modalias = "mmc_spi",
9c21453e	126	.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
a15c2dcf	127	.bus_num = 0,
9c21453e	128	.chip_select = 1,
f3f704d3	129	.controller_data = &mmc_spi_chip_info,
a15c2dcf MH	130	.mode = SPI_MODE_3,
	131	},
	132	#endif
1394f032 BW	133	};
1394f032 BW	134
c6c4d7bb BW	135	/* SPI (0) */
	136	static struct resource bfin_spi0_resource[] = {
	137	[0] = {
	138	.start = SPI0_REGBASE,
	139	.end = SPI0_REGBASE + 0xFF,
	140	.flags = IORESOURCE_MEM,
	141	},
	142	[1] = {
	143	.start = CH_SPI,
	144	.end = CH_SPI,
53122693 YL	145	.flags = IORESOURCE_DMA,
	146	},
	147	[2] = {
	148	.start = IRQ_SPI,
	149	.end = IRQ_SPI,
c6c4d7bb BW	150	.flags = IORESOURCE_IRQ,
	151	}
	152	};
	153
1394f032	154	/* SPI controller data */
c6c4d7bb	155	static struct bfin5xx_spi_master bfin_spi0_info = {
1394f032 BW	156	.num_chipselect = 8,
1394f032 BW	157	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	158	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1394f032 BW	159	};
1394f032 BW	160
c6c4d7bb BW	161	static struct platform_device bfin_spi0_device = {
	162	.name = "bfin-spi",
	163	.id = 0, /* Bus number */
	164	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	165	.resource = bfin_spi0_resource,
1394f032	166	.dev = {
c6c4d7bb	167	.platform_data = &bfin_spi0_info, /* Passed to driver */
1394f032 BW	168	},
	169	};
	170	#endif /* spi master and devices */
	171
	172	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	173	static struct platform_device rtc_device = {
	174	.name = "rtc-bfin",
	175	.id = -1,
	176	};
	177	#endif
	178
	179	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
61f09b5a MH	180	#include <linux/smc91x.h>
	181
	182	static struct smc91x_platdata smc91x_info = {
	183	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	184	.leda = RPC_LED_100_10,
	185	.ledb = RPC_LED_TX_RX,
	186	};
	187
1394f032 BW	188	static struct resource smc91x_resources[] = {
	189	{
	190	.start = 0x20200300,
	191	.end = 0x20200300 + 16,
	192	.flags = IORESOURCE_MEM,
1f83b8f1	193	}, {
1394f032 BW	194	.start = IRQ_PF0,
	195	.end = IRQ_PF0,
	196	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	197	},
	198	};
	199	static struct platform_device smc91x_device = {
	200	.name = "smc91x",
	201	.id = 0,
	202	.num_resources = ARRAY_SIZE(smc91x_resources),
	203	.resource = smc91x_resources,
61f09b5a MH	204	.dev = {
	205	.platform_data = &smc91x_info,
	206	},
1394f032 BW	207	};
	208	#endif
	209
9c21453e HK	210	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	211	#include <linux/smsc911x.h>
	212
	213	static struct resource smsc911x_resources[] = {
	214	{
	215	.name = "smsc911x-memory",
	216	.start = 0x20308000,
	217	.end = 0x20308000 + 0xFF,
	218	.flags = IORESOURCE_MEM,
	219	}, {
	220	.start = IRQ_PF8,
	221	.end = IRQ_PF8,
	222	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	223	},
	224	};
	225
	226	static struct smsc911x_platform_config smsc911x_config = {
	227	.flags = SMSC911X_USE_16BIT,
	228	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	229	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	230	.phy_interface = PHY_INTERFACE_MODE_MII,
	231	};
	232
	233	static struct platform_device smsc911x_device = {
	234	.name = "smsc911x",
	235	.id = 0,
	236	.num_resources = ARRAY_SIZE(smsc911x_resources),
	237	.resource = smsc911x_resources,
	238	.dev = {
	239	.platform_data = &smsc911x_config,
	240	},
	241	};
	242	#endif
	243
1394f032	244	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	245	#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea SZ	246	static struct resource bfin_uart0_resources[] = {
1394f032	247	{
6bd1fbea SZ	248	.start = BFIN_UART_THR,
6bd1fbea SZ	249	.end = BFIN_UART_GCTL+2,
1394f032 BW	250	.flags = IORESOURCE_MEM,
1394f032 BW	251	},
6bd1fbea SZ	252	{
	253	.start = IRQ_UART0_RX,
	254	.end = IRQ_UART0_RX + 1,
	255	.flags = IORESOURCE_IRQ,
	256	},
	257	{
	258	.start = IRQ_UART0_ERROR,
	259	.end = IRQ_UART0_ERROR,
	260	.flags = IORESOURCE_IRQ,
	261	},
	262	{
	263	.start = CH_UART0_TX,
	264	.end = CH_UART0_TX,
	265	.flags = IORESOURCE_DMA,
	266	},
	267	{
	268	.start = CH_UART0_RX,
	269	.end = CH_UART0_RX,
	270	.flags = IORESOURCE_DMA,
	271	},
	272	};
	273
	274	unsigned short bfin_uart0_peripherals[] = {
	275	P_UART0_TX, P_UART0_RX, 0
1394f032 BW	276	};
1394f032 BW	277
6bd1fbea	278	static struct platform_device bfin_uart0_device = {
1394f032	279	.name = "bfin-uart",
6bd1fbea SZ	280	.id = 0,
	281	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
	282	.resource = bfin_uart0_resources,
	283	.dev = {
	284	.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
	285	},
1394f032 BW	286	};
1394f032 BW	287	#endif
6bd1fbea	288	#endif
1394f032	289
5be36d22	290	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	291	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	292	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	293	{
	294	.start = 0xFFC00400,
	295	.end = 0xFFC004FF,
	296	.flags = IORESOURCE_MEM,
	297	},
42bd8bcb GY	298	{
	299	.start = IRQ_UART0_RX,
	300	.end = IRQ_UART0_RX+1,
	301	.flags = IORESOURCE_IRQ,
	302	},
	303	{
	304	.start = CH_UART0_RX,
	305	.end = CH_UART0_RX+1,
	306	.flags = IORESOURCE_DMA,
	307	},
5be36d22 GY	308	};
5be36d22 GY	309
42bd8bcb	310	static struct platform_device bfin_sir0_device = {
5be36d22 GY	311	.name = "bfin_sir",
5be36d22 GY	312	.id = 0,
42bd8bcb GY	313	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
42bd8bcb GY	314	.resource = bfin_sir0_resources,
5be36d22 GY	315	};
5be36d22 GY	316	#endif
42bd8bcb	317	#endif
5be36d22	318
1394f032 BW	319	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	320	static struct platform_device bfin_sport0_uart_device = {
	321	.name = "bfin-sport-uart",
	322	.id = 0,
	323	};
	324
	325	static struct platform_device bfin_sport1_uart_device = {
	326	.name = "bfin-sport-uart",
	327	.id = 1,
	328	};
	329	#endif
	330
	331	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	332	static struct resource isp1362_hcd_resources[] = {
	333	{
	334	.start = 0x20308000,
	335	.end = 0x20308000,
	336	.flags = IORESOURCE_MEM,
1f83b8f1	337	}, {
1394f032 BW	338	.start = 0x20308004,
	339	.end = 0x20308004,
	340	.flags = IORESOURCE_MEM,
1f83b8f1	341	}, {
1394f032 BW	342	.start = IRQ_PF4,
	343	.end = IRQ_PF4,
	344	.flags = IORESOURCE_IRQ,
	345	},
	346	};
	347
	348	static struct isp1362_platform_data isp1362_priv = {
	349	.sel15Kres = 1,
	350	.clknotstop = 0,
	351	.oc_enable = 0,
	352	.int_act_high = 0,
	353	.int_edge_triggered = 0,
	354	.remote_wakeup_connected = 0,
	355	.no_power_switching = 1,
	356	.power_switching_mode = 0,
	357	};
	358
	359	static struct platform_device isp1362_hcd_device = {
	360	.name = "isp1362-hcd",
	361	.id = 0,
	362	.dev = {
	363	.platform_data = &isp1362_priv,
	364	},
	365	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
	366	.resource = isp1362_hcd_resources,
	367	};
	368	#endif
	369
9c21453e HK	370
	371	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	372	static struct resource net2272_bfin_resources[] = {
	373	{
	374	.start = 0x20300000,
	375	.end = 0x20300000 + 0x100,
	376	.flags = IORESOURCE_MEM,
	377	}, {
	378	.start = IRQ_PF6,
	379	.end = IRQ_PF6,
	380	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	381	},
	382	};
	383
	384	static struct platform_device net2272_bfin_device = {
	385	.name = "net2272",
	386	.id = -1,
	387	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	388	.resource = net2272_bfin_resources,
	389	};
	390	#endif
	391
	392
	393
	394	#if defined(CONFIG_MTD_PHYSMAP) \|\| defined(CONFIG_MTD_PHYSMAP_MODULE)
	395	static struct mtd_partition para_partitions[] = {
	396	{
	397	.name = "bootloader(nor)",
	398	.size = 0x40000,
	399	.offset = 0,
	400	}, {
	401	.name = "linux+rootfs(nor)",
	402	.size = MTDPART_SIZ_FULL,
	403	.offset = MTDPART_OFS_APPEND,
	404	},
	405	};
	406
	407	static struct physmap_flash_data para_flash_data = {
	408	.width = 2,
	409	.parts = para_partitions,
	410	.nr_parts = ARRAY_SIZE(para_partitions),
	411	};
	412
	413	static struct resource para_flash_resource = {
	414	.start = 0x20000000,
	415	.end = 0x201fffff,
	416	.flags = IORESOURCE_MEM,
	417	};
	418
	419	static struct platform_device para_flash_device = {
	420	.name = "physmap-flash",
	421	.id = 0,
	422	.dev = {
	423	.platform_data = &para_flash_data,
	424	},
	425	.num_resources = 1,
	426	.resource = &para_flash_resource,
	427	};
	428	#endif
	429
	430
	431
14b03204 MH	432	static const unsigned int cclk_vlev_datasheet[] =
	433	{
	434	VRPAIR(VLEV_085, 250000000),
	435	VRPAIR(VLEV_090, 376000000),
	436	VRPAIR(VLEV_095, 426000000),
	437	VRPAIR(VLEV_100, 426000000),
	438	VRPAIR(VLEV_105, 476000000),
	439	VRPAIR(VLEV_110, 476000000),
	440	VRPAIR(VLEV_115, 476000000),
	441	VRPAIR(VLEV_120, 600000000),
	442	VRPAIR(VLEV_125, 600000000),
	443	VRPAIR(VLEV_130, 600000000),
	444	};
	445
	446	static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
	447	.tuple_tab = cclk_vlev_datasheet,
	448	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
	449	.vr_settling_time = 25 /* us */,
	450	};
	451
	452	static struct platform_device bfin_dpmc = {
	453	.name = "bfin dpmc",
	454	.dev = {
	455	.platform_data = &bfin_dmpc_vreg_data,
	456	},
	457	};
	458
1394f032	459	static struct platform_device *cm_bf533_devices[] __initdata = {
14b03204 MH	460
	461	&bfin_dpmc,
	462
1394f032	463	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea SZ	464	#ifdef CONFIG_SERIAL_BFIN_UART0
	465	&bfin_uart0_device,
	466	#endif
1394f032 BW	467	#endif
1394f032 BW	468
5be36d22	469	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	470	#ifdef CONFIG_BFIN_SIR0
	471	&bfin_sir0_device,
	472	#endif
5be36d22 GY	473	#endif
5be36d22 GY	474
1394f032 BW	475	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	476	&bfin_sport0_uart_device,
	477	&bfin_sport1_uart_device,
	478	#endif
	479
	480	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	481	&rtc_device,
	482	#endif
	483
	484	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	485	&isp1362_hcd_device,
	486	#endif
	487
	488	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	489	&smc91x_device,
	490	#endif
	491
9c21453e HK	492	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	493	&smsc911x_device,
	494	#endif
	495
	496	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	497	&net2272_bfin_device,
	498	#endif
	499
1394f032	500	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
c6c4d7bb BW	501	&bfin_spi0_device,
c6c4d7bb BW	502	#endif
c97618d3	503
9c21453e HK	504	#if defined(CONFIG_MTD_PHYSMAP) \|\| defined(CONFIG_MTD_PHYSMAP_MODULE)
	505	&para_flash_device,
	506	#endif
1394f032 BW	507	};
	508
	509	static int __init cm_bf533_init(void)
	510	{
b85d858b	511	printk(KERN_INFO "%s(): registering device resources\n", __func__);
1394f032 BW	512	platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
	513	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	514	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	515	#endif
	516	return 0;
	517	}
	518
	519	arch_initcall(cm_bf533_init);