[net-next-2.6.git] / arch / blackfin / mach-bf533 / boards / H8606.c

/*
 * File:         arch/blackfin/mach-bf533/H8606.c
 * Based on:     arch/blackfin/mach-bf533/stamp.c
 * Author:       Javier Herrero <jherrero@hvsistemas.es>
 *
 * Created:      2007
 * Description:  Board Info File for the HV Sistemas H8606 board
 *
 * Modified:
 *               Copyright 2005 National ICT Australia (NICTA)
 *               Copyright 2004-2006 Analog Devices Inc
 *		 Copyright 2007,2008 HV Sistemas S.L.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
#include <linux/usb/isp1362.h>
#endif
#include <linux/irq.h>

#include <asm/dma.h>
#include <asm/bfin5xx_spi.h>
#include <asm/reboot.h>
#include <asm/portmux.h>

/*
 * Name the Board for the /proc/cpuinfo
 */
const char bfin_board_name[] = "HV Sistemas H8606";

#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id   = -1,
};
#endif

/*
*  Driver needs to know address, irq and flag pin.
 */
 #if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource dm9000_resources[] = {
	[0] = {
		.start	= 0x20300000,
		.end	= 0x20300002,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 0x20300004,
		.end	= 0x20300006,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= IRQ_PF10,
		.end	= IRQ_PF10,
		.flags	= (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
	},
};

static struct platform_device dm9000_device = {
    .id			= 0,
    .name		= "dm9000",
    .resource		= dm9000_resources,
    .num_resources	= ARRAY_SIZE(dm9000_resources),
};
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
static struct resource smc91x_resources[] = {
	{
		.name = "smc91x-regs",
		.start = 0x20300300,
		.end = 0x20300300 + 16,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PROG_INTB,
		.end = IRQ_PROG_INTB,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	}, {
		.start = IRQ_PF7,
		.end = IRQ_PF7,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device smc91x_device = {
	.name = "smc91x",
	.id = 0,
	.num_resources = ARRAY_SIZE(smc91x_resources),
	.resource = smc91x_resources,
};
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
static struct resource net2272_bfin_resources[] = {
	{
		.start = 0x20300000,
		.end = 0x20300000 + 0x100,
		.flags = IORESOURCE_MEM,
	}, {
		.start = IRQ_PF10,
		.end = IRQ_PF10,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
};
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
/* all SPI peripherals info goes here */

#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
		.name = "bootloader (spi)",
		.size = 0x40000,
		.offset = 0,
		.mask_flags = MTD_CAP_ROM
	}, {
		.name = "fpga (spi)",
		.size =   0x30000,
		.offset = 0x40000
	}, {
		.name = "linux kernel (spi)",
		.size =   0x150000,
		.offset =  0x70000
	}, {
		.name = "jffs2 root file system (spi)",
		.size =   0x640000,
		.offset = 0x1c0000,
	}
};

static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
};

/* SPI flash chip (m25p64) */
static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0,         /* use dma transfer with this chip*/
	.bits_per_word = 8,
};
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
/* SPI ADC chip */
static struct bfin5xx_spi_chip spi_adc_chip_info = {
	.ctl_reg = 0x1000,
	.enable_dma = 1,         /* use dma transfer with this chip*/
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	.ctl_reg = 0x1000,
	.enable_dma = 0,
	.bits_per_word = 16,
};
#endif

#if defined(CONFIG_PBX)
static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
	.ctl_reg	= 0x1c04,
	.enable_dma	= 0,
	.bits_per_word	= 8,
	.cs_change_per_word = 1,
};
#endif

/* Notice: for blackfin, the speed_hz is the value of register
 * SPI_BAUD, not the real baudrate */
static struct spi_board_info bfin_spi_board_info[] __initdata = {
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
	{
		/* the modalias must be the same as spi device driver name */
		.modalias = "m25p80", /* Name of spi_driver for this device */
		/* this value is the baudrate divisor */
		.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 0, /* Framework bus number */
		.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
		.platform_data = &bfin_spi_flash_data,
		.controller_data = &spi_flash_chip_info,
		.mode = SPI_MODE_3,
	},
#endif

#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
	{
		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
		.max_speed_hz = 4,     /* actual baudrate is SCLK/(2xspeed_hz) */
		.bus_num = 1, /* Framework bus number */
		.chip_select = 1, /* Framework chip select. */
		.platform_data = NULL, /* No spi_driver specific config */
		.controller_data = &spi_adc_chip_info,
	},
#endif

#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	{
		.modalias = "ad1836-spi",
		.max_speed_hz = 16,
		.bus_num = 1,
		.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
		.controller_data = &ad1836_spi_chip_info,
	},
#endif

#if defined(CONFIG_PBX)
	{
		.modalias	 = "fxs-spi",
		.max_speed_hz	 = 4,
		.bus_num	 = 1,
		.chip_select	 = 3,
		.controller_data = &spi_si3xxx_chip_info,
	},

	{
		.modalias	 = "fxo-spi",
		.max_speed_hz	 = 4,
		.bus_num	 = 1,
		.chip_select	 = 2,
		.controller_data = &spi_si3xxx_chip_info,
	},
#endif
};

/* SPI (0) */
static struct resource bfin_spi0_resource[] = {
	[0] = {
		.start = SPI0_REGBASE,
		.end   = SPI0_REGBASE + 0xFF,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CH_SPI,
		.end   = CH_SPI,
		.flags = IORESOURCE_IRQ,
	}
};


/* SPI controller data */
static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1,  /* master has the ability to do dma transfer */
	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};

static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
		.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
};
#endif  /* spi master and devices */

#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = {
	.name = "bf537-fb",
};
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
static struct resource bfin_uart_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
};

static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
};
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
static struct resource bfin_sir0_resources[] = {
	{
		.start = 0xFFC00400,
		.end = 0xFFC004FF,
		.flags = IORESOURCE_MEM,
	},
	{
		.start = IRQ_UART0_RX,
		.end = IRQ_UART0_RX+1,
		.flags = IORESOURCE_IRQ,
	},
	{
		.start = CH_UART0_RX,
		.end = CH_UART0_RX+1,
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
};
#endif
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)

#include <linux/serial_8250.h>
#include <linux/serial.h>

/*
 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
 * running at half system clock, both with interrupt output or-ed to PF8. Change to
 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
 */

static struct plat_serial8250_port serial8250_platform_data [] = {
	{
		.membase = (void *)0x20200000,
		.mapbase = 0x20200000,
		.irq = IRQ_PF8,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
		.membase = (void *)0x20200010,
		.mapbase = 0x20200010,
		.irq = IRQ_PF8,
		.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
		.iotype = UPIO_MEM,
		.regshift = 1,
		.uartclk = 66666667,
	}, {
	}
};

static struct platform_device serial8250_device = {
	.id		= PLAT8250_DEV_PLATFORM,
	.name		= "serial8250",
	.dev		= {
		.platform_data = serial8250_platform_data,
	},
};

#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)

/*
 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
 * interrupt output wired to PF9. Change to suit different FPGA configuration
 */

static struct resource opencores_kbd_resources[] = {
	[0] = {
		.start	= 0x20200030,
		.end	= 0x20300030 + 2,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PF9,
		.end	= IRQ_PF9,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device opencores_kbd_device = {
	.id		= -1,
	.name		= "opencores-kbd",
	.resource	= opencores_kbd_resources,
	.num_resources	= ARRAY_SIZE(opencores_kbd_resources),
};
#endif

static struct platform_device *h8606_devices[] __initdata = {
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
#endif

#if	defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
	&dm9000_device,
#endif

#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
	&smc91x_device,
#endif

#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
#endif

#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
#endif

#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	&serial8250_device,
#endif

#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
#endif
#endif

#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	&opencores_kbd_device,
#endif
};

static int __init H8606_init(void)
{
	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
#endif
	return 0;
}

arch_initcall(H8606_init);
Commit	Line	Data
ab472a04 JH	1	/*
	2	* File: arch/blackfin/mach-bf533/H8606.c
	3	* Based on: arch/blackfin/mach-bf533/stamp.c
	4	* Author: Javier Herrero <jherrero@hvsistemas.es>
	5	*
	6	* Created: 2007
	7	* Description: Board Info File for the HV Sistemas H8606 board
	8	*
	9	* Modified:
	10	* Copyright 2005 National ICT Australia (NICTA)
	11	* Copyright 2004-2006 Analog Devices Inc
45138439	12	* Copyright 2007,2008 HV Sistemas S.L.
ab472a04 JH	13	*
	14	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	15	*
	16	* This program is free software; you can redistribute it and/or modify
	17	* it under the terms of the GNU General Public License as published by
	18	* the Free Software Foundation; either version 2 of the License, or
	19	* (at your option) any later version.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, see the file COPYING, or write
	28	* to the Free Software Foundation, Inc.,
	29	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	30	*/
	31
	32	#include <linux/device.h>
	33	#include <linux/platform_device.h>
	34	#include <linux/mtd/mtd.h>
	35	#include <linux/mtd/partitions.h>
	36	#include <linux/spi/spi.h>
	37	#include <linux/spi/flash.h>
	38	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
f02bcec5	39	#include <linux/usb/isp1362.h>
ab472a04	40	#endif
ab472a04	41	#include <linux/irq.h>
fb96c56d	42
ab472a04 JH	43	#include <asm/dma.h>
	44	#include <asm/bfin5xx_spi.h>
	45	#include <asm/reboot.h>
5d448dd5	46	#include <asm/portmux.h>
ab472a04 JH	47
	48	/*
	49	* Name the Board for the /proc/cpuinfo
	50	*/
	51	const char bfin_board_name[] = "HV Sistemas H8606";
	52
09db9487	53	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
ab472a04 JH	54	static struct platform_device rtc_device = {
	55	.name = "rtc-bfin",
	56	.id = -1,
	57	};
	58	#endif
	59
	60	/*
	61	* Driver needs to know address, irq and flag pin.
	62	*/
	63	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	64	static struct resource dm9000_resources[] = {
	65	[0] = {
	66	.start = 0x20300000,
45138439	67	.end = 0x20300002,
ab472a04 JH	68	.flags = IORESOURCE_MEM,
	69	},
	70	[1] = {
45138439 JH	71	.start = 0x20300004,
45138439 JH	72	.end = 0x20300006,
da3854fc LP	73	.flags = IORESOURCE_MEM,
	74	},
	75	[2] = {
ab472a04 JH	76	.start = IRQ_PF10,
ab472a04 JH	77	.end = IRQ_PF10,
45138439	78	.flags = (IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE \| IRQF_SHARED \| IRQF_TRIGGER_HIGH),
ab472a04 JH	79	},
	80	};
	81
	82	static struct platform_device dm9000_device = {
	83	.id = 0,
	84	.name = "dm9000",
	85	.resource = dm9000_resources,
	86	.num_resources = ARRAY_SIZE(dm9000_resources),
	87	};
	88	#endif
	89
	90	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	91	static struct resource smc91x_resources[] = {
	92	{
	93	.name = "smc91x-regs",
	94	.start = 0x20300300,
	95	.end = 0x20300300 + 16,
	96	.flags = IORESOURCE_MEM,
	97	}, {
	98	.start = IRQ_PROG_INTB,
	99	.end = IRQ_PROG_INTB,
	100	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	101	}, {
ab472a04 JH	102	.start = IRQ_PF7,
	103	.end = IRQ_PF7,
	104	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	105	},
	106	};
	107
	108	static struct platform_device smc91x_device = {
	109	.name = "smc91x",
	110	.id = 0,
	111	.num_resources = ARRAY_SIZE(smc91x_resources),
	112	.resource = smc91x_resources,
	113	};
	114	#endif
	115
	116	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	117	static struct resource net2272_bfin_resources[] = {
	118	{
	119	.start = 0x20300000,
	120	.end = 0x20300000 + 0x100,
	121	.flags = IORESOURCE_MEM,
	122	}, {
	123	.start = IRQ_PF10,
	124	.end = IRQ_PF10,
	125	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	126	},
	127	};
	128
	129	static struct platform_device net2272_bfin_device = {
	130	.name = "net2272",
	131	.id = -1,
	132	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	133	.resource = net2272_bfin_resources,
	134	};
	135	#endif
	136
	137	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	138	/* all SPI peripherals info goes here */
	139
	140	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	141	static struct mtd_partition bfin_spi_flash_partitions[] = {
	142	{
45138439 JH	143	.name = "bootloader (spi)",
45138439 JH	144	.size = 0x40000,
ab472a04 JH	145	.offset = 0,
	146	.mask_flags = MTD_CAP_ROM
	147	}, {
45138439 JH	148	.name = "fpga (spi)",
	149	.size = 0x30000,
	150	.offset = 0x40000
ab472a04	151	}, {
45138439 JH	152	.name = "linux kernel (spi)",
	153	.size = 0x150000,
	154	.offset = 0x70000
	155	}, {
	156	.name = "jffs2 root file system (spi)",
	157	.size = 0x640000,
	158	.offset = 0x1c0000,
ab472a04 JH	159	}
	160	};
	161
	162	static struct flash_platform_data bfin_spi_flash_data = {
	163	.name = "m25p80",
	164	.parts = bfin_spi_flash_partitions,
	165	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	166	.type = "m25p64",
	167	};
	168
	169	/* SPI flash chip (m25p64) */
	170	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	171	.enable_dma = 0, /* use dma transfer with this chip*/
	172	.bits_per_word = 8,
	173	};
	174	#endif
	175
	176	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	177	/* SPI ADC chip */
	178	static struct bfin5xx_spi_chip spi_adc_chip_info = {
	179	.ctl_reg = 0x1000,
	180	.enable_dma = 1, /* use dma transfer with this chip*/
	181	.bits_per_word = 16,
	182	};
	183	#endif
	184
	185	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
	186	static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
	187	.ctl_reg = 0x1000,
	188	.enable_dma = 0,
	189	.bits_per_word = 16,
	190	};
	191	#endif
	192
	193	#if defined(CONFIG_PBX)
	194	static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
	195	.ctl_reg = 0x1c04,
	196	.enable_dma = 0,
	197	.bits_per_word = 8,
	198	.cs_change_per_word = 1,
	199	};
	200	#endif
	201
	202	/* Notice: for blackfin, the speed_hz is the value of register
	203	* SPI_BAUD, not the real baudrate */
	204	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	205	#if defined(CONFIG_MTD_M25P80) \|\| defined(CONFIG_MTD_M25P80_MODULE)
	206	{
	207	/* the modalias must be the same as spi device driver name */
	208	.modalias = "m25p80", /* Name of spi_driver for this device */
	209	/* this value is the baudrate divisor */
	210	.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
	211	.bus_num = 0, /* Framework bus number */
	212	.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
	213	.platform_data = &bfin_spi_flash_data,
	214	.controller_data = &spi_flash_chip_info,
	215	.mode = SPI_MODE_3,
	216	},
	217	#endif
	218
	219	#if defined(CONFIG_SPI_ADC_BF533) \|\| defined(CONFIG_SPI_ADC_BF533_MODULE)
	220	{
	221	.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
	222	.max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
223	.bus_num = 1, /* Framework bus number */
224	.chip_select = 1, /* Framework chip select. */
225	.platform_data = NULL, /* No spi_driver specific config */
226	.controller_data = &spi_adc_chip_info,
227	},
228	#endif
229
230	#if defined(CONFIG_SND_BLACKFIN_AD1836) \|\| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
231	{
232	.modalias = "ad1836-spi",
233	.max_speed_hz = 16,
234	.bus_num = 1,
235	.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
236	.controller_data = &ad1836_spi_chip_info,
237	},
238	#endif
239
240	#if defined(CONFIG_PBX)
241	{
242	.modalias = "fxs-spi",
243	.max_speed_hz = 4,
244	.bus_num = 1,
245	.chip_select = 3,
246	.controller_data = &spi_si3xxx_chip_info,
247	},
248
249	{
250	.modalias = "fxo-spi",
251	.max_speed_hz = 4,
252	.bus_num = 1,
253	.chip_select = 2,
254	.controller_data = &spi_si3xxx_chip_info,
255	},
256	#endif
257	};
258
259	/* SPI (0) */
260	static struct resource bfin_spi0_resource[] = {
261	[0] = {
262	.start = SPI0_REGBASE,
263	.end = SPI0_REGBASE + 0xFF,
264	.flags = IORESOURCE_MEM,
265	},
266	[1] = {
267	.start = CH_SPI,
268	.end = CH_SPI,
269	.flags = IORESOURCE_IRQ,
270	}
271	};
272
273
274	/* SPI controller data */
275	static struct bfin5xx_spi_master bfin_spi0_info = {
276	.num_chipselect = 8,
277	.enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5	278	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
ab472a04 JH	279	};
	280
	281	static struct platform_device bfin_spi0_device = {
	282	.name = "bfin-spi",
	283	.id = 0, /* Bus number */
	284	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	285	.resource = bfin_spi0_resource,
	286	.dev = {
	287	.platform_data = &bfin_spi0_info, /* Passed to driver */
	288	},
	289	};
	290	#endif /* spi master and devices */
	291
	292	#if defined(CONFIG_FB_BF537_LQ035) \|\| defined(CONFIG_FB_BF537_LQ035_MODULE)
	293	static struct platform_device bfin_fb_device = {
	294	.name = "bf537-fb",
	295	};
	296	#endif
	297
	298	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	299	static struct resource bfin_uart_resources[] = {
	300	{
	301	.start = 0xFFC00400,
	302	.end = 0xFFC004FF,
	303	.flags = IORESOURCE_MEM,
	304	},
	305	};
	306
	307	static struct platform_device bfin_uart_device = {
	308	.name = "bfin-uart",
	309	.id = 1,
	310	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	311	.resource = bfin_uart_resources,
	312	};
	313	#endif
	314
5be36d22	315	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
5be36d22	316	#ifdef CONFIG_BFIN_SIR0
42bd8bcb	317	static struct resource bfin_sir0_resources[] = {
5be36d22 GY	318	{
	319	.start = 0xFFC00400,
	320	.end = 0xFFC004FF,
	321	.flags = IORESOURCE_MEM,
	322	},
42bd8bcb GY	323	{
	324	.start = IRQ_UART0_RX,
	325	.end = IRQ_UART0_RX+1,
	326	.flags = IORESOURCE_IRQ,
	327	},
	328	{
	329	.start = CH_UART0_RX,
	330	.end = CH_UART0_RX+1,
	331	.flags = IORESOURCE_DMA,
	332	},
5be36d22 GY	333	};
5be36d22 GY	334
42bd8bcb	335	static struct platform_device bfin_sir0_device = {
5be36d22 GY	336	.name = "bfin_sir",
5be36d22 GY	337	.id = 0,
42bd8bcb GY	338	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
42bd8bcb GY	339	.resource = bfin_sir0_resources,
5be36d22 GY	340	};
5be36d22 GY	341	#endif
42bd8bcb	342	#endif
5be36d22	343
fb96c56d JH	344	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	345
	346	#include <linux/serial_8250.h>
	347	#include <linux/serial.h>
	348
	349	/*
	350	* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
	351	* running at half system clock, both with interrupt output or-ed to PF8. Change to
	352	* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
	353	*/
	354
	355	static struct plat_serial8250_port serial8250_platform_data [] = {
	356	{
45138439	357	.membase = (void *)0x20200000,
fb96c56d JH	358	.mapbase = 0x20200000,
	359	.irq = IRQ_PF8,
	360	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	361	.iotype = UPIO_MEM,
	362	.regshift = 1,
	363	.uartclk = 66666667,
	364	}, {
45138439	365	.membase = (void *)0x20200010,
fb96c56d JH	366	.mapbase = 0x20200010,
	367	.irq = IRQ_PF8,
	368	.flags = UPF_BOOT_AUTOCONF \| UART_CONFIG_TYPE,
	369	.iotype = UPIO_MEM,
	370	.regshift = 1,
	371	.uartclk = 66666667,
	372	}, {
	373	}
	374	};
	375
	376	static struct platform_device serial8250_device = {
	377	.id = PLAT8250_DEV_PLATFORM,
	378	.name = "serial8250",
	379	.dev = {
	380	.platform_data = serial8250_platform_data,
	381	},
	382	};
	383
	384	#endif
	385
7a5f8191 JH	386	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	387
	388	/*
	389	* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
	390	* interrupt output wired to PF9. Change to suit different FPGA configuration
	391	*/
	392
	393	static struct resource opencores_kbd_resources[] = {
	394	[0] = {
	395	.start = 0x20200030,
	396	.end = 0x20300030 + 2,
	397	.flags = IORESOURCE_MEM,
	398	},
	399	[1] = {
	400	.start = IRQ_PF9,
	401	.end = IRQ_PF9,
	402	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	403	},
	404	};
	405
	406	static struct platform_device opencores_kbd_device = {
	407	.id = -1,
	408	.name = "opencores-kbd",
	409	.resource = opencores_kbd_resources,
	410	.num_resources = ARRAY_SIZE(opencores_kbd_resources),
	411	};
	412	#endif
	413
fb96c56d	414	static struct platform_device *h8606_devices[] __initdata = {
ab472a04 JH	415	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	416	&rtc_device,
	417	#endif
	418
	419	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
	420	&dm9000_device,
	421	#endif
	422
	423	#if defined(CONFIG_SMC91X) \|\| defined(CONFIG_SMC91X_MODULE)
	424	&smc91x_device,
	425	#endif
	426
	427	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	428	&net2272_bfin_device,
	429	#endif
	430
	431	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	432	&bfin_spi0_device,
	433	#endif
	434
	435	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	436	&bfin_uart_device,
	437	#endif
fb96c56d JH	438
	439	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	440	&serial8250_device,
	441	#endif
7a5f8191	442
5be36d22	443	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb GY	444	#ifdef CONFIG_BFIN_SIR0
	445	&bfin_sir0_device,
	446	#endif
5be36d22 GY	447	#endif
5be36d22 GY	448
7a5f8191 JH	449	#if defined(CONFIG_KEYBOARD_OPENCORES) \|\| defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
	450	&opencores_kbd_device,
	451	#endif
ab472a04 JH	452	};
	453
	454	static int __init H8606_init(void)
	455	{
	456	printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
b85d858b	457	printk(KERN_INFO "%s(): registering device resources\n", __func__);
fb96c56d	458	platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
ab472a04 JH	459	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	460	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
	461	#endif
	462	return 0;
	463	}
	464
0feea17f	465	arch_initcall(H8606_init);