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Blackfin: move on-chip UART resources to boards files
[net-next-2.6.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
d7e5dd41 13#include <linux/mtd/physmap.h>
59003145
MH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
72268689 16#include <linux/i2c.h>
59003145
MH		 17#include <linux/irq.h>
18#include <linux/interrupt.h>
632f658b 19#include <linux/usb/sl811.h>
1089e228 20#include <linux/usb/musb.h>
59003145
MH		 21#include <asm/dma.h>
22#include <asm/bfin5xx_spi.h>
23#include <asm/reboot.h>
64307f7d 24#include <asm/nand.h>
5d448dd5 25#include <asm/portmux.h>
14b03204 26#include <asm/dpmc.h>
59003145
MH		 27#include <linux/spi/ad7877.h>
28
29/*
30 * Name the Board for the /proc/cpuinfo
31 */
fe85cad2 32const char bfin_board_name[] = "ADI BF527-EZKIT";
59003145
MH		 33
34/*
35 * Driver needs to know address, irq and flag pin.
36 */
37
59003145 38#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 39#include <linux/usb/isp1760.h>
40static struct resource bfin_isp1760_resources[] = {
59003145 41 [0] = {
3f375690
MH		 42 .start = 0x203C0000,
43 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 44 .flags = IORESOURCE_MEM,
45 },
46 [1] = {
3f375690
MH		 47 .start = IRQ_PF7,
48 .end = IRQ_PF7,
59003145
MH		 49 .flags = IORESOURCE_IRQ,
50 },
51};
52
3f375690
MH		 53static struct isp1760_platform_data isp1760_priv = {
54 .is_isp1761 = 0,
3f375690
MH		 55 .bus_width_16 = 1,
56 .port1_otg = 0,
57 .analog_oc = 0,
58 .dack_polarity_high = 0,
59 .dreq_polarity_high = 0,
59003145
MH		 60};
61
3f375690 62static struct platform_device bfin_isp1760_device = {
c6feb768 63 .name = "isp1760",
3f375690
MH		 64 .id = 0,
65 .dev = {
66 .platform_data = &isp1760_priv,
67 },
68 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
69 .resource = bfin_isp1760_resources,
59003145 70};
59003145
MH		 71#endif
72
1089e228
MH		 73#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
74static struct resource musb_resources[] = {
75 [0] = {
76 .start = 0xffc03800,
77 .end = 0xffc03cff,
78 .flags = IORESOURCE_MEM,
79 },
80 [1] = { /* general IRQ */
81 .start = IRQ_USB_INT0,
82 .end = IRQ_USB_INT0,
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
84 },
85 [2] = { /* DMA IRQ */
86 .start = IRQ_USB_DMA,
87 .end = IRQ_USB_DMA,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
89 },
90};
91
50041acb
BW		 92static struct musb_hdrc_config musb_config = {
93 .multipoint = 0,
94 .dyn_fifo = 0,
95 .soft_con = 1,
96 .dma = 1,
fea05dac
BW		 97 .num_eps = 8,
98 .dma_channels = 8,
50041acb
BW		 99 .gpio_vrsel = GPIO_PG13,
100};
101
1089e228
MH		 102static struct musb_hdrc_platform_data musb_plat = {
103#if defined(CONFIG_USB_MUSB_OTG)
104 .mode = MUSB_OTG,
105#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
106 .mode = MUSB_HOST,
107#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
108 .mode = MUSB_PERIPHERAL,
109#endif
50041acb 110 .config = &musb_config,
1089e228
MH		 111};
112
113static u64 musb_dmamask = ~(u32)0;
114
115static struct platform_device musb_device = {
116 .name = "musb_hdrc",
117 .id = 0,
118 .dev = {
119 .dma_mask = &musb_dmamask,
120 .coherent_dma_mask = 0xffffffff,
121 .platform_data = &musb_plat,
122 },
123 .num_resources = ARRAY_SIZE(musb_resources),
124 .resource = musb_resources,
125};
126#endif
127
128#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
129
130static struct resource bf52x_t350mcqb_resources[] = {
131 {
132 .start = IRQ_PPI_ERROR,
133 .end = IRQ_PPI_ERROR,
134 .flags = IORESOURCE_IRQ,
135 },
136};
137
138static struct platform_device bf52x_t350mcqb_device = {
139 .name = "bfin-t350mcqb",
140 .id = -1,
141 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
142 .resource = bf52x_t350mcqb_resources,
143};
144#endif
145
d7e5dd41
MH		 146#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
147static struct mtd_partition ezkit_partitions[] = {
148 {
aa582977 149 .name = "bootloader(nor)",
d7e5dd41
MH		 150 .size = 0x40000,
151 .offset = 0,
152 }, {
aa582977 153 .name = "linux kernel(nor)",
d7e5dd41
MH		 154 .size = 0x1C0000,
155 .offset = MTDPART_OFS_APPEND,
156 }, {
aa582977 157 .name = "file system(nor)",
d7e5dd41
MH		 158 .size = MTDPART_SIZ_FULL,
159 .offset = MTDPART_OFS_APPEND,
160 }
161};
162
163static struct physmap_flash_data ezkit_flash_data = {
164 .width = 2,
165 .parts = ezkit_partitions,
166 .nr_parts = ARRAY_SIZE(ezkit_partitions),
167};
168
169static struct resource ezkit_flash_resource = {
170 .start = 0x20000000,
171 .end = 0x203fffff,
172 .flags = IORESOURCE_MEM,
173};
174
175static struct platform_device ezkit_flash_device = {
176 .name = "physmap-flash",
177 .id = 0,
178 .dev = {
179 .platform_data = &ezkit_flash_data,
180 },
181 .num_resources = 1,
182 .resource = &ezkit_flash_resource,
183};
184#endif
185
64307f7d
MH		 186#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
187static struct mtd_partition partition_info[] = {
188 {
aa582977 189 .name = "linux kernel(nand)",
64307f7d 190 .offset = 0,
f4585a08 191 .size = 4 * 1024 * 1024,
64307f7d
MH		 192 },
193 {
aa582977 194 .name = "file system(nand)",
edf05641
MF		 195 .offset = MTDPART_OFS_APPEND,
196 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 197 },
198};
199
200static struct bf5xx_nand_platform bf5xx_nand_platform = {
201 .page_size = NFC_PG_SIZE_256,
202 .data_width = NFC_NWIDTH_8,
203 .partitions = partition_info,
204 .nr_partitions = ARRAY_SIZE(partition_info),
205 .rd_dly = 3,
206 .wr_dly = 3,
207};
208
209static struct resource bf5xx_nand_resources[] = {
210 {
211 .start = NFC_CTL,
212 .end = NFC_DATA_RD + 2,
213 .flags = IORESOURCE_MEM,
214 },
215 {
216 .start = CH_NFC,
217 .end = CH_NFC,
218 .flags = IORESOURCE_IRQ,
219 },
220};
221
222static struct platform_device bf5xx_nand_device = {
223 .name = "bf5xx-nand",
224 .id = 0,
225 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
226 .resource = bf5xx_nand_resources,
227 .dev = {
228 .platform_data = &bf5xx_nand_platform,
229 },
230};
231#endif
232
59003145
MH		 233#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
234static struct resource bfin_pcmcia_cf_resources[] = {
235 {
236 .start = 0x20310000, /* IO PORT */
237 .end = 0x20312000,
238 .flags = IORESOURCE_MEM,
239 }, {
240 .start = 0x20311000, /* Attribute Memory */
241 .end = 0x20311FFF,
242 .flags = IORESOURCE_MEM,
243 }, {
244 .start = IRQ_PF4,
245 .end = IRQ_PF4,
246 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
247 }, {
248 .start = 6, /* Card Detect PF6 */
249 .end = 6,
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254static struct platform_device bfin_pcmcia_cf_device = {
255 .name = "bfin_cf_pcmcia",
256 .id = -1,
257 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
258 .resource = bfin_pcmcia_cf_resources,
259};
260#endif
261
262#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
263static struct platform_device rtc_device = {
264 .name = "rtc-bfin",
265 .id = -1,
266};
267#endif
268
269#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 270#include <linux/smc91x.h>
271
272static struct smc91x_platdata smc91x_info = {
273 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
274 .leda = RPC_LED_100_10,
275 .ledb = RPC_LED_TX_RX,
276};
277
59003145
MH		 278static struct resource smc91x_resources[] = {
279 {
280 .name = "smc91x-regs",
281 .start = 0x20300300,
282 .end = 0x20300300 + 16,
283 .flags = IORESOURCE_MEM,
284 }, {
285
286 .start = IRQ_PF7,
287 .end = IRQ_PF7,
288 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
289 },
290};
291static struct platform_device smc91x_device = {
292 .name = "smc91x",
293 .id = 0,
294 .num_resources = ARRAY_SIZE(smc91x_resources),
295 .resource = smc91x_resources,
61f09b5a
MH		 296 .dev = {
297 .platform_data = &smc91x_info,
298 },
59003145
MH		 299};
300#endif
301
302#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
303static struct resource dm9000_resources[] = {
304 [0] = {
305 .start = 0x203FB800,
da3854fc 306 .end = 0x203FB800 + 1,
59003145
MH		 307 .flags = IORESOURCE_MEM,
308 },
309 [1] = {
da3854fc
LP		 310 .start = 0x203FB800 + 4,
311 .end = 0x203FB800 + 5,
312 .flags = IORESOURCE_MEM,
313 },
314 [2] = {
59003145
MH		 315 .start = IRQ_PF9,
316 .end = IRQ_PF9,
317 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
318 },
319};
320
321static struct platform_device dm9000_device = {
322 .name = "dm9000",
323 .id = -1,
324 .num_resources = ARRAY_SIZE(dm9000_resources),
325 .resource = dm9000_resources,
326};
327#endif
328
329#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
330static struct resource sl811_hcd_resources[] = {
331 {
332 .start = 0x20340000,
333 .end = 0x20340000,
334 .flags = IORESOURCE_MEM,
335 }, {
336 .start = 0x20340004,
337 .end = 0x20340004,
338 .flags = IORESOURCE_MEM,
339 }, {
340 .start = CONFIG_USB_SL811_BFIN_IRQ,
341 .end = CONFIG_USB_SL811_BFIN_IRQ,
342 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
343 },
344};
345
346#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
347void sl811_port_power(struct device *dev, int is_on)
348{
349 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
acbcd263 350 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
59003145
MH		 351}
352#endif
353
354static struct sl811_platform_data sl811_priv = {
355 .potpg = 10,
356 .power = 250, /* == 500mA */
357#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
358 .port_power = &sl811_port_power,
359#endif
360};
361
362static struct platform_device sl811_hcd_device = {
363 .name = "sl811-hcd",
364 .id = 0,
365 .dev = {
366 .platform_data = &sl811_priv,
367 },
368 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
369 .resource = sl811_hcd_resources,
370};
371#endif
372
59003145 373#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 374static struct platform_device bfin_mii_bus = {
375 .name = "bfin_mii_bus",
376};
377
59003145
MH		 378static struct platform_device bfin_mac_device = {
379 .name = "bfin_mac",
65319628 380 .dev.platform_data = &bfin_mii_bus,
59003145
MH		 381};
382#endif
383
384#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
385static struct resource net2272_bfin_resources[] = {
386 {
387 .start = 0x20300000,
388 .end = 0x20300000 + 0x100,
389 .flags = IORESOURCE_MEM,
390 }, {
391 .start = IRQ_PF7,
392 .end = IRQ_PF7,
393 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
394 },
395};
396
397static struct platform_device net2272_bfin_device = {
398 .name = "net2272",
399 .id = -1,
400 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
401 .resource = net2272_bfin_resources,
402};
403#endif
404
59003145
MH		 405#if defined(CONFIG_MTD_M25P80) \
406 || defined(CONFIG_MTD_M25P80_MODULE)
407static struct mtd_partition bfin_spi_flash_partitions[] = {
408 {
aa582977 409 .name = "bootloader(spi)",
ac76d889 410 .size = 0x00040000,
59003145
MH		 411 .offset = 0,
412 .mask_flags = MTD_CAP_ROM
413 }, {
aa582977 414 .name = "linux kernel(spi)",
edf05641
MF		 415 .size = MTDPART_SIZ_FULL,
416 .offset = MTDPART_OFS_APPEND,
59003145
MH		 417 }
418};
419
420static struct flash_platform_data bfin_spi_flash_data = {
421 .name = "m25p80",
422 .parts = bfin_spi_flash_partitions,
423 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 424 .type = "m25p16",
59003145
MH		 425};
426
427/* SPI flash chip (m25p64) */
428static struct bfin5xx_spi_chip spi_flash_chip_info = {
429 .enable_dma = 0, /* use dma transfer with this chip*/
430 .bits_per_word = 8,
431};
432#endif
433
a261eec0
MF		 434#if defined(CONFIG_BFIN_SPI_ADC) \
435 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 436/* SPI ADC chip */
437static struct bfin5xx_spi_chip spi_adc_chip_info = {
438 .enable_dma = 1, /* use dma transfer with this chip*/
439 .bits_per_word = 16,
440};
441#endif
442
443#if defined(CONFIG_SND_BLACKFIN_AD1836) \
444 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
445static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
446 .enable_dma = 0,
447 .bits_per_word = 16,
448};
449#endif
450
ffdf3ec8
YL		 451#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
452static struct bfin5xx_spi_chip mmc_spi_chip_info = {
453 .enable_dma = 0,
454 .bits_per_word = 8,
455};
456#endif
457
59003145
MH		 458#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
459static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
460 .enable_dma = 0,
461 .bits_per_word = 16,
462};
463
464static const struct ad7877_platform_data bfin_ad7877_ts_info = {
465 .model = 7877,
466 .vref_delay_usecs = 50, /* internal, no capacitor */
467 .x_plate_ohms = 419,
468 .y_plate_ohms = 486,
469 .pressure_max = 1000,
470 .pressure_min = 0,
471 .stopacq_polarity = 1,
472 .first_conversion_delay = 3,
473 .acquisition_time = 1,
474 .averaging = 1,
475 .pen_down_acc_interval = 1,
476};
477#endif
478
5105432a
MH		 479#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
480#include <linux/spi/ad7879.h>
481static const struct ad7879_platform_data bfin_ad7879_ts_info = {
482 .model = 7879, /* Model = AD7879 */
483 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
484 .pressure_max = 10000,
485 .pressure_min = 0,
486 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
487 .acquisition_time = 1, /* 4us acquisition time per sample */
488 .median = 2, /* do 8 measurements */
489 .averaging = 1, /* take the average of 4 middle samples */
490 .pen_down_acc_interval = 255, /* 9.4 ms */
491 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
492 .gpio_default = 1, /* During initialization set GPIO = HIGH */
493};
494#endif
495
496#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
497static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
498 .enable_dma = 0,
499 .bits_per_word = 16,
500};
501#endif
502
c7d48966 503#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
0954f70a
MH		 504 && defined(CONFIG_SND_SOC_WM8731_SPI)
505static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
506 .enable_dma = 0,
507 .bits_per_word = 16,
508};
509#endif
6e668936
MH		 510
511#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
512static struct bfin5xx_spi_chip spidev_chip_info = {
513 .enable_dma = 0,
514 .bits_per_word = 8,
515};
516#endif
517
59003145
MH		 518static struct spi_board_info bfin_spi_board_info[] __initdata = {
519#if defined(CONFIG_MTD_M25P80) \
520 || defined(CONFIG_MTD_M25P80_MODULE)
521 {
522 /* the modalias must be the same as spi device driver name */
523 .modalias = "m25p80", /* Name of spi_driver for this device */
524 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
525 .bus_num = 0, /* Framework bus number */
526 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
527 .platform_data = &bfin_spi_flash_data,
528 .controller_data = &spi_flash_chip_info,
529 .mode = SPI_MODE_3,
530 },
531#endif
532
a261eec0
MF		 533#if defined(CONFIG_BFIN_SPI_ADC) \
534 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 535 {
536 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
537 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
538 .bus_num = 0, /* Framework bus number */
539 .chip_select = 1, /* Framework chip select. */
540 .platform_data = NULL, /* No spi_driver specific config */
541 .controller_data = &spi_adc_chip_info,
542 },
543#endif
544
545#if defined(CONFIG_SND_BLACKFIN_AD1836) \
546 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
547 {
dac98174 548 .modalias = "ad1836",
59003145
MH		 549 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
550 .bus_num = 0,
551 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
552 .controller_data = &ad1836_spi_chip_info,
553 },
554#endif
ffdf3ec8
YL		 555#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
556 {
557 .modalias = "mmc_spi",
558 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
559 .bus_num = 0,
560 .chip_select = 3,
561 .controller_data = &mmc_spi_chip_info,
562 .mode = SPI_MODE_0,
563 },
564#endif
565
59003145
MH		 566#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
567 {
568 .modalias = "ad7877",
569 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 570 .irq = IRQ_PF8,
59003145 571 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 572 .bus_num = 0,
2eb74ae2 573 .chip_select = 2,
59003145
MH		 574 .controller_data = &spi_ad7877_chip_info,
575 },
576#endif
5105432a
MH		 577#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
578 {
579 .modalias = "ad7879",
580 .platform_data = &bfin_ad7879_ts_info,
581 .irq = IRQ_PF8,
582 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
583 .bus_num = 0,
584 .chip_select = 3,
585 .controller_data = &spi_ad7879_chip_info,
586 .mode = SPI_CPHA | SPI_CPOL,
587 },
588#endif
c7d48966 589#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
0954f70a
MH		 590 && defined(CONFIG_SND_SOC_WM8731_SPI)
591 {
592 .modalias = "wm8731",
593 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
594 .bus_num = 0,
595 .chip_select = 5,
596 .controller_data = &spi_wm8731_chip_info,
597 .mode = SPI_MODE_0,
598 },
599#endif
6e668936
MH		 600#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
601 {
602 .modalias = "spidev",
603 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
604 .bus_num = 0,
605 .chip_select = 1,
606 .controller_data = &spidev_chip_info,
607 },
608#endif
59003145
MH		 609};
610
5bda2723 611#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 612/* SPI controller data */
613static struct bfin5xx_spi_master bfin_spi0_info = {
614 .num_chipselect = 8,
615 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 616 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 617};
618
619/* SPI (0) */
620static struct resource bfin_spi0_resource[] = {
621 [0] = {
622 .start = SPI0_REGBASE,
623 .end = SPI0_REGBASE + 0xFF,
624 .flags = IORESOURCE_MEM,
625 },
626 [1] = {
627 .start = CH_SPI,
628 .end = CH_SPI,
53122693
YL		 629 .flags = IORESOURCE_DMA,
630 },
631 [2] = {
632 .start = IRQ_SPI,
633 .end = IRQ_SPI,
59003145
MH		 634 .flags = IORESOURCE_IRQ,
635 },
636};
637
638static struct platform_device bfin_spi0_device = {
639 .name = "bfin-spi",
640 .id = 0, /* Bus number */
641 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
642 .resource = bfin_spi0_resource,
643 .dev = {
644 .platform_data = &bfin_spi0_info, /* Passed to driver */
645 },
646};
647#endif /* spi master and devices */
648
59003145 649#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 650#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 651static struct resource bfin_uart0_resources[] = {
59003145 652 {
6bd1fbea
SZ		 653 .start = UART0_THR,
654 .end = UART0_GCTL+2,
59003145
MH		 655 .flags = IORESOURCE_MEM,
656 },
6bd1fbea
SZ		 657 {
658 .start = IRQ_UART0_RX,
659 .end = IRQ_UART0_RX+1,
660 .flags = IORESOURCE_IRQ,
661 },
662 {
663 .start = IRQ_UART0_ERROR,
664 .end = IRQ_UART0_ERROR,
665 .flags = IORESOURCE_IRQ,
666 },
667 {
668 .start = CH_UART0_TX,
669 .end = CH_UART0_TX,
670 .flags = IORESOURCE_DMA,
671 },
672 {
673 .start = CH_UART0_RX,
674 .end = CH_UART0_RX,
675 .flags = IORESOURCE_DMA,
676 },
677};
678
679unsigned short bfin_uart0_peripherals[] = {
680 P_UART0_TX, P_UART0_RX, 0
681};
682
683static struct platform_device bfin_uart0_device = {
684 .name = "bfin-uart",
685 .id = 0,
686 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
687 .resource = bfin_uart0_resources,
688 .dev = {
689 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
690 },
691};
59003145
MH		 692#endif
693#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 694static struct resource bfin_uart1_resources[] = {
59003145 695 {
6bd1fbea
SZ		 696 .start = UART1_THR,
697 .end = UART1_GCTL+2,
59003145
MH		 698 .flags = IORESOURCE_MEM,
699 },
6bd1fbea
SZ		 700 {
701 .start = IRQ_UART1_RX,
702 .end = IRQ_UART1_RX+1,
703 .flags = IORESOURCE_IRQ,
704 },
705 {
706 .start = IRQ_UART1_ERROR,
707 .end = IRQ_UART1_ERROR,
708 .flags = IORESOURCE_IRQ,
709 },
710 {
711 .start = CH_UART1_TX,
712 .end = CH_UART1_TX,
713 .flags = IORESOURCE_DMA,
714 },
715 {
716 .start = CH_UART1_RX,
717 .end = CH_UART1_RX,
718 .flags = IORESOURCE_DMA,
719 },
720#ifdef CONFIG_BFIN_UART1_CTSRTS
721 { /* CTS pin */
722 .start = GPIO_PF9,
723 .end = GPIO_PF9,
724 .flags = IORESOURCE_IO,
725 },
726 { /* RTS pin */
727 .start = GPIO_PF10,
728 .end = GPIO_PF10,
729 .flags = IORESOURCE_IO,
730 },
59003145
MH		 731#endif
732};
733
6bd1fbea
SZ		 734unsigned short bfin_uart1_peripherals[] = {
735 P_UART1_TX, P_UART1_RX, 0
736};
737
738static struct platform_device bfin_uart1_device = {
59003145
MH		 739 .name = "bfin-uart",
740 .id = 1,
6bd1fbea
SZ		 741 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
742 .resource = bfin_uart1_resources,
743 .dev = {
744 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
745 },
59003145
MH		 746};
747#endif
6bd1fbea 748#endif
59003145 749
5be36d22 750#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 751#ifdef CONFIG_BFIN_SIR0
42bd8bcb 752static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 753 {
754 .start = 0xFFC00400,
755 .end = 0xFFC004FF,
756 .flags = IORESOURCE_MEM,
757 },
42bd8bcb
GY		 758 {
759 .start = IRQ_UART0_RX,
760 .end = IRQ_UART0_RX+1,
761 .flags = IORESOURCE_IRQ,
762 },
763 {
764 .start = CH_UART0_RX,
765 .end = CH_UART0_RX+1,
766 .flags = IORESOURCE_DMA,
767 },
768};
769
770static struct platform_device bfin_sir0_device = {
771 .name = "bfin_sir",
772 .id = 0,
773 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
774 .resource = bfin_sir0_resources,
775};
5be36d22
GY		 776#endif
777#ifdef CONFIG_BFIN_SIR1
42bd8bcb 778static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 779 {
780 .start = 0xFFC02000,
781 .end = 0xFFC020FF,
782 .flags = IORESOURCE_MEM,
783 },
42bd8bcb
GY		 784 {
785 .start = IRQ_UART1_RX,
786 .end = IRQ_UART1_RX+1,
787 .flags = IORESOURCE_IRQ,
788 },
789 {
790 .start = CH_UART1_RX,
791 .end = CH_UART1_RX+1,
792 .flags = IORESOURCE_DMA,
793 },
5be36d22
GY		 794};
795
42bd8bcb 796static struct platform_device bfin_sir1_device = {
5be36d22 797 .name = "bfin_sir",
42bd8bcb
GY		 798 .id = 1,
799 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
800 .resource = bfin_sir1_resources,
5be36d22
GY		 801};
802#endif
42bd8bcb 803#endif
5be36d22 804
59003145
MH		 805#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
806static struct resource bfin_twi0_resource[] = {
807 [0] = {
808 .start = TWI0_REGBASE,
809 .end = TWI0_REGBASE,
810 .flags = IORESOURCE_MEM,
811 },
812 [1] = {
813 .start = IRQ_TWI,
814 .end = IRQ_TWI,
815 .flags = IORESOURCE_IRQ,
816 },
817};
818
819static struct platform_device i2c_bfin_twi_device = {
820 .name = "i2c-bfin-twi",
821 .id = 0,
822 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
823 .resource = bfin_twi0_resource,
824};
825#endif
826
72268689 827static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 828#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 829 {
830 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 831 },
832#endif
204844eb 833#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 834 {
835 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 836 .irq = IRQ_PF8,
837 },
838#endif
50c4c086
MH		 839#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
840 {
841 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
842 },
843#endif
72268689 844};
72268689 845
59003145
MH		 846#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
847static struct platform_device bfin_sport0_uart_device = {
848 .name = "bfin-sport-uart",
849 .id = 0,
850};
851
852static struct platform_device bfin_sport1_uart_device = {
853 .name = "bfin-sport-uart",
854 .id = 1,
855};
856#endif
857
1089e228
MH		 858#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
859#include <linux/input.h>
860#include <linux/gpio_keys.h>
861
862static struct gpio_keys_button bfin_gpio_keys_table[] = {
863 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
864 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
865};
866
867static struct gpio_keys_platform_data bfin_gpio_keys_data = {
868 .buttons = bfin_gpio_keys_table,
869 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
870};
871
872static struct platform_device bfin_device_gpiokeys = {
873 .name = "gpio-keys",
874 .dev = {
875 .platform_data = &bfin_gpio_keys_data,
876 },
877};
878#endif
879
adfc0467 880#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 881#include <linux/input.h>
882#include <asm/bfin_rotary.h>
883
884static struct bfin_rotary_platform_data bfin_rotary_data = {
885 /*.rotary_up_key = KEY_UP,*/
886 /*.rotary_down_key = KEY_DOWN,*/
887 .rotary_rel_code = REL_WHEEL,
888 .rotary_button_key = KEY_ENTER,
889 .debounce = 10, /* 0..17 */
890 .mode = ROT_QUAD_ENC | ROT_DEBE,
891};
892
893static struct resource bfin_rotary_resources[] = {
894 {
895 .start = IRQ_CNT,
896 .end = IRQ_CNT,
897 .flags = IORESOURCE_IRQ,
898 },
899};
900
901static struct platform_device bfin_rotary_device = {
902 .name = "bfin-rotary",
903 .id = -1,
904 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
905 .resource = bfin_rotary_resources,
906 .dev = {
907 .platform_data = &bfin_rotary_data,
908 },
909};
910#endif
911
14b03204
MH		 912static const unsigned int cclk_vlev_datasheet[] =
913{
914 VRPAIR(VLEV_100, 400000000),
915 VRPAIR(VLEV_105, 426000000),
916 VRPAIR(VLEV_110, 500000000),
917 VRPAIR(VLEV_115, 533000000),
918 VRPAIR(VLEV_120, 600000000),
919};
920
921static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
922 .tuple_tab = cclk_vlev_datasheet,
923 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
924 .vr_settling_time = 25 /* us */,
925};
926
927static struct platform_device bfin_dpmc = {
928 .name = "bfin dpmc",
929 .dev = {
930 .platform_data = &bfin_dmpc_vreg_data,
931 },
932};
933
59003145 934static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 935
936 &bfin_dpmc,
937
64307f7d
MH		 938#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
939 &bf5xx_nand_device,
940#endif
941
59003145
MH		 942#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
943 &bfin_pcmcia_cf_device,
944#endif
945
946#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
947 &rtc_device,
948#endif
949
950#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
951 &sl811_hcd_device,
952#endif
953
3f375690
MH		 954#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
955 &bfin_isp1760_device,
956#endif
957
1089e228
MH		 958#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
959 &musb_device,
960#endif
961
59003145
MH		 962#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
963 &smc91x_device,
964#endif
965
966#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
967 &dm9000_device,
968#endif
969
970#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 971 &bfin_mii_bus,
59003145
MH		 972 &bfin_mac_device,
973#endif
974
975#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
976 &net2272_bfin_device,
977#endif
978
979#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
980 &bfin_spi0_device,
981#endif
982
1089e228
MH		 983#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
984 &bf52x_t350mcqb_device,
985#endif
986
59003145 987#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 988#ifdef CONFIG_SERIAL_BFIN_UART0
989 &bfin_uart0_device,
990#endif
991#ifdef CONFIG_SERIAL_BFIN_UART1
992 &bfin_uart1_device,
993#endif
59003145
MH		 994#endif
995
5be36d22 996#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 997#ifdef CONFIG_BFIN_SIR0
998 &bfin_sir0_device,
999#endif
1000#ifdef CONFIG_BFIN_SIR1
1001 &bfin_sir1_device,
1002#endif
5be36d22
GY		 1003#endif
1004
59003145
MH		 1005#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1006 &i2c_bfin_twi_device,
1007#endif
1008
1009#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1010 &bfin_sport0_uart_device,
1011 &bfin_sport1_uart_device,
1012#endif
1013
1089e228
MH		 1014#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1015 &bfin_device_gpiokeys,
1016#endif
cad2ab65 1017
adfc0467 1018#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1019 &bfin_rotary_device,
1020#endif
1021
d7e5dd41
MH		 1022#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1023 &ezkit_flash_device,
1024#endif
59003145
MH		 1025};
1026
7f6678c5 1027static int __init ezkit_init(void)
59003145 1028{
b85d858b 1029 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1030 i2c_register_board_info(0, bfin_i2c_board_info,
1031 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1032 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1033 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1034 return 0;
1035}
1036
7f6678c5 1037arch_initcall(ezkit_init);
59003145
MH		 1038
1039void native_machine_restart(char *cmd)
1040{
1041 /* workaround reboot hang when booting from SPI */
1042 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1043 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1044}
137b1529 1045
9862cc52 1046void bfin_get_ether_addr(char *addr)
137b1529 1047{
181afa94
MF		 1048 /* the MAC is stored in OTP memory page 0xDF */
1049 u32 ret;
1050 u64 otp_mac;
1051 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1052
1053 ret = otp_read(0xDF, 0x00, &otp_mac);
1054 if (!(ret & 0x1)) {
1055 char *otp_mac_p = (char *)&otp_mac;
1056 for (ret = 0; ret < 6; ++ret)
1057 addr[ret] = otp_mac_p[5 - ret];
1058 }
137b1529 1059}
9862cc52 1060EXPORT_SYMBOL(bfin_get_ether_addr);
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