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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[net-next-2.6.git] / arch / blackfin / mach-bf527 / boards / ezkit.c
CommitLineData
59003145 1/*
96f1050d
RG		 2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
59003145 5 *
96f1050d 6 * Licensed under the GPL-2 or later.
59003145
MH		 7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
d7e5dd41 13#include <linux/mtd/physmap.h>
59003145
MH		 14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
72268689 16#include <linux/i2c.h>
59003145
MH		 17#include <linux/irq.h>
18#include <linux/interrupt.h>
1089e228 19#include <linux/usb/musb.h>
6924dfb0
MH		 20#include <linux/leds.h>
21#include <linux/input.h>
59003145
MH		 22#include <asm/dma.h>
23#include <asm/bfin5xx_spi.h>
24#include <asm/reboot.h>
64307f7d 25#include <asm/nand.h>
5d448dd5 26#include <asm/portmux.h>
14b03204 27#include <asm/dpmc.h>
59003145
MH		 28#include <linux/spi/ad7877.h>
29
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
6924dfb0
MH		 33#ifdef CONFIG_BFIN527_EZKIT_V2
34const char bfin_board_name[] = "ADI BF527-EZKIT V2";
35#else
fe85cad2 36const char bfin_board_name[] = "ADI BF527-EZKIT";
6924dfb0 37#endif
59003145
MH		 38
39/*
40 * Driver needs to know address, irq and flag pin.
41 */
42
59003145 43#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
3f375690
MH		 44#include <linux/usb/isp1760.h>
45static struct resource bfin_isp1760_resources[] = {
59003145 46 [0] = {
3f375690
MH		 47 .start = 0x203C0000,
48 .end = 0x203C0000 + 0x000fffff,
59003145
MH		 49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
3f375690
MH		 52 .start = IRQ_PF7,
53 .end = IRQ_PF7,
59003145
MH		 54 .flags = IORESOURCE_IRQ,
55 },
56};
57
3f375690
MH		 58static struct isp1760_platform_data isp1760_priv = {
59 .is_isp1761 = 0,
3f375690
MH		 60 .bus_width_16 = 1,
61 .port1_otg = 0,
62 .analog_oc = 0,
63 .dack_polarity_high = 0,
64 .dreq_polarity_high = 0,
59003145
MH		 65};
66
3f375690 67static struct platform_device bfin_isp1760_device = {
c6feb768 68 .name = "isp1760",
3f375690
MH		 69 .id = 0,
70 .dev = {
71 .platform_data = &isp1760_priv,
72 },
73 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
74 .resource = bfin_isp1760_resources,
59003145 75};
59003145
MH		 76#endif
77
1089e228
MH		 78#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
79static struct resource musb_resources[] = {
80 [0] = {
81 .start = 0xffc03800,
82 .end = 0xffc03cff,
83 .flags = IORESOURCE_MEM,
84 },
85 [1] = { /* general IRQ */
86 .start = IRQ_USB_INT0,
87 .end = IRQ_USB_INT0,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
89 },
90 [2] = { /* DMA IRQ */
91 .start = IRQ_USB_DMA,
92 .end = IRQ_USB_DMA,
93 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
94 },
95};
96
50041acb
BW		 97static struct musb_hdrc_config musb_config = {
98 .multipoint = 0,
99 .dyn_fifo = 0,
100 .soft_con = 1,
101 .dma = 1,
fea05dac
BW		 102 .num_eps = 8,
103 .dma_channels = 8,
50041acb 104 .gpio_vrsel = GPIO_PG13,
85eb0e4b
CC		 105 /* Some custom boards need to be active low, just set it to "0"
106 * if it is the case.
107 */
108 .gpio_vrsel_active = 1,
50041acb
BW		 109};
110
1089e228
MH		 111static struct musb_hdrc_platform_data musb_plat = {
112#if defined(CONFIG_USB_MUSB_OTG)
113 .mode = MUSB_OTG,
114#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
115 .mode = MUSB_HOST,
116#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
117 .mode = MUSB_PERIPHERAL,
118#endif
50041acb 119 .config = &musb_config,
1089e228
MH		 120};
121
122static u64 musb_dmamask = ~(u32)0;
123
124static struct platform_device musb_device = {
125 .name = "musb_hdrc",
126 .id = 0,
127 .dev = {
128 .dma_mask = &musb_dmamask,
129 .coherent_dma_mask = 0xffffffff,
130 .platform_data = &musb_plat,
131 },
132 .num_resources = ARRAY_SIZE(musb_resources),
133 .resource = musb_resources,
134};
135#endif
136
137#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
138
139static struct resource bf52x_t350mcqb_resources[] = {
140 {
141 .start = IRQ_PPI_ERROR,
142 .end = IRQ_PPI_ERROR,
143 .flags = IORESOURCE_IRQ,
144 },
145};
146
147static struct platform_device bf52x_t350mcqb_device = {
148 .name = "bfin-t350mcqb",
149 .id = -1,
150 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
151 .resource = bf52x_t350mcqb_resources,
152};
153#endif
154
6924dfb0
MH		 155#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
156#include <asm/bfin-lq035q1.h>
157
158static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
159 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
d94a1aa4 160 .ppi_mode = USE_RGB565_8_BIT_PPI,
6924dfb0
MH		 161};
162
163static struct resource bfin_lq035q1_resources[] = {
164 {
165 .start = IRQ_PPI_ERROR,
166 .end = IRQ_PPI_ERROR,
167 .flags = IORESOURCE_IRQ,
168 },
169};
170
171static struct platform_device bfin_lq035q1_device = {
172 .name = "bfin-lq035q1",
173 .id = -1,
174 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
175 .resource = bfin_lq035q1_resources,
176 .dev = {
177 .platform_data = &bfin_lq035q1_data,
178 },
179};
180#endif
181
d7e5dd41
MH		 182#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
183static struct mtd_partition ezkit_partitions[] = {
184 {
aa582977 185 .name = "bootloader(nor)",
d7e5dd41
MH		 186 .size = 0x40000,
187 .offset = 0,
188 }, {
aa582977 189 .name = "linux kernel(nor)",
d7e5dd41
MH		 190 .size = 0x1C0000,
191 .offset = MTDPART_OFS_APPEND,
192 }, {
aa582977 193 .name = "file system(nor)",
d7e5dd41
MH		 194 .size = MTDPART_SIZ_FULL,
195 .offset = MTDPART_OFS_APPEND,
196 }
197};
198
199static struct physmap_flash_data ezkit_flash_data = {
200 .width = 2,
201 .parts = ezkit_partitions,
202 .nr_parts = ARRAY_SIZE(ezkit_partitions),
203};
204
205static struct resource ezkit_flash_resource = {
206 .start = 0x20000000,
207 .end = 0x203fffff,
208 .flags = IORESOURCE_MEM,
209};
210
211static struct platform_device ezkit_flash_device = {
212 .name = "physmap-flash",
213 .id = 0,
214 .dev = {
215 .platform_data = &ezkit_flash_data,
216 },
217 .num_resources = 1,
218 .resource = &ezkit_flash_resource,
219};
220#endif
221
64307f7d
MH		 222#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
223static struct mtd_partition partition_info[] = {
224 {
aa582977 225 .name = "linux kernel(nand)",
64307f7d 226 .offset = 0,
f4585a08 227 .size = 4 * 1024 * 1024,
64307f7d
MH		 228 },
229 {
aa582977 230 .name = "file system(nand)",
edf05641
MF		 231 .offset = MTDPART_OFS_APPEND,
232 .size = MTDPART_SIZ_FULL,
64307f7d
MH		 233 },
234};
235
236static struct bf5xx_nand_platform bf5xx_nand_platform = {
64307f7d
MH		 237 .data_width = NFC_NWIDTH_8,
238 .partitions = partition_info,
239 .nr_partitions = ARRAY_SIZE(partition_info),
240 .rd_dly = 3,
241 .wr_dly = 3,
242};
243
244static struct resource bf5xx_nand_resources[] = {
245 {
246 .start = NFC_CTL,
247 .end = NFC_DATA_RD + 2,
248 .flags = IORESOURCE_MEM,
249 },
250 {
251 .start = CH_NFC,
252 .end = CH_NFC,
253 .flags = IORESOURCE_IRQ,
254 },
255};
256
257static struct platform_device bf5xx_nand_device = {
258 .name = "bf5xx-nand",
259 .id = 0,
260 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
261 .resource = bf5xx_nand_resources,
262 .dev = {
263 .platform_data = &bf5xx_nand_platform,
264 },
265};
266#endif
267
59003145
MH		 268#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
269static struct resource bfin_pcmcia_cf_resources[] = {
270 {
271 .start = 0x20310000, /* IO PORT */
272 .end = 0x20312000,
273 .flags = IORESOURCE_MEM,
274 }, {
275 .start = 0x20311000, /* Attribute Memory */
276 .end = 0x20311FFF,
277 .flags = IORESOURCE_MEM,
278 }, {
279 .start = IRQ_PF4,
280 .end = IRQ_PF4,
281 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
282 }, {
283 .start = 6, /* Card Detect PF6 */
284 .end = 6,
285 .flags = IORESOURCE_IRQ,
286 },
287};
288
289static struct platform_device bfin_pcmcia_cf_device = {
290 .name = "bfin_cf_pcmcia",
291 .id = -1,
292 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
293 .resource = bfin_pcmcia_cf_resources,
294};
295#endif
296
297#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
298static struct platform_device rtc_device = {
299 .name = "rtc-bfin",
300 .id = -1,
301};
302#endif
303
304#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
61f09b5a
MH		 305#include <linux/smc91x.h>
306
307static struct smc91x_platdata smc91x_info = {
308 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
309 .leda = RPC_LED_100_10,
310 .ledb = RPC_LED_TX_RX,
311};
312
59003145
MH		 313static struct resource smc91x_resources[] = {
314 {
315 .name = "smc91x-regs",
316 .start = 0x20300300,
317 .end = 0x20300300 + 16,
318 .flags = IORESOURCE_MEM,
319 }, {
320
321 .start = IRQ_PF7,
322 .end = IRQ_PF7,
323 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
324 },
325};
326static struct platform_device smc91x_device = {
327 .name = "smc91x",
328 .id = 0,
329 .num_resources = ARRAY_SIZE(smc91x_resources),
330 .resource = smc91x_resources,
61f09b5a
MH		 331 .dev = {
332 .platform_data = &smc91x_info,
333 },
59003145
MH		 334};
335#endif
336
337#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
338static struct resource dm9000_resources[] = {
339 [0] = {
340 .start = 0x203FB800,
da3854fc 341 .end = 0x203FB800 + 1,
59003145
MH		 342 .flags = IORESOURCE_MEM,
343 },
344 [1] = {
da3854fc
LP		 345 .start = 0x203FB800 + 4,
346 .end = 0x203FB800 + 5,
347 .flags = IORESOURCE_MEM,
348 },
349 [2] = {
59003145
MH		 350 .start = IRQ_PF9,
351 .end = IRQ_PF9,
352 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
353 },
354};
355
356static struct platform_device dm9000_device = {
357 .name = "dm9000",
358 .id = -1,
359 .num_resources = ARRAY_SIZE(dm9000_resources),
360 .resource = dm9000_resources,
361};
362#endif
363
59003145 364#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628
GY		 365static struct platform_device bfin_mii_bus = {
366 .name = "bfin_mii_bus",
367};
368
59003145
MH		 369static struct platform_device bfin_mac_device = {
370 .name = "bfin_mac",
65319628 371 .dev.platform_data = &bfin_mii_bus,
59003145
MH		 372};
373#endif
374
375#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
376static struct resource net2272_bfin_resources[] = {
377 {
378 .start = 0x20300000,
379 .end = 0x20300000 + 0x100,
380 .flags = IORESOURCE_MEM,
381 }, {
382 .start = IRQ_PF7,
383 .end = IRQ_PF7,
384 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
385 },
386};
387
388static struct platform_device net2272_bfin_device = {
389 .name = "net2272",
390 .id = -1,
391 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
392 .resource = net2272_bfin_resources,
393};
394#endif
395
59003145
MH		 396#if defined(CONFIG_MTD_M25P80) \
397 || defined(CONFIG_MTD_M25P80_MODULE)
398static struct mtd_partition bfin_spi_flash_partitions[] = {
399 {
aa582977 400 .name = "bootloader(spi)",
ac76d889 401 .size = 0x00040000,
59003145
MH		 402 .offset = 0,
403 .mask_flags = MTD_CAP_ROM
404 }, {
aa582977 405 .name = "linux kernel(spi)",
edf05641
MF		 406 .size = MTDPART_SIZ_FULL,
407 .offset = MTDPART_OFS_APPEND,
59003145
MH		 408 }
409};
410
411static struct flash_platform_data bfin_spi_flash_data = {
412 .name = "m25p80",
413 .parts = bfin_spi_flash_partitions,
414 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
b9c9e788 415 .type = "m25p16",
59003145
MH		 416};
417
418/* SPI flash chip (m25p64) */
419static struct bfin5xx_spi_chip spi_flash_chip_info = {
420 .enable_dma = 0, /* use dma transfer with this chip*/
421 .bits_per_word = 8,
422};
423#endif
424
a261eec0
MF		 425#if defined(CONFIG_BFIN_SPI_ADC) \
426 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 427/* SPI ADC chip */
428static struct bfin5xx_spi_chip spi_adc_chip_info = {
429 .enable_dma = 1, /* use dma transfer with this chip*/
430 .bits_per_word = 16,
431};
432#endif
433
d40bd71f
BS		 434#if defined(CONFIG_SND_BLACKFIN_AD183X) \
435 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
59003145
MH		 436static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
437 .enable_dma = 0,
438 .bits_per_word = 16,
439};
440#endif
441
ffdf3ec8
YL		 442#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
443static struct bfin5xx_spi_chip mmc_spi_chip_info = {
444 .enable_dma = 0,
445 .bits_per_word = 8,
446};
447#endif
448
59003145
MH		 449#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
450static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
451 .enable_dma = 0,
452 .bits_per_word = 16,
453};
454
455static const struct ad7877_platform_data bfin_ad7877_ts_info = {
456 .model = 7877,
457 .vref_delay_usecs = 50, /* internal, no capacitor */
458 .x_plate_ohms = 419,
459 .y_plate_ohms = 486,
460 .pressure_max = 1000,
461 .pressure_min = 0,
462 .stopacq_polarity = 1,
463 .first_conversion_delay = 3,
464 .acquisition_time = 1,
465 .averaging = 1,
466 .pen_down_acc_interval = 1,
467};
468#endif
469
5105432a
MH		 470#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
471#include <linux/spi/ad7879.h>
472static const struct ad7879_platform_data bfin_ad7879_ts_info = {
473 .model = 7879, /* Model = AD7879 */
474 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
475 .pressure_max = 10000,
476 .pressure_min = 0,
477 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
478 .acquisition_time = 1, /* 4us acquisition time per sample */
479 .median = 2, /* do 8 measurements */
480 .averaging = 1, /* take the average of 4 middle samples */
481 .pen_down_acc_interval = 255, /* 9.4 ms */
244d3423 482 .gpio_export = 0, /* Export GPIO to gpiolib */
5105432a
MH		 483};
484#endif
485
486#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
487static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
488 .enable_dma = 0,
489 .bits_per_word = 16,
490};
491#endif
492
6e668936
MH		 493#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
494static struct bfin5xx_spi_chip spidev_chip_info = {
495 .enable_dma = 0,
496 .bits_per_word = 8,
497};
498#endif
499
336746ed
BS		 500#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
501static struct platform_device bfin_i2s = {
502 .name = "bfin-i2s",
503 .id = CONFIG_SND_BF5XX_SPORT_NUM,
504 /* TODO: add platform data here */
505};
506#endif
507
508#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
509static struct platform_device bfin_tdm = {
510 .name = "bfin-tdm",
511 .id = CONFIG_SND_BF5XX_SPORT_NUM,
512 /* TODO: add platform data here */
513};
514#endif
515
6924dfb0
MH		 516#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
517static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
518 .enable_dma = 0,
519 .bits_per_word = 8,
520};
521#endif
522
59003145
MH		 523static struct spi_board_info bfin_spi_board_info[] __initdata = {
524#if defined(CONFIG_MTD_M25P80) \
525 || defined(CONFIG_MTD_M25P80_MODULE)
526 {
527 /* the modalias must be the same as spi device driver name */
528 .modalias = "m25p80", /* Name of spi_driver for this device */
529 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
530 .bus_num = 0, /* Framework bus number */
531 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
532 .platform_data = &bfin_spi_flash_data,
533 .controller_data = &spi_flash_chip_info,
534 .mode = SPI_MODE_3,
535 },
536#endif
537
a261eec0
MF		 538#if defined(CONFIG_BFIN_SPI_ADC) \
539 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
59003145
MH		 540 {
541 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
542 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
543 .bus_num = 0, /* Framework bus number */
544 .chip_select = 1, /* Framework chip select. */
545 .platform_data = NULL, /* No spi_driver specific config */
546 .controller_data = &spi_adc_chip_info,
547 },
548#endif
549
d40bd71f
BS		 550#if defined(CONFIG_SND_BLACKFIN_AD183X) \
551 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
59003145 552 {
dac98174 553 .modalias = "ad1836",
59003145
MH		 554 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
555 .bus_num = 0,
556 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
557 .controller_data = &ad1836_spi_chip_info,
558 },
559#endif
ffdf3ec8
YL		 560#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
561 {
562 .modalias = "mmc_spi",
563 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
564 .bus_num = 0,
565 .chip_select = 3,
566 .controller_data = &mmc_spi_chip_info,
567 .mode = SPI_MODE_0,
568 },
569#endif
570
59003145
MH		 571#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
572 {
573 .modalias = "ad7877",
574 .platform_data = &bfin_ad7877_ts_info,
2eb74ae2 575 .irq = IRQ_PF8,
59003145 576 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
0954f70a 577 .bus_num = 0,
2eb74ae2 578 .chip_select = 2,
59003145
MH		 579 .controller_data = &spi_ad7877_chip_info,
580 },
581#endif
5105432a
MH		 582#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
583 {
584 .modalias = "ad7879",
585 .platform_data = &bfin_ad7879_ts_info,
586 .irq = IRQ_PF8,
587 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
588 .bus_num = 0,
589 .chip_select = 3,
590 .controller_data = &spi_ad7879_chip_info,
591 .mode = SPI_CPHA | SPI_CPOL,
592 },
593#endif
6e668936
MH		 594#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
595 {
596 .modalias = "spidev",
597 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
598 .bus_num = 0,
599 .chip_select = 1,
600 .controller_data = &spidev_chip_info,
601 },
602#endif
6924dfb0
MH		 603#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
604 {
605 .modalias = "bfin-lq035q1-spi",
606 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
607 .bus_num = 0,
608 .chip_select = 7,
609 .controller_data = &lq035q1_spi_chip_info,
610 .mode = SPI_CPHA | SPI_CPOL,
611 },
612#endif
59003145
MH		 613};
614
5bda2723 615#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
59003145
MH		 616/* SPI controller data */
617static struct bfin5xx_spi_master bfin_spi0_info = {
618 .num_chipselect = 8,
619 .enable_dma = 1, /* master has the ability to do dma transfer */
5d448dd5 620 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
59003145
MH		 621};
622
623/* SPI (0) */
624static struct resource bfin_spi0_resource[] = {
625 [0] = {
626 .start = SPI0_REGBASE,
627 .end = SPI0_REGBASE + 0xFF,
628 .flags = IORESOURCE_MEM,
629 },
630 [1] = {
631 .start = CH_SPI,
632 .end = CH_SPI,
53122693
YL		 633 .flags = IORESOURCE_DMA,
634 },
635 [2] = {
636 .start = IRQ_SPI,
637 .end = IRQ_SPI,
59003145
MH		 638 .flags = IORESOURCE_IRQ,
639 },
640};
641
642static struct platform_device bfin_spi0_device = {
643 .name = "bfin-spi",
644 .id = 0, /* Bus number */
645 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
646 .resource = bfin_spi0_resource,
647 .dev = {
648 .platform_data = &bfin_spi0_info, /* Passed to driver */
649 },
650};
651#endif /* spi master and devices */
652
59003145 653#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
59003145 654#ifdef CONFIG_SERIAL_BFIN_UART0
6bd1fbea 655static struct resource bfin_uart0_resources[] = {
59003145 656 {
6bd1fbea
SZ		 657 .start = UART0_THR,
658 .end = UART0_GCTL+2,
59003145
MH		 659 .flags = IORESOURCE_MEM,
660 },
6bd1fbea
SZ		 661 {
662 .start = IRQ_UART0_RX,
663 .end = IRQ_UART0_RX+1,
664 .flags = IORESOURCE_IRQ,
665 },
666 {
667 .start = IRQ_UART0_ERROR,
668 .end = IRQ_UART0_ERROR,
669 .flags = IORESOURCE_IRQ,
670 },
671 {
672 .start = CH_UART0_TX,
673 .end = CH_UART0_TX,
674 .flags = IORESOURCE_DMA,
675 },
676 {
677 .start = CH_UART0_RX,
678 .end = CH_UART0_RX,
679 .flags = IORESOURCE_DMA,
680 },
681};
682
683unsigned short bfin_uart0_peripherals[] = {
684 P_UART0_TX, P_UART0_RX, 0
685};
686
687static struct platform_device bfin_uart0_device = {
688 .name = "bfin-uart",
689 .id = 0,
690 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
691 .resource = bfin_uart0_resources,
692 .dev = {
693 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
694 },
695};
59003145
MH		 696#endif
697#ifdef CONFIG_SERIAL_BFIN_UART1
6bd1fbea 698static struct resource bfin_uart1_resources[] = {
59003145 699 {
6bd1fbea
SZ		 700 .start = UART1_THR,
701 .end = UART1_GCTL+2,
59003145
MH		 702 .flags = IORESOURCE_MEM,
703 },
6bd1fbea
SZ		 704 {
705 .start = IRQ_UART1_RX,
706 .end = IRQ_UART1_RX+1,
707 .flags = IORESOURCE_IRQ,
708 },
709 {
710 .start = IRQ_UART1_ERROR,
711 .end = IRQ_UART1_ERROR,
712 .flags = IORESOURCE_IRQ,
713 },
714 {
715 .start = CH_UART1_TX,
716 .end = CH_UART1_TX,
717 .flags = IORESOURCE_DMA,
718 },
719 {
720 .start = CH_UART1_RX,
721 .end = CH_UART1_RX,
722 .flags = IORESOURCE_DMA,
723 },
724#ifdef CONFIG_BFIN_UART1_CTSRTS
725 { /* CTS pin */
726 .start = GPIO_PF9,
727 .end = GPIO_PF9,
728 .flags = IORESOURCE_IO,
729 },
730 { /* RTS pin */
731 .start = GPIO_PF10,
732 .end = GPIO_PF10,
733 .flags = IORESOURCE_IO,
734 },
59003145
MH		 735#endif
736};
737
6bd1fbea
SZ		 738unsigned short bfin_uart1_peripherals[] = {
739 P_UART1_TX, P_UART1_RX, 0
740};
741
742static struct platform_device bfin_uart1_device = {
59003145
MH		 743 .name = "bfin-uart",
744 .id = 1,
6bd1fbea
SZ		 745 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
746 .resource = bfin_uart1_resources,
747 .dev = {
748 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
749 },
59003145
MH		 750};
751#endif
6bd1fbea 752#endif
59003145 753
5be36d22 754#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
5be36d22 755#ifdef CONFIG_BFIN_SIR0
42bd8bcb 756static struct resource bfin_sir0_resources[] = {
5be36d22
GY		 757 {
758 .start = 0xFFC00400,
759 .end = 0xFFC004FF,
760 .flags = IORESOURCE_MEM,
761 },
42bd8bcb
GY		 762 {
763 .start = IRQ_UART0_RX,
764 .end = IRQ_UART0_RX+1,
765 .flags = IORESOURCE_IRQ,
766 },
767 {
768 .start = CH_UART0_RX,
769 .end = CH_UART0_RX+1,
770 .flags = IORESOURCE_DMA,
771 },
772};
773
774static struct platform_device bfin_sir0_device = {
775 .name = "bfin_sir",
776 .id = 0,
777 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
778 .resource = bfin_sir0_resources,
779};
5be36d22
GY		 780#endif
781#ifdef CONFIG_BFIN_SIR1
42bd8bcb 782static struct resource bfin_sir1_resources[] = {
5be36d22
GY		 783 {
784 .start = 0xFFC02000,
785 .end = 0xFFC020FF,
786 .flags = IORESOURCE_MEM,
787 },
42bd8bcb
GY		 788 {
789 .start = IRQ_UART1_RX,
790 .end = IRQ_UART1_RX+1,
791 .flags = IORESOURCE_IRQ,
792 },
793 {
794 .start = CH_UART1_RX,
795 .end = CH_UART1_RX+1,
796 .flags = IORESOURCE_DMA,
797 },
5be36d22
GY		 798};
799
42bd8bcb 800static struct platform_device bfin_sir1_device = {
5be36d22 801 .name = "bfin_sir",
42bd8bcb
GY		 802 .id = 1,
803 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
804 .resource = bfin_sir1_resources,
5be36d22
GY		 805};
806#endif
42bd8bcb 807#endif
5be36d22 808
59003145
MH		 809#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
810static struct resource bfin_twi0_resource[] = {
811 [0] = {
812 .start = TWI0_REGBASE,
813 .end = TWI0_REGBASE,
814 .flags = IORESOURCE_MEM,
815 },
816 [1] = {
817 .start = IRQ_TWI,
818 .end = IRQ_TWI,
819 .flags = IORESOURCE_IRQ,
820 },
821};
822
823static struct platform_device i2c_bfin_twi_device = {
824 .name = "i2c-bfin-twi",
825 .id = 0,
826 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
827 .resource = bfin_twi0_resource,
828};
829#endif
830
6924dfb0
MH		 831#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
832#include <linux/mfd/adp5520.h>
833
834 /*
835 * ADP5520/5501 LEDs Data
836 */
837
838static struct led_info adp5520_leds[] = {
839 {
840 .name = "adp5520-led1",
841 .default_trigger = "none",
842 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
843 },
844};
845
846static struct adp5520_leds_platform_data adp5520_leds_data = {
847 .num_leds = ARRAY_SIZE(adp5520_leds),
848 .leds = adp5520_leds,
849 .fade_in = ADP5520_FADE_T_600ms,
850 .fade_out = ADP5520_FADE_T_600ms,
851 .led_on_time = ADP5520_LED_ONT_600ms,
852};
853
854 /*
855 * ADP5520 Keypad Data
856 */
857
858static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
859 [ADP5520_KEY(3, 3)] = KEY_1,
860 [ADP5520_KEY(2, 3)] = KEY_2,
861 [ADP5520_KEY(1, 3)] = KEY_3,
862 [ADP5520_KEY(0, 3)] = KEY_UP,
863 [ADP5520_KEY(3, 2)] = KEY_4,
864 [ADP5520_KEY(2, 2)] = KEY_5,
865 [ADP5520_KEY(1, 2)] = KEY_6,
866 [ADP5520_KEY(0, 2)] = KEY_DOWN,
867 [ADP5520_KEY(3, 1)] = KEY_7,
868 [ADP5520_KEY(2, 1)] = KEY_8,
869 [ADP5520_KEY(1, 1)] = KEY_9,
870 [ADP5520_KEY(0, 1)] = KEY_DOT,
871 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
872 [ADP5520_KEY(2, 0)] = KEY_0,
873 [ADP5520_KEY(1, 0)] = KEY_HELP,
874 [ADP5520_KEY(0, 0)] = KEY_ENTER,
875};
876
877static struct adp5520_keys_platform_data adp5520_keys_data = {
878 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
879 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
880 .keymap = adp5520_keymap,
881 .keymapsize = ARRAY_SIZE(adp5520_keymap),
882 .repeat = 0,
883};
884
885 /*
886 * ADP5520/5501 Multifuction Device Init Data
887 */
888
889static struct adp5520_platform_data adp5520_pdev_data = {
890 .leds = &adp5520_leds_data,
891 .keys = &adp5520_keys_data,
892};
893
894#endif
895
72268689 896static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
ebd58333 897#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
72268689
BW		 898 {
899 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
72268689
BW		 900 },
901#endif
204844eb 902#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
72268689
BW		 903 {
904 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
72268689
BW		 905 .irq = IRQ_PF8,
906 },
907#endif
50c4c086
MH		 908#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
909 {
910 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
911 },
912#endif
6924dfb0
MH		 913#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
914 {
915 I2C_BOARD_INFO("ad7879", 0x2C),
916 .irq = IRQ_PF8,
917 .platform_data = (void *)&bfin_ad7879_ts_info,
918 },
919#endif
920#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
921 {
922 I2C_BOARD_INFO("pmic-adp5520", 0x32),
923 .irq = IRQ_PF9,
924 .platform_data = (void *)&adp5520_pdev_data,
925 },
926#endif
29bb3bc0
CC		 927#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
928 {
929 I2C_BOARD_INFO("ssm2602", 0x1b),
930 },
931#endif
72268689 932};
72268689 933
59003145 934#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261
SZ		 935#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
936static struct resource bfin_sport0_uart_resources[] = {
937 {
938 .start = SPORT0_TCR1,
939 .end = SPORT0_MRCS3+4,
940 .flags = IORESOURCE_MEM,
941 },
942 {
943 .start = IRQ_SPORT0_RX,
944 .end = IRQ_SPORT0_RX+1,
945 .flags = IORESOURCE_IRQ,
946 },
947 {
948 .start = IRQ_SPORT0_ERROR,
949 .end = IRQ_SPORT0_ERROR,
950 .flags = IORESOURCE_IRQ,
951 },
952};
953
954unsigned short bfin_sport0_peripherals[] = {
955 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
956 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
957};
958
59003145
MH		 959static struct platform_device bfin_sport0_uart_device = {
960 .name = "bfin-sport-uart",
961 .id = 0,
df5de261
SZ		 962 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
963 .resource = bfin_sport0_uart_resources,
964 .dev = {
965 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
966 },
967};
968#endif
969#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
970static struct resource bfin_sport1_uart_resources[] = {
971 {
972 .start = SPORT1_TCR1,
973 .end = SPORT1_MRCS3+4,
974 .flags = IORESOURCE_MEM,
975 },
976 {
977 .start = IRQ_SPORT1_RX,
978 .end = IRQ_SPORT1_RX+1,
979 .flags = IORESOURCE_IRQ,
980 },
981 {
982 .start = IRQ_SPORT1_ERROR,
983 .end = IRQ_SPORT1_ERROR,
984 .flags = IORESOURCE_IRQ,
985 },
986};
987
988unsigned short bfin_sport1_peripherals[] = {
989 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
990 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
59003145
MH		 991};
992
993static struct platform_device bfin_sport1_uart_device = {
994 .name = "bfin-sport-uart",
995 .id = 1,
df5de261
SZ		 996 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
997 .resource = bfin_sport1_uart_resources,
998 .dev = {
999 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1000 },
59003145
MH		 1001};
1002#endif
df5de261 1003#endif
59003145 1004
1089e228 1005#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1089e228
MH		 1006#include <linux/gpio_keys.h>
1007
1008static struct gpio_keys_button bfin_gpio_keys_table[] = {
1009 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1010 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1011};
1012
1013static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1014 .buttons = bfin_gpio_keys_table,
1015 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1016};
1017
1018static struct platform_device bfin_device_gpiokeys = {
1019 .name = "gpio-keys",
1020 .dev = {
1021 .platform_data = &bfin_gpio_keys_data,
1022 },
1023};
1024#endif
1025
adfc0467 1026#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1027#include <asm/bfin_rotary.h>
1028
1029static struct bfin_rotary_platform_data bfin_rotary_data = {
1030 /*.rotary_up_key = KEY_UP,*/
1031 /*.rotary_down_key = KEY_DOWN,*/
1032 .rotary_rel_code = REL_WHEEL,
1033 .rotary_button_key = KEY_ENTER,
1034 .debounce = 10, /* 0..17 */
1035 .mode = ROT_QUAD_ENC | ROT_DEBE,
1036};
1037
1038static struct resource bfin_rotary_resources[] = {
1039 {
1040 .start = IRQ_CNT,
1041 .end = IRQ_CNT,
1042 .flags = IORESOURCE_IRQ,
1043 },
1044};
1045
1046static struct platform_device bfin_rotary_device = {
1047 .name = "bfin-rotary",
1048 .id = -1,
1049 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1050 .resource = bfin_rotary_resources,
1051 .dev = {
1052 .platform_data = &bfin_rotary_data,
1053 },
1054};
1055#endif
1056
14b03204
MH		 1057static const unsigned int cclk_vlev_datasheet[] =
1058{
1059 VRPAIR(VLEV_100, 400000000),
1060 VRPAIR(VLEV_105, 426000000),
1061 VRPAIR(VLEV_110, 500000000),
1062 VRPAIR(VLEV_115, 533000000),
1063 VRPAIR(VLEV_120, 600000000),
1064};
1065
1066static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1067 .tuple_tab = cclk_vlev_datasheet,
1068 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1069 .vr_settling_time = 25 /* us */,
1070};
1071
1072static struct platform_device bfin_dpmc = {
1073 .name = "bfin dpmc",
1074 .dev = {
1075 .platform_data = &bfin_dmpc_vreg_data,
1076 },
1077};
1078
59003145 1079static struct platform_device *stamp_devices[] __initdata = {
14b03204
MH		 1080
1081 &bfin_dpmc,
1082
64307f7d
MH		 1083#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1084 &bf5xx_nand_device,
1085#endif
1086
59003145
MH		 1087#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1088 &bfin_pcmcia_cf_device,
1089#endif
1090
1091#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1092 &rtc_device,
1093#endif
1094
3f375690
MH		 1095#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1096 &bfin_isp1760_device,
1097#endif
1098
1089e228
MH		 1099#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1100 &musb_device,
1101#endif
1102
59003145
MH		 1103#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1104 &smc91x_device,
1105#endif
1106
1107#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1108 &dm9000_device,
1109#endif
1110
1111#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
65319628 1112 &bfin_mii_bus,
59003145
MH		 1113 &bfin_mac_device,
1114#endif
1115
1116#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1117 &net2272_bfin_device,
1118#endif
1119
1120#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1121 &bfin_spi0_device,
1122#endif
1123
1089e228
MH		 1124#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1125 &bf52x_t350mcqb_device,
1126#endif
1127
6924dfb0
MH		 1128#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1129 &bfin_lq035q1_device,
1130#endif
1131
59003145 1132#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
6bd1fbea
SZ		 1133#ifdef CONFIG_SERIAL_BFIN_UART0
1134 &bfin_uart0_device,
1135#endif
1136#ifdef CONFIG_SERIAL_BFIN_UART1
1137 &bfin_uart1_device,
1138#endif
59003145
MH		 1139#endif
1140
5be36d22 1141#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
42bd8bcb
GY		 1142#ifdef CONFIG_BFIN_SIR0
1143 &bfin_sir0_device,
1144#endif
1145#ifdef CONFIG_BFIN_SIR1
1146 &bfin_sir1_device,
1147#endif
5be36d22
GY		 1148#endif
1149
59003145
MH		 1150#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1151 &i2c_bfin_twi_device,
1152#endif
1153
1154#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
df5de261 1155#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
59003145 1156 &bfin_sport0_uart_device,
df5de261
SZ		 1157#endif
1158#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
59003145
MH		 1159 &bfin_sport1_uart_device,
1160#endif
df5de261 1161#endif
59003145 1162
1089e228
MH		 1163#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1164 &bfin_device_gpiokeys,
1165#endif
cad2ab65 1166
adfc0467 1167#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
aca5e4aa
MH		 1168 &bfin_rotary_device,
1169#endif
1170
d7e5dd41
MH		 1171#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1172 &ezkit_flash_device,
1173#endif
336746ed
BS		 1174
1175#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1176 &bfin_i2s,
1177#endif
1178
1179#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1180 &bfin_tdm,
1181#endif
59003145
MH		 1182};
1183
7f6678c5 1184static int __init ezkit_init(void)
59003145 1185{
b85d858b 1186 printk(KERN_INFO "%s(): registering device resources\n", __func__);
72268689
BW		 1187 i2c_register_board_info(0, bfin_i2c_board_info,
1188 ARRAY_SIZE(bfin_i2c_board_info));
59003145 1189 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
5bda2723 1190 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
59003145
MH		 1191 return 0;
1192}
1193
7f6678c5 1194arch_initcall(ezkit_init);
59003145 1195
c13ce9fd
SZ		 1196static struct platform_device *ezkit_early_devices[] __initdata = {
1197#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1198#ifdef CONFIG_SERIAL_BFIN_UART0
1199 &bfin_uart0_device,
1200#endif
1201#ifdef CONFIG_SERIAL_BFIN_UART1
1202 &bfin_uart1_device,
1203#endif
1204#endif
1205
1206#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1207#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1208 &bfin_sport0_uart_device,
1209#endif
1210#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1211 &bfin_sport1_uart_device,
1212#endif
1213#endif
1214};
1215
1216void __init native_machine_early_platform_add_devices(void)
1217{
1218 printk(KERN_INFO "register early platform devices\n");
1219 early_platform_add_devices(ezkit_early_devices,
1220 ARRAY_SIZE(ezkit_early_devices));
1221}
1222
59003145
MH		 1223void native_machine_restart(char *cmd)
1224{
1225 /* workaround reboot hang when booting from SPI */
1226 if ((bfin_read_SYSCR() & 0x7) == 0x3)
b52dae31 1227 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
59003145 1228}
137b1529 1229
9862cc52 1230void bfin_get_ether_addr(char *addr)
137b1529 1231{
181afa94
MF		 1232 /* the MAC is stored in OTP memory page 0xDF */
1233 u32 ret;
1234 u64 otp_mac;
1235 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1236
1237 ret = otp_read(0xDF, 0x00, &otp_mac);
1238 if (!(ret & 0x1)) {
1239 char *otp_mac_p = (char *)&otp_mac;
1240 for (ret = 0; ret < 6; ++ret)
1241 addr[ret] = otp_mac_p[5 - ret];
1242 }
137b1529 1243}
9862cc52 1244EXPORT_SYMBOL(bfin_get_ether_addr);
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