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1 | /* |
2 | * File: arch/blackfin/kernel/time.c | |
3 | * Based on: none - original work | |
4 | * Author: | |
5 | * | |
6 | * Created: | |
7 | * Description: This file contains the bfin-specific time handling details. | |
8 | * Most of the stuff is located in the machine specific files. | |
e6c91b64 | 9 | * FIXME: (This file is subject for removal) |
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10 | * |
11 | * Modified: | |
e6c91b64 | 12 | * Copyright 2004-2008 Analog Devices Inc. |
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13 | * |
14 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License as published by | |
18 | * the Free Software Foundation; either version 2 of the License, or | |
19 | * (at your option) any later version. | |
20 | * | |
21 | * This program is distributed in the hope that it will be useful, | |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
24 | * GNU General Public License for more details. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License | |
27 | * along with this program; if not, see the file COPYING, or write | |
28 | * to the Free Software Foundation, Inc., | |
29 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
30 | */ | |
31 | ||
32 | #include <linux/module.h> | |
33 | #include <linux/profile.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include <linux/time.h> | |
36 | #include <linux/irq.h> | |
8f65873e | 37 | #include <linux/delay.h> |
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38 | |
39 | #include <asm/blackfin.h> | |
e6c91b64 | 40 | #include <asm/time.h> |
8f65873e | 41 | #include <asm/gptimers.h> |
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42 | |
43 | /* This is an NTP setting */ | |
44 | #define TICK_SIZE (tick_nsec / 1000) | |
45 | ||
349a2444 | 46 | static void time_sched_init(irq_handler_t timer_routine); |
1394f032 | 47 | static unsigned long gettimeoffset(void); |
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48 | |
49 | static struct irqaction bfin_timer_irq = { | |
50 | .name = "BFIN Timer Tick", | |
8f65873e GY |
51 | #ifdef CONFIG_IRQ_PER_CPU |
52 | .flags = IRQF_DISABLED | IRQF_PERCPU, | |
53 | #else | |
1394f032 | 54 | .flags = IRQF_DISABLED |
8f65873e | 55 | #endif |
1394f032 BW |
56 | }; |
57 | ||
8f65873e | 58 | void setup_core_timer(void) |
1394f032 BW |
59 | { |
60 | u32 tcount; | |
61 | ||
62 | /* power up the timer, but don't enable it just yet */ | |
63 | bfin_write_TCNTL(1); | |
64 | CSYNC(); | |
65 | ||
66 | /* | |
67 | * the TSCALE prescaler counter. | |
68 | */ | |
69 | bfin_write_TSCALE((TIME_SCALE - 1)); | |
70 | ||
71 | tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1); | |
72 | bfin_write_TPERIOD(tcount); | |
73 | bfin_write_TCOUNT(tcount); | |
74 | ||
75 | /* now enable the timer */ | |
76 | CSYNC(); | |
77 | ||
78 | bfin_write_TCNTL(7); | |
8f65873e GY |
79 | } |
80 | ||
81 | #ifdef CONFIG_TICK_SOURCE_SYSTMR0 | |
82 | void setup_system_timer0(void) | |
83 | { | |
84 | /* Power down the core timer, just to play safe. */ | |
85 | bfin_write_TCNTL(0); | |
86 | ||
87 | disable_gptimers(TIMER0bit); | |
88 | set_gptimer_status(0, TIMER_STATUS_TRUN0); | |
89 | while (get_gptimer_status(0) & TIMER_STATUS_TRUN0) | |
90 | udelay(10); | |
91 | ||
92 | set_gptimer_config(0, 0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */ | |
93 | set_gptimer_period(TIMER0_id, get_sclk() / HZ); | |
94 | set_gptimer_pwidth(TIMER0_id, 1); | |
95 | SSYNC(); | |
96 | enable_gptimers(TIMER0bit); | |
97 | } | |
98 | #endif | |
1394f032 | 99 | |
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100 | static void |
101 | time_sched_init(irqreturn_t(*timer_routine) (int, void *)) | |
102 | { | |
103 | #ifdef CONFIG_TICK_SOURCE_SYSTMR0 | |
104 | setup_system_timer0(); | |
105 | #else | |
106 | setup_core_timer(); | |
107 | #endif | |
1394f032 | 108 | bfin_timer_irq.handler = (irq_handler_t)timer_routine; |
8f65873e GY |
109 | #ifdef CONFIG_TICK_SOURCE_SYSTMR0 |
110 | setup_irq(IRQ_TIMER0, &bfin_timer_irq); | |
111 | #else | |
1394f032 | 112 | setup_irq(IRQ_CORETMR, &bfin_timer_irq); |
8f65873e | 113 | #endif |
1394f032 BW |
114 | } |
115 | ||
116 | /* | |
117 | * Should return useconds since last timer tick | |
118 | */ | |
119 | static unsigned long gettimeoffset(void) | |
120 | { | |
121 | unsigned long offset; | |
122 | unsigned long clocks_per_jiffy; | |
123 | ||
8f65873e GY |
124 | #ifdef CONFIG_TICK_SOURCE_SYSTMR0 |
125 | clocks_per_jiffy = bfin_read_TIMER0_PERIOD(); | |
126 | offset = bfin_read_TIMER0_COUNTER() / \ | |
127 | (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); | |
128 | ||
129 | if ((get_gptimer_status(0) & TIMER_STATUS_TIMIL0) && offset < (100000 / HZ / 2)) | |
130 | offset += (USEC_PER_SEC / HZ); | |
131 | #else | |
1394f032 | 132 | clocks_per_jiffy = bfin_read_TPERIOD(); |
8f65873e GY |
133 | offset = (clocks_per_jiffy - bfin_read_TCOUNT()) / \ |
134 | (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC); | |
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135 | |
136 | /* Check if we just wrapped the counters and maybe missed a tick */ | |
137 | if ((bfin_read_ILAT() & (1 << IRQ_CORETMR)) | |
8f65873e | 138 | && (offset < (100000 / HZ / 2))) |
1394f032 | 139 | offset += (USEC_PER_SEC / HZ); |
8f65873e | 140 | #endif |
1394f032 BW |
141 | return offset; |
142 | } | |
143 | ||
144 | static inline int set_rtc_mmss(unsigned long nowtime) | |
145 | { | |
146 | return 0; | |
147 | } | |
148 | ||
149 | /* | |
150 | * timer_interrupt() needs to keep up the real-time clock, | |
151 | * as well as call the "do_timer()" routine every clocktick | |
152 | */ | |
153 | #ifdef CONFIG_CORE_TIMER_IRQ_L1 | |
154 | irqreturn_t timer_interrupt(int irq, void *dummy)__attribute__((l1_text)); | |
155 | #endif | |
156 | ||
157 | irqreturn_t timer_interrupt(int irq, void *dummy) | |
158 | { | |
159 | /* last time the cmos clock got updated */ | |
1f83b8f1 | 160 | static long last_rtc_update; |
1394f032 BW |
161 | |
162 | write_seqlock(&xtime_lock); | |
8f65873e GY |
163 | #ifdef CONFIG_TICK_SOURCE_SYSTMR0 |
164 | if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) { | |
165 | #endif | |
166 | do_timer(1); | |
167 | ||
168 | ||
169 | /* | |
170 | * If we have an externally synchronized Linux clock, then update | |
171 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | |
172 | * called as close as possible to 500 ms before the new second starts. | |
173 | */ | |
174 | ||
175 | if (ntp_synced() && | |
176 | xtime.tv_sec > last_rtc_update + 660 && | |
177 | (xtime.tv_nsec / NSEC_PER_USEC) >= | |
178 | 500000 - ((unsigned)TICK_SIZE) / 2 | |
179 | && (xtime.tv_nsec / NSEC_PER_USEC) <= | |
180 | 500000 + ((unsigned)TICK_SIZE) / 2) { | |
181 | if (set_rtc_mmss(xtime.tv_sec) == 0) | |
182 | last_rtc_update = xtime.tv_sec; | |
183 | else | |
184 | /* Do it again in 60s. */ | |
185 | last_rtc_update = xtime.tv_sec - 600; | |
186 | } | |
187 | #ifdef CONFIG_TICK_SOURCE_SYSTMR0 | |
188 | set_gptimer_status(0, TIMER_STATUS_TIMIL0); | |
1394f032 | 189 | } |
8f65873e | 190 | #endif |
1394f032 | 191 | write_sequnlock(&xtime_lock); |
aa02cd2d | 192 | |
aa02cd2d | 193 | update_process_times(user_mode(get_irq_regs())); |
8f65873e | 194 | profile_tick(CPU_PROFILING); |
aa02cd2d | 195 | |
1394f032 BW |
196 | return IRQ_HANDLED; |
197 | } | |
198 | ||
199 | void __init time_init(void) | |
200 | { | |
201 | time_t secs_since_1970 = (365 * 37 + 9) * 24 * 60 * 60; /* 1 Jan 2007 */ | |
202 | ||
203 | #ifdef CONFIG_RTC_DRV_BFIN | |
204 | /* [#2663] hack to filter junk RTC values that would cause | |
205 | * userspace to have to deal with time values greater than | |
206 | * 2^31 seconds (which uClibc cannot cope with yet) | |
207 | */ | |
208 | if ((bfin_read_RTC_STAT() & 0xC0000000) == 0xC0000000) { | |
209 | printk(KERN_NOTICE "bfin-rtc: invalid date; resetting\n"); | |
210 | bfin_write_RTC_STAT(0); | |
211 | } | |
212 | #endif | |
213 | ||
214 | /* Initialize xtime. From now on, xtime is updated with timer interrupts */ | |
215 | xtime.tv_sec = secs_since_1970; | |
216 | xtime.tv_nsec = 0; | |
217 | ||
218 | wall_to_monotonic.tv_sec = -xtime.tv_sec; | |
219 | ||
220 | time_sched_init(timer_interrupt); | |
221 | } | |
222 | ||
223 | #ifndef CONFIG_GENERIC_TIME | |
224 | void do_gettimeofday(struct timeval *tv) | |
225 | { | |
226 | unsigned long flags; | |
227 | unsigned long seq; | |
228 | unsigned long usec, sec; | |
229 | ||
230 | do { | |
231 | seq = read_seqbegin_irqsave(&xtime_lock, flags); | |
232 | usec = gettimeoffset(); | |
233 | sec = xtime.tv_sec; | |
234 | usec += (xtime.tv_nsec / NSEC_PER_USEC); | |
235 | } | |
236 | while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); | |
237 | ||
238 | while (usec >= USEC_PER_SEC) { | |
239 | usec -= USEC_PER_SEC; | |
240 | sec++; | |
241 | } | |
242 | ||
243 | tv->tv_sec = sec; | |
244 | tv->tv_usec = usec; | |
245 | } | |
246 | EXPORT_SYMBOL(do_gettimeofday); | |
247 | ||
248 | int do_settimeofday(struct timespec *tv) | |
249 | { | |
250 | time_t wtm_sec, sec = tv->tv_sec; | |
251 | long wtm_nsec, nsec = tv->tv_nsec; | |
252 | ||
253 | if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) | |
254 | return -EINVAL; | |
255 | ||
256 | write_seqlock_irq(&xtime_lock); | |
257 | /* | |
258 | * This is revolting. We need to set the xtime.tv_usec | |
259 | * correctly. However, the value in this location is | |
260 | * is value at the last tick. | |
261 | * Discover what correction gettimeofday | |
262 | * would have done, and then undo it! | |
263 | */ | |
264 | nsec -= (gettimeoffset() * NSEC_PER_USEC); | |
265 | ||
266 | wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); | |
267 | wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); | |
268 | ||
269 | set_normalized_timespec(&xtime, sec, nsec); | |
270 | set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); | |
271 | ||
272 | ntp_clear(); | |
273 | ||
274 | write_sequnlock_irq(&xtime_lock); | |
275 | clock_was_set(); | |
276 | ||
277 | return 0; | |
278 | } | |
279 | EXPORT_SYMBOL(do_settimeofday); | |
280 | #endif /* !CONFIG_GENERIC_TIME */ | |
281 | ||
282 | /* | |
283 | * Scheduler clock - returns current time in nanosec units. | |
284 | */ | |
285 | unsigned long long sched_clock(void) | |
286 | { | |
287 | return (unsigned long long)jiffies *(NSEC_PER_SEC / HZ); | |
288 | } |