[net-next-2.6.git] / arch / blackfin / kernel / process.c

/*
 * Blackfin architecture-dependent process handling
 *
 * Copyright 2004-2009 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later
 */

#include <linux/module.h>
#include <linux/smp_lock.h>
#include <linux/unistd.h>
#include <linux/user.h>
#include <linux/uaccess.h>
#include <linux/sched.h>
#include <linux/tick.h>
#include <linux/fs.h>
#include <linux/err.h>

#include <asm/blackfin.h>
#include <asm/fixed_code.h>
#include <asm/mem_map.h>

asmlinkage void ret_from_fork(void);

/* Points to the SDRAM backup memory for the stack that is currently in
 * L1 scratchpad memory.
 */
void *current_l1_stack_save;

/* The number of tasks currently using a L1 stack area.  The SRAM is
 * allocated/deallocated whenever this changes from/to zero.
 */
int nr_l1stack_tasks;

/* Start and length of the area in L1 scratchpad memory which we've allocated
 * for process stacks.
 */
void *l1_stack_base;
unsigned long l1_stack_len;

/*
 * Powermanagement idle function, if any..
 */
void (*pm_idle)(void) = NULL;
EXPORT_SYMBOL(pm_idle);

void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);

/*
 * The idle loop on BFIN
 */
#ifdef CONFIG_IDLE_L1
static void default_idle(void)__attribute__((l1_text));
void cpu_idle(void)__attribute__((l1_text));
#endif

/*
 * This is our default idle handler.  We need to disable
 * interrupts here to ensure we don't miss a wakeup call.
 */
static void default_idle(void)
{
#ifdef CONFIG_IPIPE
	ipipe_suspend_domain();
#endif
	local_irq_disable_hw();
	if (!need_resched())
		idle_with_irq_disabled();

	local_irq_enable_hw();
}

/*
 * The idle thread.  We try to conserve power, while trying to keep
 * overall latency low.  The architecture specific idle is passed
 * a value to indicate the level of "idleness" of the system.
 */
void cpu_idle(void)
{
	/* endless idle loop with no priority at all */
	while (1) {
		void (*idle)(void) = pm_idle;

#ifdef CONFIG_HOTPLUG_CPU
		if (cpu_is_offline(smp_processor_id()))
			cpu_die();
#endif
		if (!idle)
			idle = default_idle;
		tick_nohz_stop_sched_tick(1);
		while (!need_resched())
			idle();
		tick_nohz_restart_sched_tick();
		preempt_enable_no_resched();
		schedule();
		preempt_disable();
	}
}

/* Fill in the fpu structure for a core dump.  */

int dump_fpu(struct pt_regs *regs, elf_fpregset_t * fpregs)
{
	return 1;
}

/*
 * This gets run with P1 containing the
 * function to call, and R1 containing
 * the "args".  Note P0 is clobbered on the way here.
 */
void kernel_thread_helper(void);
__asm__(".section .text\n"
	".align 4\n"
	"_kernel_thread_helper:\n\t"
	"\tsp += -12;\n\t"
	"\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous");

/*
 * Create a kernel thread.
 */
pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags)
{
	struct pt_regs regs;

	memset(&regs, 0, sizeof(regs));

	regs.r1 = (unsigned long)arg;
	regs.p1 = (unsigned long)fn;
	regs.pc = (unsigned long)kernel_thread_helper;
	regs.orig_p0 = -1;
	/* Set bit 2 to tell ret_from_fork we should be returning to kernel
	   mode.  */
	regs.ipend = 0x8002;
	__asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):);
	return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL,
		       NULL);
}
EXPORT_SYMBOL(kernel_thread);

/*
 * Do necessary setup to start up a newly executed thread.
 *
 * pass the data segment into user programs if it exists,
 * it can't hurt anything as far as I can tell
 */
void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
{
	set_fs(USER_DS);
	regs->pc = new_ip;
	if (current->mm)
		regs->p5 = current->mm->start_data;
#ifndef CONFIG_SMP
	task_thread_info(current)->l1_task_info.stack_start =
		(void *)current->mm->context.stack_start;
	task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
	memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
	       sizeof(*L1_SCRATCH_TASK_INFO));
#endif
	wrusp(new_sp);
}
EXPORT_SYMBOL_GPL(start_thread);

void flush_thread(void)
{
}

asmlinkage int bfin_vfork(struct pt_regs *regs)
{
	return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL,
		       NULL);
}

asmlinkage int bfin_clone(struct pt_regs *regs)
{
	unsigned long clone_flags;
	unsigned long newsp;

#ifdef __ARCH_SYNC_CORE_DCACHE
	if (current->rt.nr_cpus_allowed == num_possible_cpus()) {
		current->cpus_allowed = cpumask_of_cpu(smp_processor_id());
		current->rt.nr_cpus_allowed = 1;
	}
#endif

	/* syscall2 puts clone_flags in r0 and usp in r1 */
	clone_flags = regs->r0;
	newsp = regs->r1;
	if (!newsp)
		newsp = rdusp();
	else
		newsp -= 12;
	return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
}

int
copy_thread(unsigned long clone_flags,
	    unsigned long usp, unsigned long topstk,
	    struct task_struct *p, struct pt_regs *regs)
{
	struct pt_regs *childregs;

	childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
	*childregs = *regs;
	childregs->r0 = 0;

	p->thread.usp = usp;
	p->thread.ksp = (unsigned long)childregs;
	p->thread.pc = (unsigned long)ret_from_fork;

	return 0;
}

/*
 * sys_execve() executes a new program.
 */
asmlinkage int sys_execve(char __user *name, char __user * __user *argv, char __user * __user *envp)
{
	int error;
	char *filename;
	struct pt_regs *regs = (struct pt_regs *)((&name) + 6);

	filename = getname(name);
	error = PTR_ERR(filename);
	if (IS_ERR(filename))
		return error;
	error = do_execve(filename, argv, envp, regs);
	putname(filename);
	return error;
}

unsigned long get_wchan(struct task_struct *p)
{
	unsigned long fp, pc;
	unsigned long stack_page;
	int count = 0;
	if (!p || p == current || p->state == TASK_RUNNING)
		return 0;

	stack_page = (unsigned long)p;
	fp = p->thread.usp;
	do {
		if (fp < stack_page + sizeof(struct thread_info) ||
		    fp >= 8184 + stack_page)
			return 0;
		pc = ((unsigned long *)fp)[1];
		if (!in_sched_functions(pc))
			return pc;
		fp = *(unsigned long *)fp;
	}
	while (count++ < 16);
	return 0;
}

void finish_atomic_sections (struct pt_regs *regs)
{
	int __user *up0 = (int __user *)regs->p0;

	switch (regs->pc) {
	case ATOMIC_XCHG32 + 2:
		put_user(regs->r1, up0);
		regs->pc = ATOMIC_XCHG32 + 4;
		break;

	case ATOMIC_CAS32 + 2:
	case ATOMIC_CAS32 + 4:
		if (regs->r0 == regs->r1)
	case ATOMIC_CAS32 + 6:
			put_user(regs->r2, up0);
		regs->pc = ATOMIC_CAS32 + 8;
		break;

	case ATOMIC_ADD32 + 2:
		regs->r0 = regs->r1 + regs->r0;
		/* fall through */
	case ATOMIC_ADD32 + 4:
		put_user(regs->r0, up0);
		regs->pc = ATOMIC_ADD32 + 6;
		break;

	case ATOMIC_SUB32 + 2:
		regs->r0 = regs->r1 - regs->r0;
		/* fall through */
	case ATOMIC_SUB32 + 4:
		put_user(regs->r0, up0);
		regs->pc = ATOMIC_SUB32 + 6;
		break;

	case ATOMIC_IOR32 + 2:
		regs->r0 = regs->r1 | regs->r0;
		/* fall through */
	case ATOMIC_IOR32 + 4:
		put_user(regs->r0, up0);
		regs->pc = ATOMIC_IOR32 + 6;
		break;

	case ATOMIC_AND32 + 2:
		regs->r0 = regs->r1 & regs->r0;
		/* fall through */
	case ATOMIC_AND32 + 4:
		put_user(regs->r0, up0);
		regs->pc = ATOMIC_AND32 + 6;
		break;

	case ATOMIC_XOR32 + 2:
		regs->r0 = regs->r1 ^ regs->r0;
		/* fall through */
	case ATOMIC_XOR32 + 4:
		put_user(regs->r0, up0);
		regs->pc = ATOMIC_XOR32 + 6;
		break;
	}
}

static inline
int in_mem(unsigned long addr, unsigned long size,
           unsigned long start, unsigned long end)
{
	return addr >= start && addr + size <= end;
}
static inline
int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
                     unsigned long const_addr, unsigned long const_size)
{
	return const_size &&
	       in_mem(addr, size, const_addr + off, const_addr + const_size);
}
static inline
int in_mem_const(unsigned long addr, unsigned long size,
                 unsigned long const_addr, unsigned long const_size)
{
	return in_mem_const_off(addr, size, 0, const_addr, const_size);
}
#define IN_ASYNC(bnum, bctlnum) \
({ \
	(bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? -EFAULT : \
	bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? -EFAULT : \
	BFIN_MEM_ACCESS_CORE; \
})

int bfin_mem_access_type(unsigned long addr, unsigned long size)
{
	int cpu = raw_smp_processor_id();

	/* Check that things do not wrap around */
	if (addr > ULONG_MAX - size)
		return -EFAULT;

	if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
		return BFIN_MEM_ACCESS_CORE;

	if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
		return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
	if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
		return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
	if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
		return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
	if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
		return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
#ifdef COREB_L1_CODE_START
	if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
		return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
	if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
		return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
	if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
		return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
	if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
		return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
#endif
	if (in_mem_const(addr, size, L2_START, L2_LENGTH))
		return BFIN_MEM_ACCESS_CORE;

	if (addr >= SYSMMR_BASE)
		return BFIN_MEM_ACCESS_CORE_ONLY;

	/* We can't read EBIU banks that aren't enabled or we end up hanging
	 * on the access to the async space.
	 */
	if (in_mem_const(addr, size, ASYNC_BANK0_BASE, ASYNC_BANK0_SIZE))
		return IN_ASYNC(0, 0);
	if (in_mem_const(addr, size, ASYNC_BANK1_BASE, ASYNC_BANK1_SIZE))
		return IN_ASYNC(1, 0);
	if (in_mem_const(addr, size, ASYNC_BANK2_BASE, ASYNC_BANK2_SIZE))
		return IN_ASYNC(2, 1);
	if (in_mem_const(addr, size, ASYNC_BANK3_BASE, ASYNC_BANK3_SIZE))
		return IN_ASYNC(3, 1);

	if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
		return BFIN_MEM_ACCESS_CORE;
	if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
		return BFIN_MEM_ACCESS_DMA;

	return -EFAULT;
}

#if defined(CONFIG_ACCESS_CHECK)
#ifdef CONFIG_ACCESS_OK_L1
__attribute__((l1_text))
#endif
/* Return 1 if access to memory range is OK, 0 otherwise */
int _access_ok(unsigned long addr, unsigned long size)
{
	if (size == 0)
		return 1;
	/* Check that things do not wrap around */
	if (addr > ULONG_MAX - size)
		return 0;
	if (segment_eq(get_fs(), KERNEL_DS))
		return 1;
#ifdef CONFIG_MTD_UCLINUX
	if (1)
#else
	if (0)
#endif
	{
		if (in_mem(addr, size, memory_start, memory_end))
			return 1;
		if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
			return 1;
# ifndef CONFIG_ROMFS_ON_MTD
		if (0)
# endif
			/* For XIP, allow user space to use pointers within the ROMFS.  */
			if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
				return 1;
	} else {
		if (in_mem(addr, size, memory_start, physical_mem_end))
			return 1;
	}

	if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
		return 1;

	if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
		return 1;
	if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
		return 1;
	if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
		return 1;
	if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
		return 1;
#ifdef COREB_L1_CODE_START
	if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
		return 1;
	if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
		return 1;
	if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
		return 1;
	if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
		return 1;
#endif
	if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
		return 1;

	if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
		return 1;
	if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
		return 1;

	return 0;
}
EXPORT_SYMBOL(_access_ok);
#endif /* CONFIG_ACCESS_CHECK */
Commit	Line	Data
1394f032	1	/*
96f1050d	2	* Blackfin architecture-dependent process handling
1394f032	3	*
96f1050d	4	* Copyright 2004-2009 Analog Devices Inc.
1394f032	5	*
96f1050d	6	* Licensed under the GPL-2 or later
1394f032 BW	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/smp_lock.h>
	11	#include <linux/unistd.h>
	12	#include <linux/user.h>
1f83b8f1	13	#include <linux/uaccess.h>
8b5f79f9 VM	14	#include <linux/sched.h>
8b5f79f9 VM	15	#include <linux/tick.h>
d31c5ab1 BW	16	#include <linux/fs.h>
d31c5ab1 BW	17	#include <linux/err.h>
1394f032 BW	18
1394f032 BW	19	#include <asm/blackfin.h>
7adfb58f	20	#include <asm/fixed_code.h>
dbc895f9	21	#include <asm/mem_map.h>
1394f032	22
1394f032 BW	23	asmlinkage void ret_from_fork(void);
	24
	25	/* Points to the SDRAM backup memory for the stack that is currently in
	26	* L1 scratchpad memory.
	27	*/
	28	void *current_l1_stack_save;
	29
	30	/* The number of tasks currently using a L1 stack area. The SRAM is
	31	* allocated/deallocated whenever this changes from/to zero.
	32	*/
	33	int nr_l1stack_tasks;
	34
	35	/* Start and length of the area in L1 scratchpad memory which we've allocated
	36	* for process stacks.
	37	*/
	38	void *l1_stack_base;
	39	unsigned long l1_stack_len;
	40
	41	/*
	42	* Powermanagement idle function, if any..
	43	*/
	44	void (*pm_idle)(void) = NULL;
	45	EXPORT_SYMBOL(pm_idle);
	46
	47	void (*pm_power_off)(void) = NULL;
	48	EXPORT_SYMBOL(pm_power_off);
	49
1394f032 BW	50	/*
	51	* The idle loop on BFIN
	52	*/
	53	#ifdef CONFIG_IDLE_L1
8b5f79f9	54	static void default_idle(void)__attribute__((l1_text));
1394f032 BW	55	void cpu_idle(void)__attribute__((l1_text));
	56	#endif
	57
8b5f79f9 VM	58	/*
	59	* This is our default idle handler. We need to disable
	60	* interrupts here to ensure we don't miss a wakeup call.
	61	*/
	62	static void default_idle(void)
1394f032	63	{
6a01f230 YL	64	#ifdef CONFIG_IPIPE
	65	ipipe_suspend_domain();
	66	#endif
	67	local_irq_disable_hw();
8b5f79f9 VM	68	if (!need_resched())
8b5f79f9 VM	69	idle_with_irq_disabled();
1394f032	70
6a01f230	71	local_irq_enable_hw();
8b5f79f9	72	}
1394f032 BW	73
1394f032 BW	74	/*
8b5f79f9 VM	75	* The idle thread. We try to conserve power, while trying to keep
	76	* overall latency low. The architecture specific idle is passed
	77	* a value to indicate the level of "idleness" of the system.
1394f032 BW	78	*/
	79	void cpu_idle(void)
	80	{
	81	/* endless idle loop with no priority at all */
	82	while (1) {
8b5f79f9 VM	83	void (*idle)(void) = pm_idle;
	84
	85	#ifdef CONFIG_HOTPLUG_CPU
	86	if (cpu_is_offline(smp_processor_id()))
	87	cpu_die();
	88	#endif
	89	if (!idle)
	90	idle = default_idle;
b8f8c3cf	91	tick_nohz_stop_sched_tick(1);
8b5f79f9 VM	92	while (!need_resched())
	93	idle();
	94	tick_nohz_restart_sched_tick();
1394f032 BW	95	preempt_enable_no_resched();
	96	schedule();
	97	preempt_disable();
	98	}
	99	}
	100
1394f032 BW	101	/* Fill in the fpu structure for a core dump. */
	102
	103	int dump_fpu(struct pt_regs regs, elf_fpregset_t fpregs)
	104	{
	105	return 1;
	106	}
	107
	108	/*
	109	* This gets run with P1 containing the
	110	* function to call, and R1 containing
	111	* the "args". Note P0 is clobbered on the way here.
	112	*/
	113	void kernel_thread_helper(void);
	114	__asm__(".section .text\n"
	115	".align 4\n"
	116	"_kernel_thread_helper:\n\t"
	117	"\tsp += -12;\n\t"
	118	"\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous");
	119
	120	/*
	121	* Create a kernel thread.
	122	*/
	123	pid_t kernel_thread(int (fn) (void ), void *arg, unsigned long flags)
	124	{
	125	struct pt_regs regs;
	126
	127	memset(&regs, 0, sizeof(regs));
	128
	129	regs.r1 = (unsigned long)arg;
	130	regs.p1 = (unsigned long)fn;
	131	regs.pc = (unsigned long)kernel_thread_helper;
	132	regs.orig_p0 = -1;
	133	/* Set bit 2 to tell ret_from_fork we should be returning to kernel
	134	mode. */
	135	regs.ipend = 0x8002;
	136	__asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):);
	137	return do_fork(flags \| CLONE_VM \| CLONE_UNTRACED, 0, &regs, 0, NULL,
	138	NULL);
	139	}
fe8015ce	140	EXPORT_SYMBOL(kernel_thread);
1394f032	141
d5ce528c MF	142	/*
	143	* Do necessary setup to start up a newly executed thread.
	144	*
	145	* pass the data segment into user programs if it exists,
	146	* it can't hurt anything as far as I can tell
	147	*/
	148	void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
	149	{
	150	set_fs(USER_DS);
	151	regs->pc = new_ip;
	152	if (current->mm)
	153	regs->p5 = current->mm->start_data;
aa23531c	154	#ifndef CONFIG_SMP
d5ce528c MF	155	task_thread_info(current)->l1_task_info.stack_start =
	156	(void *)current->mm->context.stack_start;
	157	task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
	158	memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
	159	sizeof(*L1_SCRATCH_TASK_INFO));
	160	#endif
	161	wrusp(new_sp);
	162	}
	163	EXPORT_SYMBOL_GPL(start_thread);
	164
1394f032 BW	165	void flush_thread(void)
	166	{
	167	}
	168
	169	asmlinkage int bfin_vfork(struct pt_regs *regs)
	170	{
	171	return do_fork(CLONE_VFORK \| CLONE_VM \| SIGCHLD, rdusp(), regs, 0, NULL,
	172	NULL);
	173	}
	174
	175	asmlinkage int bfin_clone(struct pt_regs *regs)
	176	{
	177	unsigned long clone_flags;
	178	unsigned long newsp;
	179
8f65873e GY	180	#ifdef __ARCH_SYNC_CORE_DCACHE
	181	if (current->rt.nr_cpus_allowed == num_possible_cpus()) {
	182	current->cpus_allowed = cpumask_of_cpu(smp_processor_id());
	183	current->rt.nr_cpus_allowed = 1;
	184	}
	185	#endif
	186
1394f032 BW	187	/* syscall2 puts clone_flags in r0 and usp in r1 */
	188	clone_flags = regs->r0;
	189	newsp = regs->r1;
	190	if (!newsp)
	191	newsp = rdusp();
	192	else
	193	newsp -= 12;
	194	return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
	195	}
	196
	197	int
6f2c55b8	198	copy_thread(unsigned long clone_flags,
1394f032 BW	199	unsigned long usp, unsigned long topstk,
	200	struct task_struct p, struct pt_regs regs)
	201	{
	202	struct pt_regs *childregs;
	203
	204	childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
	205	childregs = regs;
	206	childregs->r0 = 0;
	207
	208	p->thread.usp = usp;
	209	p->thread.ksp = (unsigned long)childregs;
	210	p->thread.pc = (unsigned long)ret_from_fork;
	211
	212	return 0;
	213	}
	214
1394f032 BW	215	/*
	216	* sys_execve() executes a new program.
	217	*/
0ddeeca2	218	asmlinkage int sys_execve(char __user name, char __user __user argv, char __user __user *envp)
1394f032 BW	219	{
	220	int error;
	221	char *filename;
	222	struct pt_regs regs = (struct pt_regs )((&name) + 6);
	223
1394f032 BW	224	filename = getname(name);
	225	error = PTR_ERR(filename);
	226	if (IS_ERR(filename))
25708a5f	227	return error;
1394f032 BW	228	error = do_execve(filename, argv, envp, regs);
1394f032 BW	229	putname(filename);
1394f032 BW	230	return error;
	231	}
	232
	233	unsigned long get_wchan(struct task_struct *p)
	234	{
	235	unsigned long fp, pc;
	236	unsigned long stack_page;
	237	int count = 0;
	238	if (!p \|\| p == current \|\| p->state == TASK_RUNNING)
	239	return 0;
	240
	241	stack_page = (unsigned long)p;
	242	fp = p->thread.usp;
	243	do {
	244	if (fp < stack_page + sizeof(struct thread_info) \|\|
	245	fp >= 8184 + stack_page)
	246	return 0;
	247	pc = ((unsigned long *)fp)[1];
	248	if (!in_sched_functions(pc))
	249	return pc;
	250	fp = (unsigned long )fp;
	251	}
	252	while (count++ < 16);
	253	return 0;
	254	}
	255
7adfb58f BS	256	void finish_atomic_sections (struct pt_regs *regs)
7adfb58f BS	257	{
19d6d7d5	258	int __user up0 = (int __user )regs->p0;
0ddeeca2	259
7adfb58f BS	260	switch (regs->pc) {
7adfb58f BS	261	case ATOMIC_XCHG32 + 2:
0ddeeca2	262	put_user(regs->r1, up0);
92649494	263	regs->pc = ATOMIC_XCHG32 + 4;
7adfb58f BS	264	break;
	265
	266	case ATOMIC_CAS32 + 2:
	267	case ATOMIC_CAS32 + 4:
	268	if (regs->r0 == regs->r1)
92649494	269	case ATOMIC_CAS32 + 6:
0ddeeca2	270	put_user(regs->r2, up0);
7adfb58f BS	271	regs->pc = ATOMIC_CAS32 + 8;
7adfb58f BS	272	break;
7adfb58f BS	273
	274	case ATOMIC_ADD32 + 2:
	275	regs->r0 = regs->r1 + regs->r0;
	276	/* fall through */
	277	case ATOMIC_ADD32 + 4:
0ddeeca2	278	put_user(regs->r0, up0);
7adfb58f BS	279	regs->pc = ATOMIC_ADD32 + 6;
	280	break;
	281
	282	case ATOMIC_SUB32 + 2:
	283	regs->r0 = regs->r1 - regs->r0;
	284	/* fall through */
	285	case ATOMIC_SUB32 + 4:
0ddeeca2	286	put_user(regs->r0, up0);
7adfb58f BS	287	regs->pc = ATOMIC_SUB32 + 6;
	288	break;
	289
	290	case ATOMIC_IOR32 + 2:
	291	regs->r0 = regs->r1 \| regs->r0;
	292	/* fall through */
	293	case ATOMIC_IOR32 + 4:
0ddeeca2	294	put_user(regs->r0, up0);
7adfb58f BS	295	regs->pc = ATOMIC_IOR32 + 6;
	296	break;
	297
	298	case ATOMIC_AND32 + 2:
	299	regs->r0 = regs->r1 & regs->r0;
	300	/* fall through */
	301	case ATOMIC_AND32 + 4:
0ddeeca2	302	put_user(regs->r0, up0);
7adfb58f BS	303	regs->pc = ATOMIC_AND32 + 6;
	304	break;
	305
	306	case ATOMIC_XOR32 + 2:
	307	regs->r0 = regs->r1 ^ regs->r0;
	308	/* fall through */
	309	case ATOMIC_XOR32 + 4:
0ddeeca2	310	put_user(regs->r0, up0);
7adfb58f BS	311	regs->pc = ATOMIC_XOR32 + 6;
	312	break;
	313	}
	314	}
	315
e56e03b0 MF	316	static inline
	317	int in_mem(unsigned long addr, unsigned long size,
	318	unsigned long start, unsigned long end)
	319	{
	320	return addr >= start && addr + size <= end;
	321	}
	322	static inline
	323	int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
	324	unsigned long const_addr, unsigned long const_size)
	325	{
	326	return const_size &&
	327	in_mem(addr, size, const_addr + off, const_addr + const_size);
	328	}
	329	static inline
	330	int in_mem_const(unsigned long addr, unsigned long size,
	331	unsigned long const_addr, unsigned long const_size)
	332	{
fb4b5d3a	333	return in_mem_const_off(addr, size, 0, const_addr, const_size);
e56e03b0 MF	334	}
	335	#define IN_ASYNC(bnum, bctlnum) \
	336	({ \
	337	(bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? -EFAULT : \
	338	bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? -EFAULT : \
	339	BFIN_MEM_ACCESS_CORE; \
	340	})
	341
	342	int bfin_mem_access_type(unsigned long addr, unsigned long size)
	343	{
	344	int cpu = raw_smp_processor_id();
	345
	346	/* Check that things do not wrap around */
	347	if (addr > ULONG_MAX - size)
	348	return -EFAULT;
	349
	350	if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
	351	return BFIN_MEM_ACCESS_CORE;
	352
	353	if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
	354	return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
	355	if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
	356	return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
	357	if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
	358	return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
	359	if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
	360	return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
	361	#ifdef COREB_L1_CODE_START
fb4b5d3a	362	if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
e56e03b0 MF	363	return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
	364	if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
	365	return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
fb4b5d3a	366	if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
e56e03b0	367	return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
fb4b5d3a	368	if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
e56e03b0 MF	369	return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
	370	#endif
	371	if (in_mem_const(addr, size, L2_START, L2_LENGTH))
	372	return BFIN_MEM_ACCESS_CORE;
	373
	374	if (addr >= SYSMMR_BASE)
	375	return BFIN_MEM_ACCESS_CORE_ONLY;
	376
	377	/* We can't read EBIU banks that aren't enabled or we end up hanging
	378	* on the access to the async space.
	379	*/
	380	if (in_mem_const(addr, size, ASYNC_BANK0_BASE, ASYNC_BANK0_SIZE))
	381	return IN_ASYNC(0, 0);
	382	if (in_mem_const(addr, size, ASYNC_BANK1_BASE, ASYNC_BANK1_SIZE))
	383	return IN_ASYNC(1, 0);
	384	if (in_mem_const(addr, size, ASYNC_BANK2_BASE, ASYNC_BANK2_SIZE))
	385	return IN_ASYNC(2, 1);
	386	if (in_mem_const(addr, size, ASYNC_BANK3_BASE, ASYNC_BANK3_SIZE))
	387	return IN_ASYNC(3, 1);
	388
	389	if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
	390	return BFIN_MEM_ACCESS_CORE;
	391	if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
	392	return BFIN_MEM_ACCESS_DMA;
	393
	394	return -EFAULT;
	395	}
	396
1394f032	397	#if defined(CONFIG_ACCESS_CHECK)
a43b739f MF	398	#ifdef CONFIG_ACCESS_OK_L1
	399	__attribute__((l1_text))
	400	#endif
b03b08ba	401	/* Return 1 if access to memory range is OK, 0 otherwise */
1394f032 BW	402	int _access_ok(unsigned long addr, unsigned long size)
1394f032 BW	403	{
bc41bb11 BS	404	if (size == 0)
bc41bb11 BS	405	return 1;
e56e03b0 MF	406	/* Check that things do not wrap around */
e56e03b0 MF	407	if (addr > ULONG_MAX - size)
1394f032	408	return 0;
1f83b8f1	409	if (segment_eq(get_fs(), KERNEL_DS))
1394f032 BW	410	return 1;
1394f032 BW	411	#ifdef CONFIG_MTD_UCLINUX
e56e03b0 MF	412	if (1)
	413	#else
	414	if (0)
	415	#endif
	416	{
	417	if (in_mem(addr, size, memory_start, memory_end))
	418	return 1;
	419	if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
	420	return 1;
	421	# ifndef CONFIG_ROMFS_ON_MTD
	422	if (0)
	423	# endif
	424	/* For XIP, allow user space to use pointers within the ROMFS. */
	425	if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
	426	return 1;
	427	} else {
	428	if (in_mem(addr, size, memory_start, physical_mem_end))
	429	return 1;
	430	}
	431
	432	if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
1394f032	433	return 1;
d5adb029	434
e56e03b0	435	if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
d5adb029	436	return 1;
e56e03b0	437	if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
1394f032	438	return 1;
e56e03b0	439	if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
1394f032	440	return 1;
e56e03b0	441	if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
1394f032	442	return 1;
e56e03b0	443	#ifdef COREB_L1_CODE_START
fb4b5d3a	444	if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
1394f032	445	return 1;
e56e03b0	446	if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
1394f032	447	return 1;
fb4b5d3a	448	if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
1394f032	449	return 1;
fb4b5d3a	450	if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
b2c2f303	451	return 1;
1394f032	452	#endif
e56e03b0 MF	453	if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
	454	return 1;
	455
	456	if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
	457	return 1;
	458	if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
	459	return 1;
	460
1394f032 BW	461	return 0;
	462	}
	463	EXPORT_SYMBOL(_access_ok);
	464	#endif /* CONFIG_ACCESS_CHECK */