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5cc7fd88 BD |
1 | /* linux/arch/arm/plat-s3c/include/plat/sdhci.h |
2 | * | |
3 | * Copyright 2008 Openmoko, Inc. | |
4 | * Copyright 2008 Simtec Electronics | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * Ben Dooks <ben@simtec.co.uk> | |
7 | * | |
8 | * S3C Platform - SDHCI (HSMMC) platform data definitions | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #ifndef __PLAT_S3C_SDHCI_H | |
16 | #define __PLAT_S3C_SDHCI_H __FILE__ | |
17 | ||
18 | struct platform_device; | |
19 | struct mmc_host; | |
20 | struct mmc_card; | |
21 | struct mmc_ios; | |
22 | ||
23 | /** | |
24 | * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI | |
25 | * @max_width: The maximum number of data bits supported. | |
26 | * @host_caps: Standard MMC host capabilities bit field. | |
27 | * @cfg_gpio: Configure the GPIO for a specific card bit-width | |
28 | * @cfg_card: Configure the interface for a specific card and speed. This | |
29 | * is necessary the controllers and/or GPIO blocks require the | |
30 | * changing of driver-strength and other controls dependant on | |
31 | * the card and speed of operation. | |
32 | * | |
33 | * Initialisation data specific to either the machine or the platform | |
34 | * for the device driver to use or call-back when configuring gpio or | |
35 | * card speed information. | |
36 | */ | |
37 | struct s3c_sdhci_platdata { | |
38 | unsigned int max_width; | |
39 | unsigned int host_caps; | |
40 | ||
41 | char **clocks; /* set of clock sources */ | |
42 | ||
43 | void (*cfg_gpio)(struct platform_device *dev, int width); | |
44 | void (*cfg_card)(struct platform_device *dev, | |
45 | void __iomem *regbase, | |
46 | struct mmc_ios *ios, | |
47 | struct mmc_card *card); | |
48 | }; | |
49 | ||
50 | /** | |
51 | * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. | |
52 | * @pd: Platform data to register to device. | |
53 | * | |
54 | * Register the given platform data for use withe S3C SDHCI device. | |
55 | * The call will copy the platform data, so the board definitions can | |
56 | * make the structure itself __initdata. | |
57 | */ | |
58 | extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); | |
a2205cd2 | 59 | extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); |
86cd4f5f | 60 | extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); |
5cc7fd88 BD |
61 | |
62 | /* Default platform data, exported so that per-cpu initialisation can | |
63 | * set the correct one when there are more than one cpu type selected. | |
64 | */ | |
65 | ||
a2205cd2 BD |
66 | extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; |
67 | extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; | |
86cd4f5f | 68 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; |
5cc7fd88 BD |
69 | |
70 | /* Helper function availablity */ | |
71 | ||
4faf6867 BD |
72 | extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); |
73 | extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | |
86cd4f5f KP |
74 | extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); |
75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | |
76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | |
92b118f6 | 77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
e6f66a9f MS |
78 | extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); |
79 | extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | |
80 | extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | |
4faf6867 BD |
81 | |
82 | /* S3C6400 SDHCI setup */ | |
83 | ||
2f6c2ac1 BD |
84 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
85 | extern char *s3c64xx_hsmmc_clksrcs[4]; | |
4faf6867 BD |
86 | |
87 | #ifdef CONFIG_S3C_DEV_HSMMC | |
88 | extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | |
89 | void __iomem *r, | |
90 | struct mmc_ios *ios, | |
91 | struct mmc_card *card); | |
92 | ||
93 | static inline void s3c6400_default_sdhci0(void) | |
94 | { | |
2f6c2ac1 | 95 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
4faf6867 BD |
96 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
97 | s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | |
98 | } | |
99 | ||
100 | #else | |
101 | static inline void s3c6400_default_sdhci0(void) { } | |
102 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
103 | ||
104 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
105 | static inline void s3c6400_default_sdhci1(void) | |
106 | { | |
2f6c2ac1 | 107 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
4faf6867 BD |
108 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
109 | s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | |
110 | } | |
111 | #else | |
112 | static inline void s3c6400_default_sdhci1(void) { } | |
113 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
114 | ||
92b118f6 MC |
115 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
116 | static inline void s3c6400_default_sdhci2(void) | |
117 | { | |
2f6c2ac1 | 118 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
92b118f6 MC |
119 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
120 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | |
121 | } | |
122 | #else | |
123 | static inline void s3c6400_default_sdhci2(void) { } | |
124 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
125 | ||
4faf6867 BD |
126 | /* S3C6410 SDHCI setup */ |
127 | ||
2f6c2ac1 BD |
128 | extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, |
129 | void __iomem *r, | |
130 | struct mmc_ios *ios, | |
131 | struct mmc_card *card); | |
5cc7fd88 | 132 | |
713e9ded | 133 | #ifdef CONFIG_S3C_DEV_HSMMC |
5cc7fd88 BD |
134 | static inline void s3c6410_default_sdhci0(void) |
135 | { | |
2f6c2ac1 | 136 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
4faf6867 | 137 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
2f6c2ac1 | 138 | s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; |
5cc7fd88 | 139 | } |
713e9ded BD |
140 | #else |
141 | static inline void s3c6410_default_sdhci0(void) { } | |
142 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
a2205cd2 | 143 | |
713e9ded | 144 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
a2205cd2 BD |
145 | static inline void s3c6410_default_sdhci1(void) |
146 | { | |
2f6c2ac1 | 147 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
4faf6867 | 148 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
2f6c2ac1 | 149 | s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; |
a2205cd2 | 150 | } |
713e9ded BD |
151 | #else |
152 | static inline void s3c6410_default_sdhci1(void) { } | |
153 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
154 | ||
92b118f6 MC |
155 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
156 | static inline void s3c6410_default_sdhci2(void) | |
157 | { | |
2f6c2ac1 | 158 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; |
92b118f6 | 159 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
2f6c2ac1 | 160 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; |
92b118f6 MC |
161 | } |
162 | #else | |
163 | static inline void s3c6410_default_sdhci2(void) { } | |
164 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
165 | ||
5cc7fd88 BD |
166 | #else |
167 | static inline void s3c6410_default_sdhci0(void) { } | |
a2205cd2 | 168 | static inline void s3c6410_default_sdhci1(void) { } |
6b34f498 | 169 | static inline void s3c6410_default_sdhci2(void) { } |
2f6c2ac1 BD |
170 | static inline void s3c6400_default_sdhci0(void) { } |
171 | static inline void s3c6400_default_sdhci1(void) { } | |
6b34f498 | 172 | static inline void s3c6400_default_sdhci2(void) { } |
2f6c2ac1 BD |
173 | |
174 | #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ | |
5cc7fd88 | 175 | |
86cd4f5f KP |
176 | /* S5PC100 SDHCI setup */ |
177 | ||
178 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | |
179 | extern char *s5pc100_hsmmc_clksrcs[4]; | |
180 | ||
181 | extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | |
182 | void __iomem *r, | |
183 | struct mmc_ios *ios, | |
184 | struct mmc_card *card); | |
185 | ||
186 | #ifdef CONFIG_S3C_DEV_HSMMC | |
187 | static inline void s5pc100_default_sdhci0(void) | |
188 | { | |
189 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | |
190 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | |
191 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | |
192 | } | |
193 | #else | |
194 | static inline void s5pc100_default_sdhci0(void) { } | |
195 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
196 | ||
197 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
198 | static inline void s5pc100_default_sdhci1(void) | |
199 | { | |
200 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | |
201 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | |
202 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | |
203 | } | |
204 | #else | |
205 | static inline void s5pc100_default_sdhci1(void) { } | |
206 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
207 | ||
208 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
209 | static inline void s5pc100_default_sdhci2(void) | |
210 | { | |
211 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | |
212 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | |
213 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | |
214 | } | |
215 | #else | |
216 | static inline void s5pc100_default_sdhci2(void) { } | |
217 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
218 | ||
219 | ||
220 | #else | |
221 | static inline void s5pc100_default_sdhci0(void) { } | |
222 | static inline void s5pc100_default_sdhci1(void) { } | |
223 | static inline void s5pc100_default_sdhci2(void) { } | |
224 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | |
225 | ||
e6f66a9f MS |
226 | |
227 | /* S5PC110 SDHCI setup */ | |
228 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | |
229 | extern char *s5pv210_hsmmc_clksrcs[4]; | |
230 | ||
231 | extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | |
232 | void __iomem *r, | |
233 | struct mmc_ios *ios, | |
234 | struct mmc_card *card); | |
235 | ||
236 | #ifdef CONFIG_S3C_DEV_HSMMC | |
237 | static inline void s5pv210_default_sdhci0(void) | |
238 | { | |
239 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
240 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | |
241 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
242 | } | |
243 | #else | |
f50b8bc7 | 244 | static inline void s5pv210_default_sdhci0(void) { } |
e6f66a9f MS |
245 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
246 | ||
247 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
248 | static inline void s5pv210_default_sdhci1(void) | |
249 | { | |
250 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
251 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | |
252 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
253 | } | |
254 | #else | |
255 | static inline void s5pv210_default_sdhci1(void) { } | |
256 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
257 | ||
258 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
259 | static inline void s5pv210_default_sdhci2(void) | |
260 | { | |
261 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | |
262 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | |
263 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | |
264 | } | |
265 | #else | |
266 | static inline void s5pv210_default_sdhci2(void) { } | |
267 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
268 | ||
269 | #else | |
270 | static inline void s5pv210_default_sdhci0(void) { } | |
271 | static inline void s5pv210_default_sdhci1(void) { } | |
272 | static inline void s5pv210_default_sdhci2(void) { } | |
273 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | |
274 | ||
275 | ||
276 | ||
277 | ||
5cc7fd88 | 278 | #endif /* __PLAT_S3C_SDHCI_H */ |