git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| b7db51be KK |
1 | /* arch/arm/plat-s5p/irq.c |
| 2 | * | |
| 3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | |
| 4 | * http://www.samsung.com/ | |
| 5 | * | |
| 6 | * S5P - Interrupt handling | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/interrupt.h> | |
| 15 | #include <linux/irq.h> | |
| 16 | #include <linux/io.h> | |
| 17 | ||
| 18 | #include <asm/hardware/vic.h> | |
| 19 | ||
| 20 | #include <linux/serial_core.h> | |
| 21 | #include <mach/map.h> | |
| 22 | #include <plat/regs-timer.h> | |
| 23 | #include <plat/regs-serial.h> | |
| 24 | #include <plat/cpu.h> | |
| 25 | #include <plat/irq-vic-timer.h> | |
| 26 | #include <plat/irq-uart.h> | |
| 27 | ||
| b7db51be KK |
28 | /* |
| 29 | * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] | |
| 30 | * are consecutive when looking up the interrupt in the demux routines. | |
| 31 | */ | |
| 32 | static struct s3c_uart_irq uart_irqs[] = { | |
| 33 | [0] = { | |
| 34 | .regs = S5P_VA_UART0, | |
| 35 | .base_irq = IRQ_S5P_UART_BASE0, | |
| 36 | .parent_irq = IRQ_UART0, | |
| 37 | }, | |
| 38 | [1] = { | |
| 39 | .regs = S5P_VA_UART1, | |
| 40 | .base_irq = IRQ_S5P_UART_BASE1, | |
| 41 | .parent_irq = IRQ_UART1, | |
| 42 | }, | |
| 43 | [2] = { | |
| 44 | .regs = S5P_VA_UART2, | |
| 45 | .base_irq = IRQ_S5P_UART_BASE2, | |
| 46 | .parent_irq = IRQ_UART2, | |
| 47 | }, | |
| d9f18a98 | 48 | #if CONFIG_SERIAL_SAMSUNG_UARTS > 3 |
| b7db51be KK |
49 | [3] = { |
| 50 | .regs = S5P_VA_UART3, | |
| 51 | .base_irq = IRQ_S5P_UART_BASE3, | |
| 52 | .parent_irq = IRQ_UART3, | |
| 53 | }, | |
| d9f18a98 | 54 | #endif |
| b7db51be KK |
55 | }; |
| 56 | ||
| 57 | void __init s5p_init_irq(u32 *vic, u32 num_vic) | |
| 58 | { | |
| 59 | int irq; | |
| 60 | ||
| 61 | /* initialize the VICs */ | |
| 62 | for (irq = 0; irq < num_vic; irq++) | |
| 81317960 | 63 | vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); |
| b7db51be KK |
64 | |
| 65 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); | |
| 66 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); | |
| 67 | s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2); | |
| 68 | s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3); | |
| 69 | s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4); | |
| 70 | ||
| 71 | s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); | |
| 72 | } |