]>
Commit | Line | Data |
---|---|---|
367cd31e SS |
1 | /* |
2 | * OMAP4 machine specific smp.h | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments, Inc. | |
5 | * | |
6 | * Author: | |
7 | * Santosh Shilimkar <santosh.shilimkar@ti.com> | |
8 | * | |
9 | * Interface functions needed for the SMP. This file is based on arm | |
10 | * realview smp platform. | |
11 | * Copyright (c) 2003 ARM Limited. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | #ifndef OMAP_ARCH_SMP_H | |
18 | #define OMAP_ARCH_SMP_H | |
19 | ||
20 | #include <asm/hardware/gic.h> | |
21 | ||
367cd31e SS |
22 | /* Needed for secondary core boot */ |
23 | extern void omap_secondary_startup(void); | |
942e2c9e SS |
24 | extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); |
25 | extern void omap_auxcoreboot_addr(u32 cpu_addr); | |
3f9eaf09 | 26 | extern u32 omap_read_auxcoreboot0(void); |
367cd31e SS |
27 | |
28 | /* | |
29 | * We use Soft IRQ1 as the IPI | |
30 | */ | |
31 | static inline void smp_cross_call(const struct cpumask *mask) | |
32 | { | |
33 | gic_raise_softirq(mask, 1); | |
34 | } | |
35 | ||
36 | /* | |
37 | * Read MPIDR: Multiprocessor affinity register | |
38 | */ | |
39 | #define hard_smp_processor_id() \ | |
40 | ({ \ | |
41 | unsigned int cpunum; \ | |
42 | __asm__("mrc p15, 0, %0, c0, c0, 5" \ | |
43 | : "=r" (cpunum)); \ | |
44 | cpunum &= 0x0F; \ | |
45 | }) | |
46 | ||
47 | #endif |