[net-next-2.6.git] / arch / arm / plat-omap / include / mach / usb.h

// include/asm-arm/mach-omap/usb.h

#ifndef	__ASM_ARCH_OMAP_USB_H
#define	__ASM_ARCH_OMAP_USB_H

#include <mach/board.h>

/*-------------------------------------------------------------------------*/

#define OMAP1_OTG_BASE			0xfffb0400
#define OMAP1_UDC_BASE			0xfffb4000
#define OMAP1_OHCI_BASE			0xfffba000

#define OMAP2_OHCI_BASE			0x4805e000
#define OMAP2_UDC_BASE			0x4805e200
#define OMAP2_OTG_BASE			0x4805e300

#ifdef CONFIG_ARCH_OMAP1

#define OTG_BASE			OMAP1_OTG_BASE
#define UDC_BASE			OMAP1_UDC_BASE
#define OMAP_OHCI_BASE			OMAP1_OHCI_BASE

#else

#define OTG_BASE			OMAP2_OTG_BASE
#define UDC_BASE			OMAP2_UDC_BASE
#define OMAP_OHCI_BASE			OMAP2_OHCI_BASE

#ifdef CONFIG_USB_MUSB_SOC
extern void usb_musb_init(void);
#else
static inline void usb_musb_init(void)
{
}
#endif

#endif

void omap_usb_init(struct omap_usb_config *pdata);

/*-------------------------------------------------------------------------*/

/*
 * OTG and transceiver registers, for OMAPs starting with ARM926
 */
#define OTG_REV				(OTG_BASE + 0x00)
#define OTG_SYSCON_1			(OTG_BASE + 0x04)
#	define	 USB2_TRX_MODE(w)	(((w)>>24)&0x07)
#	define	 USB1_TRX_MODE(w)	(((w)>>20)&0x07)
#	define	 USB0_TRX_MODE(w)	(((w)>>16)&0x07)
#	define	 OTG_IDLE_EN		(1 << 15)
#	define	 HST_IDLE_EN		(1 << 14)
#	define	 DEV_IDLE_EN		(1 << 13)
#	define	 OTG_RESET_DONE		(1 << 2)
#	define	 OTG_SOFT_RESET		(1 << 1)
#define OTG_SYSCON_2			(OTG_BASE + 0x08)
#	define	 OTG_EN			(1 << 31)
#	define	 USBX_SYNCHRO		(1 << 30)
#	define	 OTG_MST16		(1 << 29)
#	define	 SRP_GPDATA		(1 << 28)
#	define	 SRP_GPDVBUS		(1 << 27)
#	define	 SRP_GPUVBUS(w)		(((w)>>24)&0x07)
#	define	 A_WAIT_VRISE(w)	(((w)>>20)&0x07)
#	define	 B_ASE_BRST(w)		(((w)>>16)&0x07)
#	define	 SRP_DPW		(1 << 14)
#	define	 SRP_DATA		(1 << 13)
#	define	 SRP_VBUS		(1 << 12)
#	define	 OTG_PADEN		(1 << 10)
#	define	 HMC_PADEN		(1 << 9)
#	define	 UHOST_EN		(1 << 8)
#	define	 HMC_TLLSPEED		(1 << 7)
#	define	 HMC_TLLATTACH		(1 << 6)
#	define	 OTG_HMC(w)		(((w)>>0)&0x3f)
#define OTG_CTRL			(OTG_BASE + 0x0c)
#	define	 OTG_USB2_EN		(1 << 29)
#	define	 OTG_USB2_DP		(1 << 28)
#	define	 OTG_USB2_DM		(1 << 27)
#	define	 OTG_USB1_EN		(1 << 26)
#	define	 OTG_USB1_DP		(1 << 25)
#	define	 OTG_USB1_DM		(1 << 24)
#	define	 OTG_USB0_EN		(1 << 23)
#	define	 OTG_USB0_DP		(1 << 22)
#	define	 OTG_USB0_DM		(1 << 21)
#	define	 OTG_ASESSVLD		(1 << 20)
#	define	 OTG_BSESSEND		(1 << 19)
#	define	 OTG_BSESSVLD		(1 << 18)
#	define	 OTG_VBUSVLD		(1 << 17)
#	define	 OTG_ID			(1 << 16)
#	define	 OTG_DRIVER_SEL		(1 << 15)
#	define	 OTG_A_SETB_HNPEN	(1 << 12)
#	define	 OTG_A_BUSREQ		(1 << 11)
#	define	 OTG_B_HNPEN		(1 << 9)
#	define	 OTG_B_BUSREQ		(1 << 8)
#	define	 OTG_BUSDROP		(1 << 7)
#	define	 OTG_PULLDOWN		(1 << 5)
#	define	 OTG_PULLUP		(1 << 4)
#	define	 OTG_DRV_VBUS		(1 << 3)
#	define	 OTG_PD_VBUS		(1 << 2)
#	define	 OTG_PU_VBUS		(1 << 1)
#	define	 OTG_PU_ID		(1 << 0)
#define OTG_IRQ_EN			(OTG_BASE + 0x10)	/* 16-bit */
#	define	 DRIVER_SWITCH		(1 << 15)
#	define	 A_VBUS_ERR		(1 << 13)
#	define	 A_REQ_TMROUT		(1 << 12)
#	define	 A_SRP_DETECT		(1 << 11)
#	define	 B_HNP_FAIL		(1 << 10)
#	define	 B_SRP_TMROUT		(1 << 9)
#	define	 B_SRP_DONE		(1 << 8)
#	define	 B_SRP_STARTED		(1 << 7)
#	define	 OPRT_CHG		(1 << 0)
#define OTG_IRQ_SRC			(OTG_BASE + 0x14)	/* 16-bit */
	// same bits as in IRQ_EN
#define OTG_OUTCTRL			(OTG_BASE + 0x18)	/* 16-bit */
#	define	 OTGVPD			(1 << 14)
#	define	 OTGVPU			(1 << 13)
#	define	 OTGPUID		(1 << 12)
#	define	 USB2VDR		(1 << 10)
#	define	 USB2PDEN		(1 << 9)
#	define	 USB2PUEN		(1 << 8)
#	define	 USB1VDR		(1 << 6)
#	define	 USB1PDEN		(1 << 5)
#	define	 USB1PUEN		(1 << 4)
#	define	 USB0VDR		(1 << 2)
#	define	 USB0PDEN		(1 << 1)
#	define	 USB0PUEN		(1 << 0)
#define OTG_TEST			(OTG_BASE + 0x20)	/* 16-bit */
#define OTG_VENDOR_CODE			(OTG_BASE + 0xfc)	/* 16-bit */

/*-------------------------------------------------------------------------*/

/* OMAP1 */
#define	USB_TRANSCEIVER_CTRL		(0xfffe1000 + 0x0064)
#	define	CONF_USB2_UNI_R		(1 << 8)
#	define	CONF_USB1_UNI_R		(1 << 7)
#	define	CONF_USB_PORT0_R(x)	(((x)>>4)&0x7)
#	define	CONF_USB0_ISOLATE_R	(1 << 3)
#	define	CONF_USB_PWRDN_DM_R	(1 << 2)
#	define	CONF_USB_PWRDN_DP_R	(1 << 1)

/* OMAP2 */
#	define	USB_UNIDIR			0x0
#	define	USB_UNIDIR_TLL			0x1
#	define	USB_BIDIR			0x2
#	define	USB_BIDIR_TLL			0x3
#	define	USBTXWRMODEI(port, x)	((x) << (22 - (port * 2)))
#	define	USBT2TLL5PI		(1 << 17)
#	define	USB0PUENACTLOI		(1 << 16)
#	define	USBSTANDBYCTRL		(1 << 15)

#endif	/* __ASM_ARCH_OMAP_USB_H */
Commit	Line	Data
1da177e4 LT	1	// include/asm-arm/mach-omap/usb.h
	2
	3	#ifndef __ASM_ARCH_OMAP_USB_H
	4	#define __ASM_ARCH_OMAP_USB_H
	5
a09e64fb	6	#include <mach/board.h>
1da177e4 LT	7
	8	/-------------------------------------------------------------------------/
	9
f4e4c324 TL	10	#define OMAP1_OTG_BASE 0xfffb0400
	11	#define OMAP1_UDC_BASE 0xfffb4000
	12	#define OMAP1_OHCI_BASE 0xfffba000
	13
	14	#define OMAP2_OHCI_BASE 0x4805e000
	15	#define OMAP2_UDC_BASE 0x4805e200
	16	#define OMAP2_OTG_BASE 0x4805e300
	17
	18	#ifdef CONFIG_ARCH_OMAP1
	19
	20	#define OTG_BASE OMAP1_OTG_BASE
	21	#define UDC_BASE OMAP1_UDC_BASE
	22	#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
	23
	24	#else
	25
	26	#define OTG_BASE OMAP2_OTG_BASE
	27	#define UDC_BASE OMAP2_UDC_BASE
	28	#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
	29
18cb7aca FB	30	#ifdef CONFIG_USB_MUSB_SOC
	31	extern void usb_musb_init(void);
	32	#else
	33	static inline void usb_musb_init(void)
	34	{
	35	}
	36	#endif
	37
f4e4c324	38	#endif
1da177e4	39
b0b5aa3f FB	40	void omap_usb_init(struct omap_usb_config *pdata);
b0b5aa3f FB	41
1da177e4 LT	42	/-------------------------------------------------------------------------/
	43
	44	/*
	45	* OTG and transceiver registers, for OMAPs starting with ARM926
	46	*/
f35ae634 TL	47	#define OTG_REV (OTG_BASE + 0x00)
f35ae634 TL	48	#define OTG_SYSCON_1 (OTG_BASE + 0x04)
1da177e4 LT	49	# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
	50	# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
	51	# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
	52	# define OTG_IDLE_EN (1 << 15)
	53	# define HST_IDLE_EN (1 << 14)
	54	# define DEV_IDLE_EN (1 << 13)
	55	# define OTG_RESET_DONE (1 << 2)
f4e4c324	56	# define OTG_SOFT_RESET (1 << 1)
f35ae634	57	#define OTG_SYSCON_2 (OTG_BASE + 0x08)
1da177e4 LT	58	# define OTG_EN (1 << 31)
	59	# define USBX_SYNCHRO (1 << 30)
	60	# define OTG_MST16 (1 << 29)
	61	# define SRP_GPDATA (1 << 28)
	62	# define SRP_GPDVBUS (1 << 27)
	63	# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
	64	# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
	65	# define B_ASE_BRST(w) (((w)>>16)&0x07)
	66	# define SRP_DPW (1 << 14)
	67	# define SRP_DATA (1 << 13)
	68	# define SRP_VBUS (1 << 12)
	69	# define OTG_PADEN (1 << 10)
	70	# define HMC_PADEN (1 << 9)
	71	# define UHOST_EN (1 << 8)
	72	# define HMC_TLLSPEED (1 << 7)
	73	# define HMC_TLLATTACH (1 << 6)
	74	# define OTG_HMC(w) (((w)>>0)&0x3f)
f35ae634	75	#define OTG_CTRL (OTG_BASE + 0x0c)
65111084 DB	76	# define OTG_USB2_EN (1 << 29)
	77	# define OTG_USB2_DP (1 << 28)
	78	# define OTG_USB2_DM (1 << 27)
	79	# define OTG_USB1_EN (1 << 26)
	80	# define OTG_USB1_DP (1 << 25)
	81	# define OTG_USB1_DM (1 << 24)
	82	# define OTG_USB0_EN (1 << 23)
	83	# define OTG_USB0_DP (1 << 22)
	84	# define OTG_USB0_DM (1 << 21)
1da177e4 LT	85	# define OTG_ASESSVLD (1 << 20)
	86	# define OTG_BSESSEND (1 << 19)
	87	# define OTG_BSESSVLD (1 << 18)
	88	# define OTG_VBUSVLD (1 << 17)
	89	# define OTG_ID (1 << 16)
	90	# define OTG_DRIVER_SEL (1 << 15)
	91	# define OTG_A_SETB_HNPEN (1 << 12)
	92	# define OTG_A_BUSREQ (1 << 11)
	93	# define OTG_B_HNPEN (1 << 9)
	94	# define OTG_B_BUSREQ (1 << 8)
	95	# define OTG_BUSDROP (1 << 7)
	96	# define OTG_PULLDOWN (1 << 5)
	97	# define OTG_PULLUP (1 << 4)
	98	# define OTG_DRV_VBUS (1 << 3)
	99	# define OTG_PD_VBUS (1 << 2)
	100	# define OTG_PU_VBUS (1 << 1)
	101	# define OTG_PU_ID (1 << 0)
f35ae634	102	#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
1da177e4 LT	103	# define DRIVER_SWITCH (1 << 15)
	104	# define A_VBUS_ERR (1 << 13)
	105	# define A_REQ_TMROUT (1 << 12)
	106	# define A_SRP_DETECT (1 << 11)
	107	# define B_HNP_FAIL (1 << 10)
	108	# define B_SRP_TMROUT (1 << 9)
	109	# define B_SRP_DONE (1 << 8)
	110	# define B_SRP_STARTED (1 << 7)
	111	# define OPRT_CHG (1 << 0)
f35ae634	112	#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
1da177e4	113	// same bits as in IRQ_EN
f35ae634	114	#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
1da177e4 LT	115	# define OTGVPD (1 << 14)
	116	# define OTGVPU (1 << 13)
	117	# define OTGPUID (1 << 12)
	118	# define USB2VDR (1 << 10)
	119	# define USB2PDEN (1 << 9)
	120	# define USB2PUEN (1 << 8)
	121	# define USB1VDR (1 << 6)
	122	# define USB1PDEN (1 << 5)
	123	# define USB1PUEN (1 << 4)
	124	# define USB0VDR (1 << 2)
	125	# define USB0PDEN (1 << 1)
	126	# define USB0PUEN (1 << 0)
f35ae634 TL	127	#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
f35ae634 TL	128	#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
1da177e4 LT	129
	130	/-------------------------------------------------------------------------/
	131
f4e4c324	132	/* OMAP1 */
f35ae634	133	#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
1da177e4 LT	134	# define CONF_USB2_UNI_R (1 << 8)
	135	# define CONF_USB1_UNI_R (1 << 7)
	136	# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
	137	# define CONF_USB0_ISOLATE_R (1 << 3)
	138	# define CONF_USB_PWRDN_DM_R (1 << 2)
	139	# define CONF_USB_PWRDN_DP_R (1 << 1)
	140
f4e4c324	141	/* OMAP2 */
f4e4c324 TL	142	# define USB_UNIDIR 0x0
	143	# define USB_UNIDIR_TLL 0x1
	144	# define USB_BIDIR 0x2
	145	# define USB_BIDIR_TLL 0x3
69d88a00	146	# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2)))
f4e4c324 TL	147	# define USBT2TLL5PI (1 << 17)
	148	# define USB0PUENACTLOI (1 << 16)
	149	# define USBSTANDBYCTRL (1 << 15)
1da177e4 LT	150
1da177e4 LT	151	#endif /* __ASM_ARCH_OMAP_USB_H */