[net-next-2.6.git] / arch / arm / mach-ux500 / board-mop500.c

/*
 * Copyright (C) 2008-2009 ST-Ericsson
 *
 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl022.h>
#include <linux/spi/spi.h>
#include <linux/mfd/ab8500.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <plat/pincfg.h>
#include <plat/i2c.h>

#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include <mach/irqs.h>

#include "pins-db8500.h"
#include "board-mop500.h"

static pin_cfg_t mop500_pins[] = {
	/* SSP0 */
	GPIO143_SSP0_CLK,
	GPIO144_SSP0_FRM,
	GPIO145_SSP0_RXD,
	GPIO146_SSP0_TXD,

	/* I2C */
	GPIO147_I2C0_SCL,
	GPIO148_I2C0_SDA,
	GPIO16_I2C1_SCL,
	GPIO17_I2C1_SDA,
	GPIO10_I2C2_SDA,
	GPIO11_I2C2_SCL,
	GPIO229_I2C3_SDA,
	GPIO230_I2C3_SCL,
};

static void ab4500_spi_cs_control(u32 command)
{
	/* set the FRM signal, which is CS  - TODO */
}

struct pl022_config_chip ab4500_chip_info = {
	.lbm = LOOPBACK_DISABLED,
	.com_mode = INTERRUPT_TRANSFER,
	.iface = SSP_INTERFACE_MOTOROLA_SPI,
	/* we can act as master only */
	.hierarchy = SSP_MASTER,
	.slave_tx_disable = 0,
	.endian_rx = SSP_RX_MSB,
	.endian_tx = SSP_TX_MSB,
	.data_size = SSP_DATA_BITS_24,
	.rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
	.tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
	.clk_phase = SSP_CLK_SECOND_EDGE,
	.clk_pol = SSP_CLK_POL_IDLE_HIGH,
	.cs_control = ab4500_spi_cs_control,
};

static struct ab8500_platform_data ab8500_platdata = {
	.irq_base	= MOP500_AB8500_IRQ_BASE,
};

static struct resource ab8500_resources[] = {
	[0] = {
		.start = IRQ_AB8500,
		.end = IRQ_AB8500,
		.flags = IORESOURCE_IRQ
	}
};

struct platform_device ab8500_device = {
	.name = "ab8500-i2c",
	.id = 0,
	.dev = {
		.platform_data = &ab8500_platdata,
	},
	.num_resources = 1,
	.resource = ab8500_resources,
};

static struct spi_board_info ab8500_spi_devices[] = {
	{
		.modalias = "ab8500-spi",
		.controller_data = &ab4500_chip_info,
		.platform_data = &ab8500_platdata,
		.max_speed_hz = 12000000,
		.bus_num = 0,
		.chip_select = 0,
		.mode = SPI_MODE_0,
		.irq = IRQ_DB8500_AB8500,
	},
};

static struct pl022_ssp_controller ssp0_platform_data = {
	.bus_id = 0,
	/* pl022 not yet supports dma */
	.enable_dma = 0,
	/* on this platform, gpio 31,142,144,214 &
	 * 224 are connected as chip selects
	 */
	.num_chipselect = 5,
};

#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
static struct nmk_i2c_controller u8500_i2c##id##_data = { \
	/*				\
	 * slave data setup time, which is	\
	 * 250 ns,100ns,10ns which is 14,6,2	\
	 * respectively for a 48 Mhz	\
	 * i2c clock			\
	 */				\
	.slsu		= _slsu,	\
	/* Tx FIFO threshold */		\
	.tft		= _tft,		\
	/* Rx FIFO threshold */		\
	.rft		= _rft,		\
	/* std. mode operation */	\
	.clk_freq	= clk,		\
	.sm		= _sm,		\
}

/*
 * The board uses 4 i2c controllers, initialize all of
 * them with slave data setup time of 250 ns,
 * Tx & Rx FIFO threshold values as 1 and standard
 * mode of operation
 */
U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(2,	0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
U8500_I2C_CONTROLLER(3,	0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);

static struct amba_device *amba_devs[] __initdata = {
	&ux500_uart0_device,
	&ux500_uart1_device,
	&ux500_uart2_device,
	&u8500_ssp0_device,
};

/* add any platform devices here - TODO */
static struct platform_device *platform_devs[] __initdata = {
	&u8500_i2c0_device,
	&ux500_i2c1_device,
	&ux500_i2c2_device,
	&ux500_i2c3_device,
};

static void __init u8500_init_machine(void)
{
	int i;

	u8500_init_devices();

	nmk_config_pins(mop500_pins, ARRAY_SIZE(mop500_pins));

	u8500_i2c0_device.dev.platform_data = &u8500_i2c0_data;
	ux500_i2c1_device.dev.platform_data = &u8500_i2c1_data;
	ux500_i2c2_device.dev.platform_data = &u8500_i2c2_data;
	ux500_i2c3_device.dev.platform_data = &u8500_i2c3_data;

	u8500_ssp0_device.dev.platform_data = &ssp0_platform_data;

	/* Register the active AMBA devices on this board */
	for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
		amba_device_register(amba_devs[i], &iomem_resource);

	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));

	mop500_sdi_init();

	/* If HW is early drop (ED) or V1.0 then use SPI to access AB8500 */
	if (cpu_is_u8500ed() || cpu_is_u8500v10())
		spi_register_board_info(ab8500_spi_devices,
			ARRAY_SIZE(ab8500_spi_devices));
	else /* If HW is v.1.1 or later use I2C to access AB8500 */
		platform_device_register(&ab8500_device);
}

MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
	/* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
	.boot_params	= 0x100,
	.map_io		= u8500_map_io,
	.init_irq	= ux500_init_irq,
	/* we re-use nomadik timer here */
	.timer		= &ux500_timer,
	.init_machine	= u8500_init_machine,
MACHINE_END
Commit	Line	Data
aa44ef4d SK	1	/*
	2	* Copyright (C) 2008-2009 ST-Ericsson
	3	*
	4	* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/platform_device.h>
	15	#include <linux/io.h>
ea05a57f	16	#include <linux/gpio.h>
aa44ef4d SK	17	#include <linux/amba/bus.h>
	18	#include <linux/amba/pl022.h>
	19	#include <linux/spi/spi.h>
39ae702c	20	#include <linux/mfd/ab8500.h>
aa44ef4d	21
aa44ef4d SK	22	#include <asm/mach-types.h>
	23	#include <asm/mach/arch.h>
	24
ea05a57f	25	#include <plat/pincfg.h>
d48a41c1	26	#include <plat/i2c.h>
aa44ef4d SK	27
	28	#include <mach/hardware.h>
	29	#include <mach/setup.h>
9e4e7fe1	30	#include <mach/devices.h>
29aeb3cf	31	#include <mach/irqs.h>
aa44ef4d	32
ea05a57f	33	#include "pins-db8500.h"
008f8a2f	34	#include "board-mop500.h"
ea05a57f RV	35
	36	static pin_cfg_t mop500_pins[] = {
	37	/* SSP0 */
	38	GPIO143_SSP0_CLK,
	39	GPIO144_SSP0_FRM,
	40	GPIO145_SSP0_RXD,
	41	GPIO146_SSP0_TXD,
	42
	43	/* I2C */
	44	GPIO147_I2C0_SCL,
	45	GPIO148_I2C0_SDA,
	46	GPIO16_I2C1_SCL,
	47	GPIO17_I2C1_SDA,
	48	GPIO10_I2C2_SDA,
	49	GPIO11_I2C2_SCL,
	50	GPIO229_I2C3_SDA,
	51	GPIO230_I2C3_SCL,
	52	};
	53
aa44ef4d SK	54	static void ab4500_spi_cs_control(u32 command)
	55	{
	56	/* set the FRM signal, which is CS - TODO */
	57	}
	58
	59	struct pl022_config_chip ab4500_chip_info = {
	60	.lbm = LOOPBACK_DISABLED,
	61	.com_mode = INTERRUPT_TRANSFER,
	62	.iface = SSP_INTERFACE_MOTOROLA_SPI,
	63	/* we can act as master only */
	64	.hierarchy = SSP_MASTER,
	65	.slave_tx_disable = 0,
	66	.endian_rx = SSP_RX_MSB,
	67	.endian_tx = SSP_TX_MSB,
	68	.data_size = SSP_DATA_BITS_24,
	69	.rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
	70	.tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
	71	.clk_phase = SSP_CLK_SECOND_EDGE,
	72	.clk_pol = SSP_CLK_POL_IDLE_HIGH,
	73	.cs_control = ab4500_spi_cs_control,
	74	};
	75
39ae702c RV	76	static struct ab8500_platform_data ab8500_platdata = {
	77	.irq_base = MOP500_AB8500_IRQ_BASE,
	78	};
	79
29aeb3cf LW	80	static struct resource ab8500_resources[] = {
	81	[0] = {
	82	.start = IRQ_AB8500,
	83	.end = IRQ_AB8500,
	84	.flags = IORESOURCE_IRQ
	85	}
	86	};
	87
	88	struct platform_device ab8500_device = {
	89	.name = "ab8500-i2c",
	90	.id = 0,
	91	.dev = {
	92	.platform_data = &ab8500_platdata,
	93	},
	94	.num_resources = 1,
	95	.resource = ab8500_resources,
	96	};
	97
	98	static struct spi_board_info ab8500_spi_devices[] = {
aa44ef4d	99	{
29aeb3cf	100	.modalias = "ab8500-spi",
aa44ef4d	101	.controller_data = &ab4500_chip_info,
39ae702c	102	.platform_data = &ab8500_platdata,
aa44ef4d SK	103	.max_speed_hz = 12000000,
	104	.bus_num = 0,
	105	.chip_select = 0,
	106	.mode = SPI_MODE_0,
6055930c	107	.irq = IRQ_DB8500_AB8500,
aa44ef4d SK	108	},
	109	};
	110
	111	static struct pl022_ssp_controller ssp0_platform_data = {
	112	.bus_id = 0,
	113	/* pl022 not yet supports dma */
	114	.enable_dma = 0,
	115	/* on this platform, gpio 31,142,144,214 &
	116	* 224 are connected as chip selects
	117	*/
	118	.num_chipselect = 5,
	119	};
	120
d48a41c1	121	#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
f9faf237	122	static struct nmk_i2c_controller u8500_i2c##id##_data = { \
d48a41c1 SK	123	/* \
	124	* slave data setup time, which is \
	125	* 250 ns,100ns,10ns which is 14,6,2 \
	126	* respectively for a 48 Mhz \
	127	* i2c clock \
	128	*/ \
	129	.slsu = _slsu, \
	130	/* Tx FIFO threshold */ \
	131	.tft = _tft, \
	132	/* Rx FIFO threshold */ \
	133	.rft = _rft, \
	134	/* std. mode operation */ \
	135	.clk_freq = clk, \
	136	.sm = _sm, \
	137	}
	138
	139	/*
	140	* The board uses 4 i2c controllers, initialize all of
	141	* them with slave data setup time of 250 ns,
	142	* Tx & Rx FIFO threshold values as 1 and standard
	143	* mode of operation
	144	*/
	145	U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	146	U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	147	U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	148	U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
	149
aa44ef4d	150	static struct amba_device *amba_devs[] __initdata = {
4b27aa41 RV	151	&ux500_uart0_device,
	152	&ux500_uart1_device,
	153	&ux500_uart2_device,
9e4e7fe1	154	&u8500_ssp0_device,
aa44ef4d SK	155	};
aa44ef4d SK	156
d48a41c1 SK	157	/* add any platform devices here - TODO */
d48a41c1 SK	158	static struct platform_device *platform_devs[] __initdata = {
f9faf237 RV	159	&u8500_i2c0_device,
	160	&ux500_i2c1_device,
	161	&ux500_i2c2_device,
	162	&ux500_i2c3_device,
d48a41c1 SK	163	};
d48a41c1 SK	164
aa44ef4d SK	165	static void __init u8500_init_machine(void)
	166	{
	167	int i;
	168
ea05a57f RV	169	u8500_init_devices();
	170
	171	nmk_config_pins(mop500_pins, ARRAY_SIZE(mop500_pins));
	172
f9faf237 RV	173	u8500_i2c0_device.dev.platform_data = &u8500_i2c0_data;
	174	ux500_i2c1_device.dev.platform_data = &u8500_i2c1_data;
	175	ux500_i2c2_device.dev.platform_data = &u8500_i2c2_data;
	176	ux500_i2c3_device.dev.platform_data = &u8500_i2c3_data;
	177
9e4e7fe1 RV	178	u8500_ssp0_device.dev.platform_data = &ssp0_platform_data;
9e4e7fe1 RV	179
aa44ef4d SK	180	/* Register the active AMBA devices on this board */
	181	for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
	182	amba_device_register(amba_devs[i], &iomem_resource);
	183
d48a41c1 SK	184	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
d48a41c1 SK	185
008f8a2f HP	186	mop500_sdi_init();
008f8a2f HP	187
29aeb3cf LW	188	/* If HW is early drop (ED) or V1.0 then use SPI to access AB8500 */
	189	if (cpu_is_u8500ed() \|\| cpu_is_u8500v10())
	190	spi_register_board_info(ab8500_spi_devices,
	191	ARRAY_SIZE(ab8500_spi_devices));
	192	else /* If HW is v.1.1 or later use I2C to access AB8500 */
	193	platform_device_register(&ab8500_device);
aa44ef4d SK	194	}
	195
	196	MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
	197	/* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
aa44ef4d SK	198	.boot_params = 0x100,
aa44ef4d SK	199	.map_io = u8500_map_io,
178980f9	200	.init_irq = ux500_init_irq,
aa44ef4d	201	/* we re-use nomadik timer here */
41ac329f	202	.timer = &ux500_timer,
aa44ef4d SK	203	.init_machine = u8500_init_machine,
aa44ef4d SK	204	MACHINE_END