[net-next-2.6.git] / arch / arm / mach-shmobile / setup-sh7367.c

/*
 * sh7367 processor support
 *
 * Copyright (C) 2010  Magnus Damm
 * Copyright (C) 2008  Yoshihiro Shimoda
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

/* SCIFA0 */
static struct plat_sci_port scif0_platform_data = {
	.mapbase	= 0xe6c40000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xc00), evt2irq(0xc00),
			    evt2irq(0xc00), evt2irq(0xc00) },
};

static struct platform_device scif0_device = {
	.name		= "sh-sci",
	.id		= 0,
	.dev		= {
		.platform_data	= &scif0_platform_data,
	},
};

/* SCIFA1 */
static struct plat_sci_port scif1_platform_data = {
	.mapbase	= 0xe6c50000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xc20), evt2irq(0xc20),
			    evt2irq(0xc20), evt2irq(0xc20) },
};

static struct platform_device scif1_device = {
	.name		= "sh-sci",
	.id		= 1,
	.dev		= {
		.platform_data	= &scif1_platform_data,
	},
};

/* SCIFA2 */
static struct plat_sci_port scif2_platform_data = {
	.mapbase	= 0xe6c60000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xc40), evt2irq(0xc40),
			    evt2irq(0xc40), evt2irq(0xc40) },
};

static struct platform_device scif2_device = {
	.name		= "sh-sci",
	.id		= 2,
	.dev		= {
		.platform_data	= &scif2_platform_data,
	},
};

/* SCIFA3 */
static struct plat_sci_port scif3_platform_data = {
	.mapbase	= 0xe6c70000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xc60), evt2irq(0xc60),
			    evt2irq(0xc60), evt2irq(0xc60) },
};

static struct platform_device scif3_device = {
	.name		= "sh-sci",
	.id		= 3,
	.dev		= {
		.platform_data	= &scif3_platform_data,
	},
};

/* SCIFA4 */
static struct plat_sci_port scif4_platform_data = {
	.mapbase	= 0xe6c80000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xd20), evt2irq(0xd20),
			    evt2irq(0xd20), evt2irq(0xd20) },
};

static struct platform_device scif4_device = {
	.name		= "sh-sci",
	.id		= 4,
	.dev		= {
		.platform_data	= &scif4_platform_data,
	},
};

/* SCIFA5 */
static struct plat_sci_port scif5_platform_data = {
	.mapbase	= 0xe6cb0000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xd40), evt2irq(0xd40),
			    evt2irq(0xd40), evt2irq(0xd40) },
};

static struct platform_device scif5_device = {
	.name		= "sh-sci",
	.id		= 5,
	.dev		= {
		.platform_data	= &scif5_platform_data,
	},
};

/* SCIFB */
static struct plat_sci_port scif6_platform_data = {
	.mapbase	= 0xe6c30000,
	.flags		= UPF_BOOT_AUTOCONF,
	.type		= PORT_SCIF,
	.irqs		= { evt2irq(0xd60), evt2irq(0xd60),
			    evt2irq(0xd60), evt2irq(0xd60) },
};

static struct platform_device scif6_device = {
	.name		= "sh-sci",
	.id		= 6,
	.dev		= {
		.platform_data	= &scif6_platform_data,
	},
};

static struct sh_timer_config cmt10_platform_data = {
	.name = "CMT10",
	.channel_offset = 0x10,
	.timer_bit = 0,
	.clockevent_rating = 125,
	.clocksource_rating = 125,
};

static struct resource cmt10_resources[] = {
	[0] = {
		.name	= "CMT10",
		.start	= 0xe6138010,
		.end	= 0xe613801b,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= evt2irq(0xb00), /* CMT1_CMT10 */
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device cmt10_device = {
	.name		= "sh_cmt",
	.id		= 10,
	.dev = {
		.platform_data	= &cmt10_platform_data,
	},
	.resource	= cmt10_resources,
	.num_resources	= ARRAY_SIZE(cmt10_resources),
};

static struct platform_device *sh7367_early_devices[] __initdata = {
	&scif0_device,
	&scif1_device,
	&scif2_device,
	&scif3_device,
	&scif4_device,
	&scif5_device,
	&scif6_device,
	&cmt10_device,
};

void __init sh7367_add_standard_devices(void)
{
	platform_add_devices(sh7367_early_devices,
			     ARRAY_SIZE(sh7367_early_devices));
}

#define SYMSTPCR2 0xe6158048
#define SYMSTPCR2_CMT1 (1 << 29)

void __init sh7367_add_early_devices(void)
{
	/* enable clock to CMT1 */
	__raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);

	early_platform_add_devices(sh7367_early_devices,
				   ARRAY_SIZE(sh7367_early_devices));
}
Commit	Line	Data
c793c1b0 MD	1	/*
	2	* sh7367 processor support
	3	*
	4	* Copyright (C) 2010 Magnus Damm
	5	* Copyright (C) 2008 Yoshihiro Shimoda
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; version 2 of the License.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	19	*/
	20	#include <linux/kernel.h>
	21	#include <linux/init.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/irq.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/delay.h>
	26	#include <linux/input.h>
	27	#include <linux/io.h>
	28	#include <linux/serial_sci.h>
c793c1b0 MD	29	#include <linux/sh_timer.h>
	30	#include <mach/hardware.h>
	31	#include <asm/mach-types.h>
	32	#include <asm/mach/arch.h>
	33
7490509f	34	/* SCIFA0 */
c793c1b0 MD	35	static struct plat_sci_port scif0_platform_data = {
	36	.mapbase = 0xe6c40000,
	37	.flags = UPF_BOOT_AUTOCONF,
	38	.type = PORT_SCIF,
7490509f MD	39	.irqs = { evt2irq(0xc00), evt2irq(0xc00),
7490509f MD	40	evt2irq(0xc00), evt2irq(0xc00) },
c793c1b0 MD	41	};
	42
	43	static struct platform_device scif0_device = {
	44	.name = "sh-sci",
	45	.id = 0,
	46	.dev = {
	47	.platform_data = &scif0_platform_data,
	48	},
	49	};
	50
7490509f	51	/* SCIFA1 */
c793c1b0 MD	52	static struct plat_sci_port scif1_platform_data = {
	53	.mapbase = 0xe6c50000,
	54	.flags = UPF_BOOT_AUTOCONF,
	55	.type = PORT_SCIF,
7490509f MD	56	.irqs = { evt2irq(0xc20), evt2irq(0xc20),
7490509f MD	57	evt2irq(0xc20), evt2irq(0xc20) },
c793c1b0 MD	58	};
	59
	60	static struct platform_device scif1_device = {
	61	.name = "sh-sci",
	62	.id = 1,
	63	.dev = {
	64	.platform_data = &scif1_platform_data,
	65	},
	66	};
	67
7490509f	68	/* SCIFA2 */
c793c1b0 MD	69	static struct plat_sci_port scif2_platform_data = {
	70	.mapbase = 0xe6c60000,
	71	.flags = UPF_BOOT_AUTOCONF,
	72	.type = PORT_SCIF,
7490509f MD	73	.irqs = { evt2irq(0xc40), evt2irq(0xc40),
7490509f MD	74	evt2irq(0xc40), evt2irq(0xc40) },
c793c1b0 MD	75	};
	76
	77	static struct platform_device scif2_device = {
	78	.name = "sh-sci",
	79	.id = 2,
	80	.dev = {
	81	.platform_data = &scif2_platform_data,
	82	},
	83	};
	84
7490509f	85	/* SCIFA3 */
c793c1b0 MD	86	static struct plat_sci_port scif3_platform_data = {
	87	.mapbase = 0xe6c70000,
	88	.flags = UPF_BOOT_AUTOCONF,
	89	.type = PORT_SCIF,
7490509f MD	90	.irqs = { evt2irq(0xc60), evt2irq(0xc60),
7490509f MD	91	evt2irq(0xc60), evt2irq(0xc60) },
c793c1b0 MD	92	};
	93
	94	static struct platform_device scif3_device = {
	95	.name = "sh-sci",
	96	.id = 3,
	97	.dev = {
	98	.platform_data = &scif3_platform_data,
	99	},
	100	};
	101
7490509f	102	/* SCIFA4 */
c793c1b0 MD	103	static struct plat_sci_port scif4_platform_data = {
	104	.mapbase = 0xe6c80000,
	105	.flags = UPF_BOOT_AUTOCONF,
	106	.type = PORT_SCIF,
7490509f MD	107	.irqs = { evt2irq(0xd20), evt2irq(0xd20),
7490509f MD	108	evt2irq(0xd20), evt2irq(0xd20) },
c793c1b0 MD	109	};
	110
	111	static struct platform_device scif4_device = {
	112	.name = "sh-sci",
	113	.id = 4,
	114	.dev = {
	115	.platform_data = &scif4_platform_data,
	116	},
	117	};
	118
7490509f	119	/* SCIFA5 */
c793c1b0 MD	120	static struct plat_sci_port scif5_platform_data = {
	121	.mapbase = 0xe6cb0000,
	122	.flags = UPF_BOOT_AUTOCONF,
	123	.type = PORT_SCIF,
7490509f MD	124	.irqs = { evt2irq(0xd40), evt2irq(0xd40),
7490509f MD	125	evt2irq(0xd40), evt2irq(0xd40) },
c793c1b0 MD	126	};
	127
	128	static struct platform_device scif5_device = {
	129	.name = "sh-sci",
	130	.id = 5,
	131	.dev = {
	132	.platform_data = &scif5_platform_data,
	133	},
	134	};
	135
7490509f	136	/* SCIFB */
c793c1b0 MD	137	static struct plat_sci_port scif6_platform_data = {
	138	.mapbase = 0xe6c30000,
	139	.flags = UPF_BOOT_AUTOCONF,
	140	.type = PORT_SCIF,
7490509f MD	141	.irqs = { evt2irq(0xd60), evt2irq(0xd60),
7490509f MD	142	evt2irq(0xd60), evt2irq(0xd60) },
c793c1b0 MD	143	};
	144
	145	static struct platform_device scif6_device = {
	146	.name = "sh-sci",
	147	.id = 6,
	148	.dev = {
	149	.platform_data = &scif6_platform_data,
	150	},
	151	};
	152
	153	static struct sh_timer_config cmt10_platform_data = {
	154	.name = "CMT10",
	155	.channel_offset = 0x10,
	156	.timer_bit = 0,
c793c1b0 MD	157	.clockevent_rating = 125,
	158	.clocksource_rating = 125,
	159	};
	160
	161	static struct resource cmt10_resources[] = {
	162	[0] = {
	163	.name = "CMT10",
	164	.start = 0xe6138010,
	165	.end = 0xe613801b,
	166	.flags = IORESOURCE_MEM,
	167	},
	168	[1] = {
7490509f	169	.start = evt2irq(0xb00), /* CMT1_CMT10 */
c793c1b0 MD	170	.flags = IORESOURCE_IRQ,
	171	},
	172	};
	173
	174	static struct platform_device cmt10_device = {
	175	.name = "sh_cmt",
	176	.id = 10,
	177	.dev = {
	178	.platform_data = &cmt10_platform_data,
	179	},
	180	.resource = cmt10_resources,
	181	.num_resources = ARRAY_SIZE(cmt10_resources),
	182	};
	183
	184	static struct platform_device *sh7367_early_devices[] __initdata = {
	185	&scif0_device,
	186	&scif1_device,
	187	&scif2_device,
	188	&scif3_device,
	189	&scif4_device,
	190	&scif5_device,
	191	&scif6_device,
	192	&cmt10_device,
	193	};
	194
	195	void __init sh7367_add_standard_devices(void)
	196	{
	197	platform_add_devices(sh7367_early_devices,
	198	ARRAY_SIZE(sh7367_early_devices));
	199	}
	200
	201	#define SYMSTPCR2 0xe6158048
	202	#define SYMSTPCR2_CMT1 (1 << 29)
	203
	204	void __init sh7367_add_early_devices(void)
	205	{
	206	/* enable clock to CMT1 */
	207	__raw_writel(__raw_readl(SYMSTPCR2) & ~SYMSTPCR2_CMT1, SYMSTPCR2);
	208
	209	early_platform_add_devices(sh7367_early_devices,
	210	ARRAY_SIZE(sh7367_early_devices));
	211	}