]> bbs.cooldavid.org Git - net-next-2.6.git/blame - arch/arm/mach-shmobile/board-ap4evb.c
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[net-next-2.6.git] / arch / arm / mach-shmobile / board-ap4evb.c
CommitLineData
2b7eda63
MD
1/*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
8eda2f21 20#include <linux/clk.h>
2b7eda63
MD
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/platform_device.h>
26#include <linux/delay.h>
69bf6f45 27#include <linux/mfd/sh_mobile_sdhi.h>
410d878b 28#include <linux/mfd/tmio.h>
341291a6 29#include <linux/mmc/host.h>
2b7eda63
MD
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32#include <linux/mtd/physmap.h>
c8ee3d4b
KM
33#include <linux/mmc/host.h>
34#include <linux/mmc/sh_mmcif.h>
91cf5082
KM
35#include <linux/i2c.h>
36#include <linux/i2c/tsc2007.h>
2b7eda63 37#include <linux/io.h>
1b7e0677 38#include <linux/smsc911x.h>
cb9215e1
KM
39#include <linux/sh_intc.h>
40#include <linux/sh_clk.h>
1b7e0677 41#include <linux/gpio.h>
17ccb834 42#include <linux/input.h>
2863e935 43#include <linux/leds.h>
17ccb834 44#include <linux/input/sh_keysc.h>
fb54d268 45#include <linux/usb/r8a66597.h>
8eda2f21 46
cb9215e1
KM
47#include <sound/sh_fsi.h>
48
dfbcdf64 49#include <video/sh_mobile_hdmi.h>
8eda2f21
GL
50#include <video/sh_mobile_lcdc.h>
51#include <video/sh_mipi_dsi.h>
52
2b7eda63 53#include <mach/common.h>
8eda2f21 54#include <mach/irqs.h>
1b7e0677 55#include <mach/sh7372.h>
8eda2f21 56
2b7eda63
MD
57#include <asm/mach-types.h>
58#include <asm/mach/arch.h>
59#include <asm/mach/map.h>
495b3cea 60#include <asm/mach/time.h>
2b7eda63 61
02624a17
KM
62/*
63 * Address Interface BusWidth note
64 * ------------------------------------------------------------------
65 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
66 * 0x0800_0000 user area -
67 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
68 * 0x1400_0000 Ether (LAN9220) 16bit
69 * 0x1600_0000 user area - cannot use with NAND
70 * 0x1800_0000 user area -
71 * 0x1A00_0000 -
72 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
73 */
74
75/*
76 * NOR Flash ROM
77 *
78 * SW1 | SW2 | SW7 | NOR Flash ROM
79 * bit1 | bit1 bit2 | bit1 | Memory allocation
80 * ------+------------+------+------------------
81 * OFF | ON OFF | ON | Area 0
82 * OFF | ON OFF | OFF | Area 4
83 */
84
85/*
86 * NAND Flash ROM
87 *
88 * SW1 | SW2 | SW7 | NAND Flash ROM
89 * bit1 | bit1 bit2 | bit2 | Memory allocation
90 * ------+------------+------+------------------
91 * OFF | ON OFF | ON | FCE 0
92 * OFF | ON OFF | OFF | FCE 1
93 */
94
95/*
96 * SMSC 9220
97 *
98 * SW1 SMSC 9220
99 * -----------------------
100 * ON access disable
101 * OFF access enable
102 */
103
17ccb834 104/*
dda128dc 105 * LCD / IRQ / KEYSC / IrDA
17ccb834 106 *
9fa1b7fe
KM
107 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
108 * LCD = 2nd LCDC (WVGA)
dda128dc
KM
109 *
110 * | SW43 |
111 * SW3 | ON | OFF |
112 * -------------+-----------------------+---------------+
113 * ON | KEY / IrDA | LCD |
114 * OFF | KEY / IrDA / IRQ | IRQ |
9fa1b7fe
KM
115 *
116 *
117 * QHD / WVGA display
118 *
119 * You can choice display type on menuconfig.
120 * Then, check above dip-switch.
17ccb834
KM
121 */
122
fb54d268
KM
123/*
124 * USB
125 *
126 * J7 : 1-2 MAX3355E VBUS
127 * 2-3 DC 5.0V
128 *
129 * S39: bit2: off
130 */
131
cb9215e1
KM
132/*
133 * FSI/FSMI
134 *
135 * SW41 : ON : SH-Mobile AP4 Audio Mode
136 * : OFF : Bluetooth Audio Mode
137 */
138
c8ee3d4b 139/*
d3d03e48 140 * MMC0/SDHI1 (CN7)
c8ee3d4b 141 *
d3d03e48
KM
142 * J22 : select card voltage
143 * 1-2 pin : 1.8v
144 * 2-3 pin : 3.3v
145 *
146 * SW1 | SW33
147 * | bit1 | bit2 | bit3 | bit4
148 * ------------+------+------+------+-------
149 * MMC0 OFF | OFF | ON | ON | X
150 * SDHI1 OFF | ON | X | OFF | ON
151 *
152 * voltage lebel
153 * CN7 : 1.8v
154 * CN12: 3.3v
c8ee3d4b
KM
155 */
156
1b7e0677 157/* MTD */
2b7eda63
MD
158static struct mtd_partition nor_flash_partitions[] = {
159 {
160 .name = "loader",
161 .offset = 0x00000000,
162 .size = 512 * 1024,
163 },
164 {
165 .name = "bootenv",
166 .offset = MTDPART_OFS_APPEND,
167 .size = 512 * 1024,
168 },
169 {
170 .name = "kernel_ro",
171 .offset = MTDPART_OFS_APPEND,
172 .size = 8 * 1024 * 1024,
173 .mask_flags = MTD_WRITEABLE,
174 },
175 {
176 .name = "kernel",
177 .offset = MTDPART_OFS_APPEND,
178 .size = 8 * 1024 * 1024,
179 },
180 {
181 .name = "data",
182 .offset = MTDPART_OFS_APPEND,
183 .size = MTDPART_SIZ_FULL,
184 },
185};
186
187static struct physmap_flash_data nor_flash_data = {
188 .width = 2,
189 .parts = nor_flash_partitions,
190 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
191};
192
193static struct resource nor_flash_resources[] = {
194 [0] = {
195 .start = 0x00000000,
196 .end = 0x08000000 - 1,
197 .flags = IORESOURCE_MEM,
198 }
199};
200
201static struct platform_device nor_flash_device = {
202 .name = "physmap-flash",
203 .dev = {
204 .platform_data = &nor_flash_data,
205 },
206 .num_resources = ARRAY_SIZE(nor_flash_resources),
207 .resource = nor_flash_resources,
208};
209
1b7e0677
KM
210/* SMSC 9220 */
211static struct resource smc911x_resources[] = {
212 {
213 .start = 0x14000000,
214 .end = 0x16000000 - 1,
215 .flags = IORESOURCE_MEM,
216 }, {
33c9607a 217 .start = evt2irq(0x02c0) /* IRQ6A */,
1b7e0677
KM
218 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
219 },
220};
221
222static struct smsc911x_platform_config smsc911x_info = {
223 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
224 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
225 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
226};
227
228static struct platform_device smc911x_device = {
229 .name = "smsc911x",
230 .id = -1,
231 .num_resources = ARRAY_SIZE(smc911x_resources),
232 .resource = smc911x_resources,
233 .dev = {
234 .platform_data = &smsc911x_info,
235 },
236};
2b7eda63 237
c8ee3d4b
KM
238/* SH_MMCIF */
239static struct resource sh_mmcif_resources[] = {
240 [0] = {
241 .name = "SH_MMCIF",
242 .start = 0xE6BD0000,
243 .end = 0xE6BD00FF,
244 .flags = IORESOURCE_MEM,
245 },
246 [1] = {
247 /* MMC ERR */
8d569341 248 .start = evt2irq(0x1ac0),
c8ee3d4b
KM
249 .flags = IORESOURCE_IRQ,
250 },
251 [2] = {
252 /* MMC NOR */
8d569341 253 .start = evt2irq(0x1ae0),
c8ee3d4b
KM
254 .flags = IORESOURCE_IRQ,
255 },
256};
257
bb04e197 258static struct sh_mmcif_plat_data sh_mmcif_plat = {
c8ee3d4b
KM
259 .sup_pclk = 0,
260 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
261 .caps = MMC_CAP_4_BIT_DATA |
262 MMC_CAP_8_BIT_DATA |
263 MMC_CAP_NEEDS_POLL,
264};
265
266static struct platform_device sh_mmcif_device = {
267 .name = "sh_mmcif",
268 .id = 0,
269 .dev = {
270 .dma_mask = NULL,
271 .coherent_dma_mask = 0xffffffff,
272 .platform_data = &sh_mmcif_plat,
273 },
274 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
275 .resource = sh_mmcif_resources,
276};
277
3a14d039 278/* SDHI0 */
69bf6f45 279static struct sh_mobile_sdhi_info sdhi0_info = {
341291a6
GL
280 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
281 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
69bf6f45
GL
282};
283
3a14d039
MD
284static struct resource sdhi0_resources[] = {
285 [0] = {
286 .name = "SDHI0",
287 .start = 0xe6850000,
288 .end = 0xe68501ff,
289 .flags = IORESOURCE_MEM,
290 },
291 [1] = {
33c9607a 292 .start = evt2irq(0x0e00) /* SDHI0 */,
3a14d039
MD
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297static struct platform_device sdhi0_device = {
298 .name = "sh_mobile_sdhi",
299 .num_resources = ARRAY_SIZE(sdhi0_resources),
300 .resource = sdhi0_resources,
301 .id = 0,
69bf6f45
GL
302 .dev = {
303 .platform_data = &sdhi0_info,
304 },
3a14d039
MD
305};
306
341291a6
GL
307/* SDHI1 */
308static struct sh_mobile_sdhi_info sdhi1_info = {
309 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
310 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
311 .tmio_ocr_mask = MMC_VDD_165_195,
410d878b 312 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
341291a6
GL
313};
314
315static struct resource sdhi1_resources[] = {
316 [0] = {
317 .name = "SDHI1",
318 .start = 0xe6860000,
319 .end = 0xe68601ff,
320 .flags = IORESOURCE_MEM,
321 },
322 [1] = {
323 .start = evt2irq(0x0e80),
324 .flags = IORESOURCE_IRQ,
325 },
326};
327
328static struct platform_device sdhi1_device = {
329 .name = "sh_mobile_sdhi",
330 .num_resources = ARRAY_SIZE(sdhi1_resources),
331 .resource = sdhi1_resources,
332 .id = 1,
333 .dev = {
334 .platform_data = &sdhi1_info,
335 },
336};
337
fb54d268 338/* USB1 */
bb04e197 339static void usb1_host_port_power(int port, int power)
fb54d268
KM
340{
341 if (!power) /* only power-on supported for now */
342 return;
343
344 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
345 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
346}
347
348static struct r8a66597_platdata usb1_host_data = {
349 .on_chip = 1,
350 .port_power = usb1_host_port_power,
351};
352
353static struct resource usb1_host_resources[] = {
354 [0] = {
355 .name = "USBHS",
356 .start = 0xE68B0000,
357 .end = 0xE68B00E6 - 1,
358 .flags = IORESOURCE_MEM,
359 },
360 [1] = {
33c9607a 361 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
fb54d268
KM
362 .flags = IORESOURCE_IRQ,
363 },
364};
365
366static struct platform_device usb1_host_device = {
367 .name = "r8a66597_hcd",
368 .id = 1,
369 .dev = {
370 .dma_mask = NULL, /* not use dma */
371 .coherent_dma_mask = 0xffffffff,
372 .platform_data = &usb1_host_data,
373 },
374 .num_resources = ARRAY_SIZE(usb1_host_resources),
375 .resource = usb1_host_resources,
376};
377
9fa1b7fe 378static struct sh_mobile_lcdc_info lcdc_info = {
8eda2f21
GL
379 .ch[0] = {
380 .chan = LCDC_CHAN_MAINLCD,
381 .bpp = 16,
8eda2f21
GL
382 }
383};
384
385static struct resource lcdc_resources[] = {
386 [0] = {
387 .name = "LCDC",
388 .start = 0xfe940000, /* P4-only space */
389 .end = 0xfe943fff,
390 .flags = IORESOURCE_MEM,
391 },
392 [1] = {
393 .start = intcs_evt2irq(0x580),
394 .flags = IORESOURCE_IRQ,
395 },
396};
397
398static struct platform_device lcdc_device = {
399 .name = "sh_mobile_lcdc_fb",
400 .num_resources = ARRAY_SIZE(lcdc_resources),
401 .resource = lcdc_resources,
402 .dev = {
9fa1b7fe 403 .platform_data = &lcdc_info,
8eda2f21
GL
404 .coherent_dma_mask = ~0,
405 },
406};
407
9fa1b7fe
KM
408/*
409 * QHD display
410 */
411#ifdef CONFIG_AP4EVB_QHD
412
413/* KEYSC (Needs SW43 set to ON) */
414static struct sh_keysc_info keysc_info = {
415 .mode = SH_KEYSC_MODE_1,
416 .scan_timing = 3,
417 .delay = 2500,
418 .keycodes = {
419 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
420 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
421 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
422 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
423 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
424 },
425};
426
427static struct resource keysc_resources[] = {
428 [0] = {
429 .name = "KEYSC",
430 .start = 0xe61b0000,
431 .end = 0xe61b0063,
432 .flags = IORESOURCE_MEM,
433 },
434 [1] = {
435 .start = evt2irq(0x0be0), /* KEYSC_KEY */
436 .flags = IORESOURCE_IRQ,
437 },
438};
439
440static struct platform_device keysc_device = {
441 .name = "sh_keysc",
442 .id = 0, /* "keysc0" clock */
443 .num_resources = ARRAY_SIZE(keysc_resources),
444 .resource = keysc_resources,
445 .dev = {
446 .platform_data = &keysc_info,
447 },
448};
449
450/* MIPI-DSI */
8eda2f21
GL
451static struct resource mipidsi0_resources[] = {
452 [0] = {
453 .start = 0xffc60000,
454 .end = 0xffc68fff,
455 .flags = IORESOURCE_MEM,
456 },
457};
458
459static struct sh_mipi_dsi_info mipidsi0_info = {
460 .data_format = MIPI_RGB888,
9fa1b7fe 461 .lcd_chan = &lcdc_info.ch[0],
8eda2f21
GL
462};
463
464static struct platform_device mipidsi0_device = {
465 .name = "sh-mipi-dsi",
466 .num_resources = ARRAY_SIZE(mipidsi0_resources),
467 .resource = mipidsi0_resources,
468 .id = 0,
469 .dev = {
470 .platform_data = &mipidsi0_info,
471 },
472};
473
9fa1b7fe
KM
474/* This function will disappear when we switch to (runtime) PM */
475static int __init ap4evb_init_display_clk(void)
476{
477 struct clk *lcdc_clk;
478 struct clk *dsitx_clk;
479 int ret;
480
481 lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
482 if (IS_ERR(lcdc_clk))
483 return PTR_ERR(lcdc_clk);
484
485 dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
486 if (IS_ERR(dsitx_clk)) {
487 ret = PTR_ERR(dsitx_clk);
488 goto eclkdsitxget;
489 }
490
491 ret = clk_enable(lcdc_clk);
492 if (ret < 0)
493 goto eclklcdcon;
494
495 ret = clk_enable(dsitx_clk);
496 if (ret < 0)
497 goto eclkdsitxon;
498
499 return 0;
500
501eclkdsitxon:
502 clk_disable(lcdc_clk);
503eclklcdcon:
504 clk_put(dsitx_clk);
505eclkdsitxget:
506 clk_put(lcdc_clk);
507
508 return ret;
509}
510device_initcall(ap4evb_init_display_clk);
511
512static struct platform_device *qhd_devices[] __initdata = {
513 &mipidsi0_device,
514 &keysc_device,
515};
516#endif /* CONFIG_AP4EVB_QHD */
517
cb9215e1
KM
518/* FSI */
519#define IRQ_FSI evt2irq(0x1840)
520#define FSIACKCR 0xE6150018
521static void fsiackcr_init(struct clk *clk)
522{
523 u32 status = __raw_readl(clk->enable_reg);
524
525 /* use external clock */
526 status &= ~0x000000ff;
527 status |= 0x00000080;
528 __raw_writel(status, clk->enable_reg);
529}
530
531static struct clk_ops fsiackcr_clk_ops = {
532 .init = fsiackcr_init,
533};
534
535static struct clk fsiackcr_clk = {
536 .ops = &fsiackcr_clk_ops,
537 .enable_reg = (void __iomem *)FSIACKCR,
538 .rate = 0, /* unknown */
539};
540
bb04e197 541static struct sh_fsi_platform_info fsi_info = {
cb9215e1
KM
542 .porta_flags = SH_FSI_BRS_INV |
543 SH_FSI_OUT_SLAVE_MODE |
544 SH_FSI_IN_SLAVE_MODE |
545 SH_FSI_OFMT(PCM) |
546 SH_FSI_IFMT(PCM),
547};
548
549static struct resource fsi_resources[] = {
550 [0] = {
551 .name = "FSI",
552 .start = 0xFE3C0000,
553 .end = 0xFE3C0400 - 1,
554 .flags = IORESOURCE_MEM,
555 },
556 [1] = {
557 .start = IRQ_FSI,
558 .flags = IORESOURCE_IRQ,
559 },
560};
561
562static struct platform_device fsi_device = {
563 .name = "sh_fsi2",
9f6f11b6 564 .id = -1,
cb9215e1
KM
565 .num_resources = ARRAY_SIZE(fsi_resources),
566 .resource = fsi_resources,
567 .dev = {
568 .platform_data = &fsi_info,
569 },
570};
571
dfbcdf64
GL
572static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
573 .clock_source = LCDC_CLK_EXTERNAL,
574 .ch[0] = {
575 .chan = LCDC_CHAN_MAINLCD,
576 .bpp = 16,
577 .interface_type = RGB24,
578 .clock_divider = 1,
579 .flags = LCDC_FLAGS_DWPOL,
580 .lcd_cfg = {
581 .name = "HDMI",
582 /* So far only 720p is supported */
583 .xres = 1280,
584 .yres = 720,
585 /*
586 * If left and right margins are not multiples of 8,
587 * LDHAJR will be adjusted accordingly by the LCDC
588 * driver. Until we start using EDID, these values
589 * might have to be adjusted for different monitors.
590 */
591 .left_margin = 200,
592 .right_margin = 88,
593 .hsync_len = 48,
594 .upper_margin = 20,
595 .lower_margin = 5,
596 .vsync_len = 5,
597 .pixclock = 13468,
598 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
599 },
600 }
601};
602
603static struct resource lcdc1_resources[] = {
604 [0] = {
605 .name = "LCDC1",
606 .start = 0xfe944000,
607 .end = 0xfe947fff,
608 .flags = IORESOURCE_MEM,
609 },
610 [1] = {
611 .start = intcs_evt2irq(0x17a0),
612 .flags = IORESOURCE_IRQ,
613 },
614};
615
616static struct platform_device lcdc1_device = {
617 .name = "sh_mobile_lcdc_fb",
618 .num_resources = ARRAY_SIZE(lcdc1_resources),
619 .resource = lcdc1_resources,
620 .id = 1,
621 .dev = {
622 .platform_data = &sh_mobile_lcdc1_info,
623 .coherent_dma_mask = ~0,
624 },
625};
626
627static struct sh_mobile_hdmi_info hdmi_info = {
628 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
629 .lcd_dev = &lcdc1_device.dev,
630};
631
632static struct resource hdmi_resources[] = {
633 [0] = {
634 .name = "HDMI",
635 .start = 0xe6be0000,
636 .end = 0xe6be00ff,
637 .flags = IORESOURCE_MEM,
638 },
639 [1] = {
640 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
641 .start = evt2irq(0x17e0),
642 .flags = IORESOURCE_IRQ,
643 },
644};
645
646static struct platform_device hdmi_device = {
647 .name = "sh-mobile-hdmi",
648 .num_resources = ARRAY_SIZE(hdmi_resources),
649 .resource = hdmi_resources,
650 .id = -1,
651 .dev = {
652 .platform_data = &hdmi_info,
653 },
654};
655
2863e935
AH
656static struct gpio_led ap4evb_leds[] = {
657 {
658 .name = "led4",
659 .gpio = GPIO_PORT185,
660 .default_state = LEDS_GPIO_DEFSTATE_ON,
661 },
662 {
663 .name = "led2",
664 .gpio = GPIO_PORT186,
665 .default_state = LEDS_GPIO_DEFSTATE_ON,
666 },
667 {
668 .name = "led3",
669 .gpio = GPIO_PORT187,
670 .default_state = LEDS_GPIO_DEFSTATE_ON,
671 },
672 {
673 .name = "led1",
674 .gpio = GPIO_PORT188,
675 .default_state = LEDS_GPIO_DEFSTATE_ON,
676 }
677};
678
679static struct gpio_led_platform_data ap4evb_leds_pdata = {
680 .num_leds = ARRAY_SIZE(ap4evb_leds),
8050fbf2 681 .leds = ap4evb_leds,
2863e935
AH
682};
683
684static struct platform_device leds_device = {
685 .name = "leds-gpio",
686 .id = 0,
687 .dev = {
688 .platform_data = &ap4evb_leds_pdata,
689 },
690};
691
2b7eda63 692static struct platform_device *ap4evb_devices[] __initdata = {
2863e935 693 &leds_device,
2b7eda63 694 &nor_flash_device,
1b7e0677 695 &smc911x_device,
3a14d039 696 &sdhi0_device,
341291a6 697 &sdhi1_device,
fb54d268 698 &usb1_host_device,
cb9215e1 699 &fsi_device,
beccb12f 700 &sh_mmcif_device,
dfbcdf64
GL
701 &lcdc1_device,
702 &lcdc_device,
703 &hdmi_device,
2b7eda63
MD
704};
705
dfbcdf64
GL
706static int __init hdmi_init_pm_clock(void)
707{
708 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
709 int ret;
710 long rate;
711
712 if (IS_ERR(hdmi_ick)) {
713 ret = PTR_ERR(hdmi_ick);
714 pr_err("Cannot get HDMI ICK: %d\n", ret);
715 goto out;
716 }
717
718 ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk);
719 if (ret < 0) {
720 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount);
721 goto out;
722 }
723
724 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk));
725
726 rate = clk_round_rate(&pllc2_clk, 594000000);
727 if (rate < 0) {
728 pr_err("Cannot get suitable rate: %ld\n", rate);
729 ret = rate;
730 goto out;
731 }
732
733 ret = clk_set_rate(&pllc2_clk, rate);
734 if (ret < 0) {
735 pr_err("Cannot set rate %ld: %d\n", rate, ret);
736 goto out;
737 }
738
739 pr_debug("PLLC2 set frequency %lu\n", rate);
740
741 ret = clk_set_parent(hdmi_ick, &pllc2_clk);
742 if (ret < 0) {
743 pr_err("Cannot set HDMI parent: %d\n", ret);
744 goto out;
745 }
746
747out:
748 if (!IS_ERR(hdmi_ick))
749 clk_put(hdmi_ick);
750 return ret;
751}
752
753device_initcall(hdmi_init_pm_clock);
754
71c3ba9a
KM
755/*
756 * FIXME !!
757 *
758 * gpio_no_direction
759 * gpio_pull_up
760 * are quick_hack.
761 *
762 * current gpio frame work doesn't have
763 * the method to control only pull up/down/free.
764 * this function should be replaced by correct gpio function
765 */
766static void __init gpio_no_direction(u32 addr)
767{
768 __raw_writeb(0x00, addr);
769}
770
771static void __init gpio_pull_up(u32 addr)
772{
773 u8 data = __raw_readb(addr);
774
775 data &= 0x0F;
776 data |= 0xC0;
777 __raw_writeb(data, addr);
778}
779
9fa1b7fe 780/* TouchScreen */
33c9607a 781#define IRQ28 evt2irq(0x3380) /* IRQ28A */
9fa1b7fe 782#define IRQ7 evt2irq(0x02e0) /* IRQ7A */
71c3ba9a
KM
783static int ts_get_pendown_state(void)
784{
785 int val1, val2;
786
787 gpio_free(GPIO_FN_IRQ28_123);
788 gpio_free(GPIO_FN_IRQ7_40);
789
790 gpio_request(GPIO_PORT123, NULL);
791 gpio_request(GPIO_PORT40, NULL);
792
793 gpio_direction_input(GPIO_PORT123);
794 gpio_direction_input(GPIO_PORT40);
795
796 val1 = gpio_get_value(GPIO_PORT123);
797 val2 = gpio_get_value(GPIO_PORT40);
798
799 gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */
800 gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */
801
802 return val1 ^ val2;
803}
804
805#define PORT40CR 0xE6051028
806#define PORT123CR 0xE605007B
807static int ts_init(void)
808{
809 gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */
810 gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */
811
812 gpio_pull_up(PORT40CR);
813 gpio_pull_up(PORT123CR);
814
815 return 0;
816}
817
bb04e197 818static struct tsc2007_platform_data tsc2007_info = {
91cf5082
KM
819 .model = 2007,
820 .x_plate_ohms = 180,
71c3ba9a
KM
821 .get_pendown_state = ts_get_pendown_state,
822 .init_platform_hw = ts_init,
91cf5082
KM
823};
824
9fa1b7fe
KM
825static struct i2c_board_info tsc_device = {
826 I2C_BOARD_INFO("tsc2007", 0x48),
827 .type = "tsc2007",
828 .platform_data = &tsc2007_info,
829 /*.irq is selected on ap4evb_init */
830};
831
91cf5082 832/* I2C */
cb9215e1
KM
833static struct i2c_board_info i2c0_devices[] = {
834 {
835 I2C_BOARD_INFO("ak4643", 0x13),
836 },
837};
838
91cf5082 839static struct i2c_board_info i2c1_devices[] = {
8fc883c2
KM
840 {
841 I2C_BOARD_INFO("r2025sd", 0x32),
842 },
91cf5082
KM
843};
844
2b7eda63
MD
845static struct map_desc ap4evb_io_desc[] __initdata = {
846 /* create a 1:1 entity map for 0xe6xxxxxx
847 * used by CPGA, INTC and PFC.
848 */
849 {
850 .virtual = 0xe6000000,
851 .pfn = __phys_to_pfn(0xe6000000),
852 .length = 256 << 20,
853 .type = MT_DEVICE_NONSHARED
854 },
855};
856
857static void __init ap4evb_map_io(void)
858{
859 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
860
495b3cea 861 /* setup early devices and console here as well */
2b7eda63 862 sh7372_add_early_devices();
4ae04acb 863 shmobile_setup_console();
2b7eda63
MD
864}
865
cb9215e1
KM
866#define GPIO_PORT9CR 0xE6051009
867#define GPIO_PORT10CR 0xE605100A
2b7eda63
MD
868static void __init ap4evb_init(void)
869{
dfbcdf64 870 u32 srcr4;
cb9215e1
KM
871 struct clk *clk;
872
1b7e0677
KM
873 sh7372_pinmux_init();
874
b228b48e
KM
875 /* enable SCIFA0 */
876 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
877 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
878
1b7e0677
KM
879 /* enable SMSC911X */
880 gpio_request(GPIO_FN_CS5A, NULL);
881 gpio_request(GPIO_FN_IRQ6_39, NULL);
882
8cb3a2eb
KM
883 /* enable Debug switch (S6) */
884 gpio_request(GPIO_PORT32, NULL);
885 gpio_request(GPIO_PORT33, NULL);
886 gpio_request(GPIO_PORT34, NULL);
887 gpio_request(GPIO_PORT35, NULL);
888 gpio_direction_input(GPIO_PORT32);
889 gpio_direction_input(GPIO_PORT33);
890 gpio_direction_input(GPIO_PORT34);
891 gpio_direction_input(GPIO_PORT35);
892 gpio_export(GPIO_PORT32, 0);
893 gpio_export(GPIO_PORT33, 0);
894 gpio_export(GPIO_PORT34, 0);
895 gpio_export(GPIO_PORT35, 0);
896
3a14d039
MD
897 /* SDHI0 */
898 gpio_request(GPIO_FN_SDHICD0, NULL);
899 gpio_request(GPIO_FN_SDHIWP0, NULL);
900 gpio_request(GPIO_FN_SDHICMD0, NULL);
901 gpio_request(GPIO_FN_SDHICLK0, NULL);
902 gpio_request(GPIO_FN_SDHID0_3, NULL);
903 gpio_request(GPIO_FN_SDHID0_2, NULL);
904 gpio_request(GPIO_FN_SDHID0_1, NULL);
905 gpio_request(GPIO_FN_SDHID0_0, NULL);
906
9fa1b7fe
KM
907 /* SDHI1 */
908 gpio_request(GPIO_FN_SDHICMD1, NULL);
909 gpio_request(GPIO_FN_SDHICLK1, NULL);
910 gpio_request(GPIO_FN_SDHID1_3, NULL);
911 gpio_request(GPIO_FN_SDHID1_2, NULL);
912 gpio_request(GPIO_FN_SDHID1_1, NULL);
913 gpio_request(GPIO_FN_SDHID1_0, NULL);
91cf5082 914
c8ee3d4b
KM
915 /* MMCIF */
916 gpio_request(GPIO_FN_MMCD0_0, NULL);
917 gpio_request(GPIO_FN_MMCD0_1, NULL);
918 gpio_request(GPIO_FN_MMCD0_2, NULL);
919 gpio_request(GPIO_FN_MMCD0_3, NULL);
920 gpio_request(GPIO_FN_MMCD0_4, NULL);
921 gpio_request(GPIO_FN_MMCD0_5, NULL);
922 gpio_request(GPIO_FN_MMCD0_6, NULL);
923 gpio_request(GPIO_FN_MMCD0_7, NULL);
924 gpio_request(GPIO_FN_MMCCMD0, NULL);
925 gpio_request(GPIO_FN_MMCCLK0, NULL);
926
fb54d268
KM
927 /* USB enable */
928 gpio_request(GPIO_FN_VBUS0_1, NULL);
929 gpio_request(GPIO_FN_IDIN_1_18, NULL);
930 gpio_request(GPIO_FN_PWEN_1_115, NULL);
931 gpio_request(GPIO_FN_OVCN_1_114, NULL);
932 gpio_request(GPIO_FN_EXTLP_1, NULL);
933 gpio_request(GPIO_FN_OVCN2_1, NULL);
934
935 /* setup USB phy */
936 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
937
cb9215e1
KM
938 /* enable FSI2 */
939 gpio_request(GPIO_FN_FSIAIBT, NULL);
940 gpio_request(GPIO_FN_FSIAILR, NULL);
941 gpio_request(GPIO_FN_FSIAISLD, NULL);
942 gpio_request(GPIO_FN_FSIAOSLD, NULL);
943 gpio_request(GPIO_PORT161, NULL);
944 gpio_direction_output(GPIO_PORT161, 0); /* slave */
945
946 gpio_request(GPIO_PORT9, NULL);
947 gpio_request(GPIO_PORT10, NULL);
948 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
949 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
950
951 /* set SPU2 clock to 119.6 MHz */
952 clk = clk_get(NULL, "spu_clk");
2ae2b766 953 if (!IS_ERR(clk)) {
cb9215e1
KM
954 clk_set_rate(clk, clk_round_rate(clk, 119600000));
955 clk_put(clk);
956 }
957
958 /* change parent of FSI A */
959 clk = clk_get(NULL, "fsia_clk");
2ae2b766 960 if (!IS_ERR(clk)) {
cb9215e1
KM
961 clk_register(&fsiackcr_clk);
962 clk_set_parent(clk, &fsiackcr_clk);
963 clk_put(clk);
964 }
965
966 /*
967 * set irq priority, to avoid sound chopping
968 * when NFS rootfs is used
969 * FSI(3) > SMSC911X(2)
970 */
971 intc_set_priority(IRQ_FSI, 3);
972
973 i2c_register_board_info(0, i2c0_devices,
974 ARRAY_SIZE(i2c0_devices));
975
976 i2c_register_board_info(1, i2c1_devices,
977 ARRAY_SIZE(i2c1_devices));
978
9fa1b7fe
KM
979#ifdef CONFIG_AP4EVB_QHD
980 /*
981 * QHD
982 */
983
984 /* enable KEYSC */
985 gpio_request(GPIO_FN_KEYOUT0, NULL);
986 gpio_request(GPIO_FN_KEYOUT1, NULL);
987 gpio_request(GPIO_FN_KEYOUT2, NULL);
988 gpio_request(GPIO_FN_KEYOUT3, NULL);
989 gpio_request(GPIO_FN_KEYOUT4, NULL);
990 gpio_request(GPIO_FN_KEYIN0_136, NULL);
991 gpio_request(GPIO_FN_KEYIN1_135, NULL);
992 gpio_request(GPIO_FN_KEYIN2_134, NULL);
993 gpio_request(GPIO_FN_KEYIN3_133, NULL);
994 gpio_request(GPIO_FN_KEYIN4, NULL);
995
996 /* enable TouchScreen */
9fa1b7fe
KM
997 set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
998
999 tsc_device.irq = IRQ28;
1000 i2c_register_board_info(1, &tsc_device, 1);
1001
1002 /* LCDC0 */
1003 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1004 lcdc_info.ch[0].interface_type = RGB24;
1005 lcdc_info.ch[0].clock_divider = 1;
1006 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1007 lcdc_info.ch[0].lcd_cfg.name = "R63302(QHD)";
1008 lcdc_info.ch[0].lcd_cfg.xres = 544;
1009 lcdc_info.ch[0].lcd_cfg.yres = 961;
1010 lcdc_info.ch[0].lcd_cfg.left_margin = 72;
1011 lcdc_info.ch[0].lcd_cfg.right_margin = 600;
1012 lcdc_info.ch[0].lcd_cfg.hsync_len = 16;
1013 lcdc_info.ch[0].lcd_cfg.upper_margin = 8;
1014 lcdc_info.ch[0].lcd_cfg.lower_margin = 8;
1015 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
1016 lcdc_info.ch[0].lcd_cfg.sync = FB_SYNC_VERT_HIGH_ACT |
1017 FB_SYNC_HOR_HIGH_ACT;
1018 lcdc_info.ch[0].lcd_size_cfg.width = 44;
1019 lcdc_info.ch[0].lcd_size_cfg.height = 79;
1020
1021 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1022
1023#else
1024 /*
1025 * WVGA
1026 */
1027 gpio_request(GPIO_FN_LCDD17, NULL);
1028 gpio_request(GPIO_FN_LCDD16, NULL);
1029 gpio_request(GPIO_FN_LCDD15, NULL);
1030 gpio_request(GPIO_FN_LCDD14, NULL);
1031 gpio_request(GPIO_FN_LCDD13, NULL);
1032 gpio_request(GPIO_FN_LCDD12, NULL);
1033 gpio_request(GPIO_FN_LCDD11, NULL);
1034 gpio_request(GPIO_FN_LCDD10, NULL);
1035 gpio_request(GPIO_FN_LCDD9, NULL);
1036 gpio_request(GPIO_FN_LCDD8, NULL);
1037 gpio_request(GPIO_FN_LCDD7, NULL);
1038 gpio_request(GPIO_FN_LCDD6, NULL);
1039 gpio_request(GPIO_FN_LCDD5, NULL);
1040 gpio_request(GPIO_FN_LCDD4, NULL);
1041 gpio_request(GPIO_FN_LCDD3, NULL);
1042 gpio_request(GPIO_FN_LCDD2, NULL);
1043 gpio_request(GPIO_FN_LCDD1, NULL);
1044 gpio_request(GPIO_FN_LCDD0, NULL);
1045 gpio_request(GPIO_FN_LCDDISP, NULL);
1046 gpio_request(GPIO_FN_LCDDCK, NULL);
1047
1048 gpio_request(GPIO_PORT189, NULL); /* backlight */
1049 gpio_direction_output(GPIO_PORT189, 1);
1050
1051 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1052 gpio_direction_output(GPIO_PORT151, 1);
1053
1054 lcdc_info.clock_source = LCDC_CLK_BUS;
1055 lcdc_info.ch[0].interface_type = RGB18;
1056 lcdc_info.ch[0].clock_divider = 2;
1057 lcdc_info.ch[0].flags = 0;
1058 lcdc_info.ch[0].lcd_cfg.name = "WVGA Panel";
1059 lcdc_info.ch[0].lcd_cfg.xres = 800;
1060 lcdc_info.ch[0].lcd_cfg.yres = 480;
1061 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
1062 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
1063 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
1064 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
1065 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
1066 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
1067 lcdc_info.ch[0].lcd_cfg.sync = 0;
1068 lcdc_info.ch[0].lcd_size_cfg.width = 152;
1069 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1070
1071 /* enable TouchScreen */
9fa1b7fe
KM
1072 set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1073
1074 tsc_device.irq = IRQ7;
1075 i2c_register_board_info(0, &tsc_device, 1);
1076#endif /* CONFIG_AP4EVB_QHD */
341291a6 1077
2b7eda63
MD
1078 sh7372_add_standard_devices();
1079
dfbcdf64
GL
1080 /* HDMI */
1081 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1082 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1083
1084 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1085#define SRCR4 0xe61580bc
1086 srcr4 = __raw_readl(SRCR4);
1087 __raw_writel(srcr4 | (1 << 13), SRCR4);
1088 udelay(50);
1089 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1090
2b7eda63
MD
1091 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1092}
1093
495b3cea
MD
1094static void __init ap4evb_timer_init(void)
1095{
1096 sh7372_clock_init();
1097 shmobile_timer.init();
dfbcdf64
GL
1098
1099 /* External clock source */
1100 clk_set_rate(&dv_clki_clk, 27000000);
495b3cea
MD
1101}
1102
1103static struct sys_timer ap4evb_timer = {
1104 .init = ap4evb_timer_init,
1105};
1106
2b7eda63
MD
1107MACHINE_START(AP4EVB, "ap4evb")
1108 .phys_io = 0xe6000000,
1109 .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
1110 .map_io = ap4evb_map_io,
1111 .init_irq = sh7372_init_irq,
1112 .init_machine = ap4evb_init,
495b3cea 1113 .timer = &ap4evb_timer,
2b7eda63 1114MACHINE_END