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1 | /* linux/arch/arm/mach-s5pv310/include/mach/map.h |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * S5PV310 - Memory map definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_MAP_H | |
14 | #define __ASM_ARCH_MAP_H __FILE__ | |
15 | ||
16 | #include <plat/map-base.h> | |
17 | ||
18 | /* | |
19 | * S5PV310 UART offset is 0x10000 but the older S5P SoCs are 0x400. | |
20 | * So need to define it, and here is to avoid redefinition warning. | |
21 | */ | |
22 | #define S3C_UART_OFFSET (0x10000) | |
23 | ||
24 | #include <plat/map-s5p.h> | |
25 | ||
766211e7 CY |
26 | #define S5PV310_PA_SYSRAM (0x02025000) |
27 | ||
2b12b5c4 CY |
28 | #define S5PV310_PA_CHIPID (0x10000000) |
29 | #define S5P_PA_CHIPID S5PV310_PA_CHIPID | |
30 | ||
31 | #define S5PV310_PA_SYSCON (0x10020000) | |
32 | #define S5P_PA_SYSCON S5PV310_PA_SYSCON | |
33 | ||
c598c47d KK |
34 | #define S5PV310_PA_CMU (0x10030000) |
35 | ||
2b12b5c4 CY |
36 | #define S5PV310_PA_WATCHDOG (0x10060000) |
37 | ||
38 | #define S5PV310_PA_COMBINER (0x10448000) | |
39 | ||
40 | #define S5PV310_PA_COREPERI (0x10500000) | |
41 | #define S5PV310_PA_GIC_CPU (0x10500100) | |
42 | #define S5PV310_PA_TWD (0x10500600) | |
43 | #define S5PV310_PA_GIC_DIST (0x10501000) | |
44 | #define S5PV310_PA_L2CC (0x10502000) | |
45 | ||
4d914705 KP |
46 | #define S5PV310_PA_GPIO1 (0x11400000) |
47 | #define S5PV310_PA_GPIO2 (0x11000000) | |
48 | #define S5PV310_PA_GPIO3 (0x03860000) | |
49 | #define S5P_PA_GPIO S5PV310_PA_GPIO1 | |
50 | ||
51 | #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) | |
2b12b5c4 CY |
52 | |
53 | #define S5PV310_PA_UART (0x13800000) | |
54 | ||
55 | #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) | |
56 | #define S5P_PA_UART0 S5P_PA_UART(0) | |
57 | #define S5P_PA_UART1 S5P_PA_UART(1) | |
58 | #define S5P_PA_UART2 S5P_PA_UART(2) | |
59 | #define S5P_PA_UART3 S5P_PA_UART(3) | |
60 | #define S5P_PA_UART4 S5P_PA_UART(4) | |
61 | ||
62 | #define S5P_SZ_UART SZ_256 | |
63 | ||
64 | #define S5PV310_PA_IIC0 (0x13860000) | |
65 | ||
66 | #define S5PV310_PA_TIMER (0x139D0000) | |
67 | #define S5P_PA_TIMER S5PV310_PA_TIMER | |
68 | ||
69 | #define S5PV310_PA_SDRAM (0x40000000) | |
70 | #define S5P_PA_SDRAM S5PV310_PA_SDRAM | |
71 | ||
72 | /* compatibiltiy defines. */ | |
73 | #define S3C_PA_UART S5PV310_PA_UART | |
4d914705 KP |
74 | #define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) |
75 | #define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) | |
76 | #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) | |
77 | #define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3) | |
2b12b5c4 CY |
78 | #define S3C_PA_IIC S5PV310_PA_IIC0 |
79 | #define S3C_PA_WDT S5PV310_PA_WATCHDOG | |
80 | ||
81 | #endif /* __ASM_ARCH_MAP_H */ |