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84bbc16c CY |
1 | /* linux/arch/arm/mach-s5pv310/include/mach/irqs.h |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
d2e7eca3 | 6 | * S5PV310 - IRQ definitions |
84bbc16c CY |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_IRQS_H | |
14 | #define __ASM_ARCH_IRQS_H __FILE__ | |
15 | ||
16 | #include <plat/irqs.h> | |
17 | ||
35fc950b KK |
18 | /* PPI: Private Peripheral Interrupt */ |
19 | ||
84bbc16c CY |
20 | #define IRQ_PPI(x) S5P_IRQ(x+16) |
21 | ||
22 | #define IRQ_LOCALTIMER IRQ_PPI(13) | |
23 | ||
35fc950b KK |
24 | /* SPI: Shared Peripheral Interrupt */ |
25 | ||
84bbc16c CY |
26 | #define IRQ_SPI(x) S5P_IRQ(x+32) |
27 | ||
28 | #define IRQ_EINT0 IRQ_SPI(40) | |
29 | #define IRQ_EINT1 IRQ_SPI(41) | |
30 | #define IRQ_EINT2 IRQ_SPI(42) | |
31 | #define IRQ_EINT3 IRQ_SPI(43) | |
32 | #define IRQ_USB_HSOTG IRQ_SPI(44) | |
33 | #define IRQ_USB_HOST IRQ_SPI(45) | |
34 | #define IRQ_MODEM_IF IRQ_SPI(46) | |
35 | #define IRQ_ROTATOR IRQ_SPI(47) | |
36 | #define IRQ_JPEG IRQ_SPI(48) | |
37 | #define IRQ_2D IRQ_SPI(49) | |
38 | #define IRQ_PCIE IRQ_SPI(50) | |
39 | #define IRQ_SYSTEM_TIMER IRQ_SPI(51) | |
40 | #define IRQ_MFC IRQ_SPI(52) | |
35fc950b | 41 | #define IRQ_WDT IRQ_SPI(53) |
84bbc16c CY |
42 | #define IRQ_AUDIO_SS IRQ_SPI(54) |
43 | #define IRQ_AC97 IRQ_SPI(55) | |
44 | #define IRQ_SPDIF IRQ_SPI(56) | |
45 | #define IRQ_KEYPAD IRQ_SPI(57) | |
46 | #define IRQ_INTFEEDCTRL_SSS IRQ_SPI(58) | |
47 | #define IRQ_SLIMBUS IRQ_SPI(59) | |
48 | #define IRQ_PMU IRQ_SPI(60) | |
49 | #define IRQ_TSI IRQ_SPI(61) | |
50 | #define IRQ_SATA IRQ_SPI(62) | |
51 | #define IRQ_GPS IRQ_SPI(63) | |
52 | ||
53 | #define MAX_IRQ_IN_COMBINER 8 | |
54 | #define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64)) | |
55 | #define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) | |
56 | ||
57 | #define IRQ_TIMER0_VIC COMBINER_IRQ(22, 0) | |
58 | #define IRQ_TIMER1_VIC COMBINER_IRQ(22, 1) | |
59 | #define IRQ_TIMER2_VIC COMBINER_IRQ(22, 2) | |
60 | #define IRQ_TIMER3_VIC COMBINER_IRQ(22, 3) | |
61 | #define IRQ_TIMER4_VIC COMBINER_IRQ(22, 4) | |
62 | ||
cdff6e6f CY |
63 | #define IRQ_RTC_ALARM COMBINER_IRQ(23, 0) |
64 | #define IRQ_RTC_TIC COMBINER_IRQ(23, 1) | |
65 | ||
84bbc16c CY |
66 | #define IRQ_UART0 COMBINER_IRQ(26, 0) |
67 | #define IRQ_UART1 COMBINER_IRQ(26, 1) | |
68 | #define IRQ_UART2 COMBINER_IRQ(26, 2) | |
69 | #define IRQ_UART3 COMBINER_IRQ(26, 3) | |
70 | #define IRQ_UART4 COMBINER_IRQ(26, 4) | |
71 | ||
72 | #define IRQ_IIC COMBINER_IRQ(27, 0) | |
8a3710df KP |
73 | #define IRQ_IIC1 COMBINER_IRQ(27, 1) |
74 | #define IRQ_IIC2 COMBINER_IRQ(27, 2) | |
75 | #define IRQ_IIC3 COMBINER_IRQ(27, 3) | |
76 | #define IRQ_IIC4 COMBINER_IRQ(27, 4) | |
77 | #define IRQ_IIC5 COMBINER_IRQ(27, 5) | |
78 | #define IRQ_IIC6 COMBINER_IRQ(27, 6) | |
79 | #define IRQ_IIC7 COMBINER_IRQ(27, 7) | |
84bbc16c | 80 | |
eda9c023 KK |
81 | #define IRQ_HSMMC0 COMBINER_IRQ(29, 0) |
82 | #define IRQ_HSMMC1 COMBINER_IRQ(29, 1) | |
83 | #define IRQ_HSMMC2 COMBINER_IRQ(29, 2) | |
84 | #define IRQ_HSMMC3 COMBINER_IRQ(29, 3) | |
85 | ||
13904fba KK |
86 | #define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0) |
87 | ||
40c9bc5c JH |
88 | #define IRQ_EINT4 COMBINER_IRQ(37, 0) |
89 | #define IRQ_EINT5 COMBINER_IRQ(37, 1) | |
90 | #define IRQ_EINT6 COMBINER_IRQ(37, 2) | |
91 | #define IRQ_EINT7 COMBINER_IRQ(37, 3) | |
92 | #define IRQ_EINT8 COMBINER_IRQ(38, 0) | |
93 | ||
94 | #define IRQ_EINT9 COMBINER_IRQ(38, 1) | |
95 | #define IRQ_EINT10 COMBINER_IRQ(38, 2) | |
96 | #define IRQ_EINT11 COMBINER_IRQ(38, 3) | |
97 | #define IRQ_EINT12 COMBINER_IRQ(38, 4) | |
98 | #define IRQ_EINT13 COMBINER_IRQ(38, 5) | |
99 | #define IRQ_EINT14 COMBINER_IRQ(38, 6) | |
100 | #define IRQ_EINT15 COMBINER_IRQ(38, 7) | |
101 | ||
102 | #define IRQ_EINT16_31 COMBINER_IRQ(39, 0) | |
103 | ||
d2e7eca3 | 104 | #define MAX_COMBINER_NR 40 |
35fc950b | 105 | |
d2e7eca3 | 106 | #define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0) |
84bbc16c | 107 | |
d2e7eca3 JL |
108 | #define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE + 0) |
109 | #define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE + 16) | |
110 | ||
111 | /* Set the default NR_IRQS */ | |
112 | ||
113 | #define NR_IRQS (S5P_IRQ_EINT_BASE + 32) | |
84bbc16c | 114 | |
35fc950b | 115 | #endif /* __ASM_ARCH_IRQS_H */ |