[net-next-2.6.git] / arch / arm / mach-s5pc100 / include / mach / gpio.h

/* arch/arm/mach-s5pc100/include/mach/gpio.h
 *
 * Copyright 2009 Samsung Electronics Co.
 *	Byungho Min <bhmin@samsung.com>
 *
 * S5PC100 - GPIO lib support
 *
 * Base on mach-s3c6400/include/mach/gpio.h
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H __FILE__

#define gpio_get_value	__gpio_get_value
#define gpio_set_value	__gpio_set_value
#define gpio_cansleep	__gpio_cansleep
#define gpio_to_irq	__gpio_to_irq

/* GPIO bank sizes */
#define S5PC100_GPIO_A0_NR	(8)
#define S5PC100_GPIO_A1_NR	(5)
#define S5PC100_GPIO_B_NR	(8)
#define S5PC100_GPIO_C_NR	(5)
#define S5PC100_GPIO_D_NR	(7)
#define S5PC100_GPIO_E0_NR	(8)
#define S5PC100_GPIO_E1_NR	(6)
#define S5PC100_GPIO_F0_NR	(8)
#define S5PC100_GPIO_F1_NR	(8)
#define S5PC100_GPIO_F2_NR	(8)
#define S5PC100_GPIO_F3_NR	(4)
#define S5PC100_GPIO_G0_NR	(8)
#define S5PC100_GPIO_G1_NR	(3)
#define S5PC100_GPIO_G2_NR	(7)
#define S5PC100_GPIO_G3_NR	(7)
#define S5PC100_GPIO_H0_NR	(8)
#define S5PC100_GPIO_H1_NR	(8)
#define S5PC100_GPIO_H2_NR	(8)
#define S5PC100_GPIO_H3_NR	(8)
#define S5PC100_GPIO_I_NR	(8)
#define S5PC100_GPIO_J0_NR	(8)
#define S5PC100_GPIO_J1_NR	(5)
#define S5PC100_GPIO_J2_NR	(8)
#define S5PC100_GPIO_J3_NR	(8)
#define S5PC100_GPIO_J4_NR	(4)
#define S5PC100_GPIO_K0_NR	(8)
#define S5PC100_GPIO_K1_NR	(6)
#define S5PC100_GPIO_K2_NR	(8)
#define S5PC100_GPIO_K3_NR	(8)
#define S5PC100_GPIO_L0_NR	(8)
#define S5PC100_GPIO_L1_NR	(8)
#define S5PC100_GPIO_L2_NR	(8)
#define S5PC100_GPIO_L3_NR	(8)
#define S5PC100_GPIO_L4_NR	(8)

/* GPIO bank numbes */

/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
 * space for debugging purposes so that any accidental
 * change from one gpio bank to another can be caught.
*/

#define S5PC100_GPIO_NEXT(__gpio) \
	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)

enum s5p_gpio_number {
	S5PC100_GPIO_A0_START	= 0,
	S5PC100_GPIO_A1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_A0),
	S5PC100_GPIO_B_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_A1),
	S5PC100_GPIO_C_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_B),
	S5PC100_GPIO_D_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_C),
	S5PC100_GPIO_E0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_D),
	S5PC100_GPIO_E1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_E0),
	S5PC100_GPIO_F0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_E1),
	S5PC100_GPIO_F1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F0),
	S5PC100_GPIO_F2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F1),
	S5PC100_GPIO_F3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F2),
	S5PC100_GPIO_G0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_F3),
	S5PC100_GPIO_G1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G0),
	S5PC100_GPIO_G2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G1),
	S5PC100_GPIO_G3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G2),
	S5PC100_GPIO_H0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_G3),
	S5PC100_GPIO_H1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H0),
	S5PC100_GPIO_H2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H1),
	S5PC100_GPIO_H3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H2),
	S5PC100_GPIO_I_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_H3),
	S5PC100_GPIO_J0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_I),
	S5PC100_GPIO_J1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J0),
	S5PC100_GPIO_J2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J1),
	S5PC100_GPIO_J3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J2),
	S5PC100_GPIO_J4_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J3),
	S5PC100_GPIO_K0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_J4),
	S5PC100_GPIO_K1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K0),
	S5PC100_GPIO_K2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K1),
	S5PC100_GPIO_K3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K2),
	S5PC100_GPIO_L0_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_K3),
	S5PC100_GPIO_L1_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L0),
	S5PC100_GPIO_L2_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L1),
	S5PC100_GPIO_L3_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L2),
	S5PC100_GPIO_L4_START	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L3),
	S5PC100_GPIO_END	= S5PC100_GPIO_NEXT(S5PC100_GPIO_L4),
};

/* S5PC100 GPIO number definitions. */
#define S5PC100_GPA0(_nr)	(S5PC100_GPIO_A0_START + (_nr))
#define S5PC100_GPA1(_nr)	(S5PC100_GPIO_A1_START + (_nr))
#define S5PC100_GPB(_nr)	(S5PC100_GPIO_B_START + (_nr))
#define S5PC100_GPC(_nr)	(S5PC100_GPIO_C_START + (_nr))
#define S5PC100_GPD(_nr)	(S5PC100_GPIO_D_START + (_nr))
#define S5PC100_GPE0(_nr)	(S5PC100_GPIO_E0_START + (_nr))
#define S5PC100_GPE1(_nr)	(S5PC100_GPIO_E1_START + (_nr))
#define S5PC100_GPF0(_nr)	(S5PC100_GPIO_F0_START + (_nr))
#define S5PC100_GPF1(_nr)	(S5PC100_GPIO_F1_START + (_nr))
#define S5PC100_GPF2(_nr)	(S5PC100_GPIO_F2_START + (_nr))
#define S5PC100_GPF3(_nr)	(S5PC100_GPIO_F3_START + (_nr))
#define S5PC100_GPG0(_nr)	(S5PC100_GPIO_G0_START + (_nr))
#define S5PC100_GPG1(_nr)	(S5PC100_GPIO_G1_START + (_nr))
#define S5PC100_GPG2(_nr)	(S5PC100_GPIO_G2_START + (_nr))
#define S5PC100_GPG3(_nr)	(S5PC100_GPIO_G3_START + (_nr))
#define S5PC100_GPH0(_nr)	(S5PC100_GPIO_H0_START + (_nr))
#define S5PC100_GPH1(_nr)	(S5PC100_GPIO_H1_START + (_nr))
#define S5PC100_GPH2(_nr)	(S5PC100_GPIO_H2_START + (_nr))
#define S5PC100_GPH3(_nr)	(S5PC100_GPIO_H3_START + (_nr))
#define S5PC100_GPI(_nr)	(S5PC100_GPIO_I_START + (_nr))
#define S5PC100_GPJ0(_nr)	(S5PC100_GPIO_J0_START + (_nr))
#define S5PC100_GPJ1(_nr)	(S5PC100_GPIO_J1_START + (_nr))
#define S5PC100_GPJ2(_nr)	(S5PC100_GPIO_J2_START + (_nr))
#define S5PC100_GPJ3(_nr)	(S5PC100_GPIO_J3_START + (_nr))
#define S5PC100_GPJ4(_nr)	(S5PC100_GPIO_J4_START + (_nr))
#define S5PC100_GPK0(_nr)	(S5PC100_GPIO_K0_START + (_nr))
#define S5PC100_GPK1(_nr)	(S5PC100_GPIO_K1_START + (_nr))
#define S5PC100_GPK2(_nr)	(S5PC100_GPIO_K2_START + (_nr))
#define S5PC100_GPK3(_nr)	(S5PC100_GPIO_K3_START + (_nr))
#define S5PC100_GPL0(_nr)	(S5PC100_GPIO_L0_START + (_nr))
#define S5PC100_GPL1(_nr)	(S5PC100_GPIO_L1_START + (_nr))
#define S5PC100_GPL2(_nr)	(S5PC100_GPIO_L2_START + (_nr))
#define S5PC100_GPL3(_nr)	(S5PC100_GPIO_L3_START + (_nr))
#define S5PC100_GPL4(_nr)	(S5PC100_GPIO_L4_START + (_nr))

/* It used the end of the S5PC100 gpios */
#define S3C_GPIO_END		S5PC100_GPIO_END

/* define the number of gpios we need to the one after the MP04() range */
#define ARCH_NR_GPIOS		(S5PC100_GPIO_END + 1)

#include <asm-generic/gpio.h>

#endif /* __ASM_ARCH_GPIO_H */
Commit	Line	Data
0164cbf4 BM	1	/* arch/arm/mach-s5pc100/include/mach/gpio.h
	2	*
	3	* Copyright 2009 Samsung Electronics Co.
	4	* Byungho Min <bhmin@samsung.com>
	5	*
	6	* S5PC100 - GPIO lib support
	7	*
	8	* Base on mach-s3c6400/include/mach/gpio.h
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
c8bb9635 MS	15	#ifndef __ASM_ARCH_GPIO_H
	16	#define __ASM_ARCH_GPIO_H __FILE__
	17
0164cbf4 BM	18	#define gpio_get_value __gpio_get_value
	19	#define gpio_set_value __gpio_set_value
	20	#define gpio_cansleep __gpio_cansleep
	21	#define gpio_to_irq __gpio_to_irq
	22
	23	/* GPIO bank sizes */
d7b9ace5 KP	24	#define S5PC100_GPIO_A0_NR (8)
	25	#define S5PC100_GPIO_A1_NR (5)
	26	#define S5PC100_GPIO_B_NR (8)
	27	#define S5PC100_GPIO_C_NR (5)
	28	#define S5PC100_GPIO_D_NR (7)
	29	#define S5PC100_GPIO_E0_NR (8)
	30	#define S5PC100_GPIO_E1_NR (6)
	31	#define S5PC100_GPIO_F0_NR (8)
	32	#define S5PC100_GPIO_F1_NR (8)
	33	#define S5PC100_GPIO_F2_NR (8)
	34	#define S5PC100_GPIO_F3_NR (4)
	35	#define S5PC100_GPIO_G0_NR (8)
	36	#define S5PC100_GPIO_G1_NR (3)
	37	#define S5PC100_GPIO_G2_NR (7)
	38	#define S5PC100_GPIO_G3_NR (7)
	39	#define S5PC100_GPIO_H0_NR (8)
	40	#define S5PC100_GPIO_H1_NR (8)
	41	#define S5PC100_GPIO_H2_NR (8)
	42	#define S5PC100_GPIO_H3_NR (8)
	43	#define S5PC100_GPIO_I_NR (8)
	44	#define S5PC100_GPIO_J0_NR (8)
	45	#define S5PC100_GPIO_J1_NR (5)
	46	#define S5PC100_GPIO_J2_NR (8)
	47	#define S5PC100_GPIO_J3_NR (8)
	48	#define S5PC100_GPIO_J4_NR (4)
	49	#define S5PC100_GPIO_K0_NR (8)
	50	#define S5PC100_GPIO_K1_NR (6)
	51	#define S5PC100_GPIO_K2_NR (8)
	52	#define S5PC100_GPIO_K3_NR (8)
	53	#define S5PC100_GPIO_L0_NR (8)
	54	#define S5PC100_GPIO_L1_NR (8)
	55	#define S5PC100_GPIO_L2_NR (8)
	56	#define S5PC100_GPIO_L3_NR (8)
	57	#define S5PC100_GPIO_L4_NR (8)
0164cbf4 BM	58
	59	/* GPIO bank numbes */
	60
	61	/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
	62	* space for debugging purposes so that any accidental
	63	* change from one gpio bank to another can be caught.
	64	*/
	65
c8bb9635	66	#define S5PC100_GPIO_NEXT(__gpio) \
0164cbf4 BM	67	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
0164cbf4 BM	68
c8bb9635	69	enum s5p_gpio_number {
d7b9ace5	70	S5PC100_GPIO_A0_START = 0,
c8bb9635 MS	71	S5PC100_GPIO_A1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A0),
	72	S5PC100_GPIO_B_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A1),
	73	S5PC100_GPIO_C_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_B),
	74	S5PC100_GPIO_D_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_C),
	75	S5PC100_GPIO_E0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_D),
	76	S5PC100_GPIO_E1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E0),
	77	S5PC100_GPIO_F0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E1),
	78	S5PC100_GPIO_F1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F0),
	79	S5PC100_GPIO_F2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F1),
	80	S5PC100_GPIO_F3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F2),
	81	S5PC100_GPIO_G0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F3),
	82	S5PC100_GPIO_G1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G0),
	83	S5PC100_GPIO_G2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G1),
	84	S5PC100_GPIO_G3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G2),
	85	S5PC100_GPIO_H0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G3),
	86	S5PC100_GPIO_H1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H0),
	87	S5PC100_GPIO_H2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H1),
	88	S5PC100_GPIO_H3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H2),
	89	S5PC100_GPIO_I_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H3),
	90	S5PC100_GPIO_J0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_I),
	91	S5PC100_GPIO_J1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J0),
	92	S5PC100_GPIO_J2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J1),
	93	S5PC100_GPIO_J3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J2),
	94	S5PC100_GPIO_J4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J3),
	95	S5PC100_GPIO_K0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J4),
	96	S5PC100_GPIO_K1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K0),
	97	S5PC100_GPIO_K2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K1),
	98	S5PC100_GPIO_K3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K2),
	99	S5PC100_GPIO_L0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K3),
	100	S5PC100_GPIO_L1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L0),
	101	S5PC100_GPIO_L2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L1),
	102	S5PC100_GPIO_L3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L2),
	103	S5PC100_GPIO_L4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L3),
	104	S5PC100_GPIO_END = S5PC100_GPIO_NEXT(S5PC100_GPIO_L4),
0164cbf4 BM	105	};
0164cbf4 BM	106
d7b9ace5 KP	107	/* S5PC100 GPIO number definitions. */
	108	#define S5PC100_GPA0(_nr) (S5PC100_GPIO_A0_START + (_nr))
	109	#define S5PC100_GPA1(_nr) (S5PC100_GPIO_A1_START + (_nr))
	110	#define S5PC100_GPB(_nr) (S5PC100_GPIO_B_START + (_nr))
	111	#define S5PC100_GPC(_nr) (S5PC100_GPIO_C_START + (_nr))
	112	#define S5PC100_GPD(_nr) (S5PC100_GPIO_D_START + (_nr))
	113	#define S5PC100_GPE0(_nr) (S5PC100_GPIO_E0_START + (_nr))
	114	#define S5PC100_GPE1(_nr) (S5PC100_GPIO_E1_START + (_nr))
	115	#define S5PC100_GPF0(_nr) (S5PC100_GPIO_F0_START + (_nr))
	116	#define S5PC100_GPF1(_nr) (S5PC100_GPIO_F1_START + (_nr))
	117	#define S5PC100_GPF2(_nr) (S5PC100_GPIO_F2_START + (_nr))
	118	#define S5PC100_GPF3(_nr) (S5PC100_GPIO_F3_START + (_nr))
	119	#define S5PC100_GPG0(_nr) (S5PC100_GPIO_G0_START + (_nr))
	120	#define S5PC100_GPG1(_nr) (S5PC100_GPIO_G1_START + (_nr))
	121	#define S5PC100_GPG2(_nr) (S5PC100_GPIO_G2_START + (_nr))
	122	#define S5PC100_GPG3(_nr) (S5PC100_GPIO_G3_START + (_nr))
	123	#define S5PC100_GPH0(_nr) (S5PC100_GPIO_H0_START + (_nr))
	124	#define S5PC100_GPH1(_nr) (S5PC100_GPIO_H1_START + (_nr))
	125	#define S5PC100_GPH2(_nr) (S5PC100_GPIO_H2_START + (_nr))
	126	#define S5PC100_GPH3(_nr) (S5PC100_GPIO_H3_START + (_nr))
	127	#define S5PC100_GPI(_nr) (S5PC100_GPIO_I_START + (_nr))
	128	#define S5PC100_GPJ0(_nr) (S5PC100_GPIO_J0_START + (_nr))
	129	#define S5PC100_GPJ1(_nr) (S5PC100_GPIO_J1_START + (_nr))
	130	#define S5PC100_GPJ2(_nr) (S5PC100_GPIO_J2_START + (_nr))
	131	#define S5PC100_GPJ3(_nr) (S5PC100_GPIO_J3_START + (_nr))
	132	#define S5PC100_GPJ4(_nr) (S5PC100_GPIO_J4_START + (_nr))
	133	#define S5PC100_GPK0(_nr) (S5PC100_GPIO_K0_START + (_nr))
	134	#define S5PC100_GPK1(_nr) (S5PC100_GPIO_K1_START + (_nr))
	135	#define S5PC100_GPK2(_nr) (S5PC100_GPIO_K2_START + (_nr))
	136	#define S5PC100_GPK3(_nr) (S5PC100_GPIO_K3_START + (_nr))
	137	#define S5PC100_GPL0(_nr) (S5PC100_GPIO_L0_START + (_nr))
	138	#define S5PC100_GPL1(_nr) (S5PC100_GPIO_L1_START + (_nr))
	139	#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr))
	140	#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr))
	141	#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr))
0164cbf4	142
c8bb9635	143	/* It used the end of the S5PC100 gpios */
d7b9ace5	144	#define S3C_GPIO_END S5PC100_GPIO_END
0164cbf4 BM	145
0164cbf4 BM	146	/* define the number of gpios we need to the one after the MP04() range */
d7b9ace5	147	#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1)
0164cbf4 BM	148
0164cbf4 BM	149	#include <asm-generic/gpio.h>
c8bb9635 MS	150
c8bb9635 MS	151	#endif /* __ASM_ARCH_GPIO_H */