git://bbs.cooldavid.org / net-next-2.6.git / blame
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1 | /* linux/arch/arm/mach-s3c2443/s3c2443.c |
| 2 | * | |
| 3 | * Copyright (c) 2007 Simtec Electronics | |
| 4 | * Ben Dooks <ben@simtec.co.uk> | |
| 5 | * | |
| 6 | * Samsung S3C2443 Mobile CPU support | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #include <linux/kernel.h> | |
| 14 | #include <linux/types.h> | |
| 15 | #include <linux/interrupt.h> | |
| 16 | #include <linux/list.h> | |
| 17 | #include <linux/timer.h> | |
| 18 | #include <linux/init.h> | |
| 19 | #include <linux/platform_device.h> | |
| 20 | #include <linux/serial_core.h> | |
| 21 | #include <linux/sysdev.h> | |
| 22 | #include <linux/clk.h> | |
| fced80c7 | 23 | #include <linux/io.h> |
| e4d06e39 BD |
24 | |
| 25 | #include <asm/mach/arch.h> | |
| 26 | #include <asm/mach/map.h> | |
| 27 | #include <asm/mach/irq.h> | |
| 28 | ||
| a09e64fb | 29 | #include <mach/hardware.h> |
| e4d06e39 BD |
30 | #include <asm/irq.h> |
| 31 | ||
| a09e64fb RK |
32 | #include <mach/regs-s3c2443-clock.h> |
| 33 | #include <mach/reset.h> | |
| e4d06e39 | 34 | |
| a2b7ba9c BD |
35 | #include <plat/s3c2443.h> |
| 36 | #include <plat/devs.h> | |
| 37 | #include <plat/cpu.h> | |
| eb42b044 | 38 | #include <plat/fb-core.h> |
| ef3f2dd4 | 39 | #include <plat/nand-core.h> |
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40 | |
| 41 | static struct map_desc s3c2443_iodesc[] __initdata = { | |
| 42 | IODESC_ENT(WATCHDOG), | |
| 43 | IODESC_ENT(CLKPWR), | |
| 44 | IODESC_ENT(TIMER), | |
| 45 | }; | |
| 46 | ||
| 47 | struct sysdev_class s3c2443_sysclass = { | |
| af5ca3f4 | 48 | .name = "s3c2443-core", |
| e4d06e39 BD |
49 | }; |
| 50 | ||
| 51 | static struct sys_device s3c2443_sysdev = { | |
| 52 | .cls = &s3c2443_sysclass, | |
| 53 | }; | |
| 54 | ||
| b4f14eb8 BD |
55 | static void s3c2443_hard_reset(void) |
| 56 | { | |
| 57 | __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); | |
| 58 | } | |
| 59 | ||
| e4d06e39 BD |
60 | int __init s3c2443_init(void) |
| 61 | { | |
| 62 | printk("S3C2443: Initialising architecture\n"); | |
| 63 | ||
| b4f14eb8 BD |
64 | s3c24xx_reset_hook = s3c2443_hard_reset; |
| 65 | ||
| ef3f2dd4 | 66 | s3c_nand_setname("s3c2412-nand"); |
| eb42b044 | 67 | s3c_fb_setname("s3c2443-fb"); |
| d9c0ebbd | 68 | |
| 7e966f3c BD |
69 | /* change WDT IRQ number */ |
| 70 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | |
| 71 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; | |
| 72 | ||
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73 | return sysdev_register(&s3c2443_sysdev); |
| 74 | } | |
| 75 | ||
| 76 | void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
| 77 | { | |
| 78 | s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); | |
| 79 | } | |
| 80 | ||
| 81 | /* s3c2443_map_io | |
| 82 | * | |
| 83 | * register the standard cpu IO areas, and any passed in from the | |
| 84 | * machine specific initialisation. | |
| 85 | */ | |
| 86 | ||
| 74b265d4 | 87 | void __init s3c2443_map_io(void) |
| e4d06e39 BD |
88 | { |
| 89 | iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); | |
| e4d06e39 BD |
90 | } |
| 91 | ||
| 92 | /* need to register class before we actually register the device, and | |
| 93 | * we also need to ensure that it has been initialised before any of the | |
| 94 | * drivers even try to use it (even if not on an s3c2443 based system) | |
| 95 | * as a driver which may support both 2443 and 2440 may try and use it. | |
| 96 | */ | |
| 97 | ||
| 98 | static int __init s3c2443_core_init(void) | |
| 99 | { | |
| 100 | return sysdev_class_register(&s3c2443_sysclass); | |
| 101 | } | |
| 102 | ||
| 103 | core_initcall(s3c2443_core_init); |