[net-next-2.6.git] / arch / arm / mach-s3c2410 / mach-h1940.c

/* linux/arch/arm/mach-s3c2410/mach-h1940.c
 *
 * Copyright (c) 2003-2005 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
 * http://www.handhelds.org/projects/h1940.html
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/platform_device.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <asm/hardware.h>
#include <asm/hardware/iomd.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>


#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-lcd.h>

#include <asm/arch/h1940.h>
#include <asm/arch/h1940-latch.h>
#include <asm/arch/fb.h>

#include <linux/serial_core.h>

#include "clock.h"
#include "devs.h"
#include "cpu.h"
#include "pm.h"

static struct map_desc h1940_iodesc[] __initdata = {
	[0] = {
		.virtual	= (unsigned long)H1940_LATCH,
		.pfn		= __phys_to_pfn(H1940_PA_LATCH),
		.length		= SZ_16K,
		.type		= MT_DEVICE
	},
};

#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE

static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = 0x3c5,
		.ulcon	     = 0x03,
		.ufcon	     = 0x51,
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = 0x245,
		.ulcon	     = 0x03,
		.ufcon	     = 0x00,
	},
	/* IR port */
	[2] = {
		.hwport	     = 2,
		.flags	     = 0,
		.uart_flags  = UPF_CONS_FLOW,
		.ucon	     = 0x3c5,
		.ulcon	     = 0x43,
		.ufcon	     = 0x51,
	}
};

/* Board control latch control */

static unsigned int latch_state = H1940_LATCH_DEFAULT;

void h1940_latch_control(unsigned int clear, unsigned int set)
{
	unsigned long flags;

	local_irq_save(flags);

	latch_state &= ~clear;
	latch_state |= set;

	__raw_writel(latch_state, H1940_LATCH);

	local_irq_restore(flags);
}

EXPORT_SYMBOL_GPL(h1940_latch_control);


/**
 * Set lcd on or off
 **/
static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = {
	.fixed_syncs=		1,
	.regs={
		.lcdcon1=	S3C2410_LCDCON1_TFT16BPP | \
				S3C2410_LCDCON1_TFT | \
				S3C2410_LCDCON1_CLKVAL(0x0C),

		.lcdcon2=	S3C2410_LCDCON2_VBPD(7) | \
				S3C2410_LCDCON2_LINEVAL(319) | \
				S3C2410_LCDCON2_VFPD(6) | \
				S3C2410_LCDCON2_VSPW(0),

		.lcdcon3=	S3C2410_LCDCON3_HBPD(19) | \
				S3C2410_LCDCON3_HOZVAL(239) | \
				S3C2410_LCDCON3_HFPD(7),

		.lcdcon4=	S3C2410_LCDCON4_MVAL(0) | \
				S3C2410_LCDCON4_HSPW(3),

		.lcdcon5=	S3C2410_LCDCON5_FRM565 | \
				S3C2410_LCDCON5_INVVLINE | \
				S3C2410_LCDCON5_HWSWP,
	},
	.lpcsel=	0x02,
	.gpccon=	0xaa940659,
	.gpccon_mask=	0xffffffff,
	.gpcup=		0x0000ffff,
	.gpcup_mask=	0xffffffff,
	.gpdcon=	0xaa84aaa0,
	.gpdcon_mask=	0xffffffff,
	.gpdup=		0x0000faff,
	.gpdup_mask=	0xffffffff,

	.width=		240,
	.height=	320,
	.xres=		{240,240,240},
	.yres=		{320,320,320},
	.bpp=		{16,16,16},
};

static struct platform_device *h1940_devices[] __initdata = {
	&s3c_device_usb,
	&s3c_device_lcd,
	&s3c_device_wdt,
	&s3c_device_i2c,
	&s3c_device_iis,
};

static struct s3c24xx_board h1940_board __initdata = {
	.devices       = h1940_devices,
	.devices_count = ARRAY_SIZE(h1940_devices)
};

static void __init h1940_map_io(void)
{
	s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
	s3c24xx_init_clocks(0);
	s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
	s3c24xx_set_board(&h1940_board);

	/* setup PM */

	memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
	s3c2410_pm_init();
}

static void __init h1940_init_irq(void)
{
	s3c24xx_init_irq();
}

static void __init h1940_init(void)
{
	s3c24xx_fb_set_platdata(&h1940_lcdcfg);
}

MACHINE_START(H1940, "IPAQ-H1940")
	/* Maintainer: Ben Dooks <ben@fluff.org> */
	.phys_io	= S3C2410_PA_UART,
	.io_pg_offst	= (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
	.boot_params	= S3C2410_SDRAM_PA + 0x100,
	.map_io		= h1940_map_io,
	.init_irq	= h1940_init_irq,
	.init_machine   = h1940_init,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
1da177e4 LT	1	/* linux/arch/arm/mach-s3c2410/mach-h1940.c
	2	*
	3	* Copyright (c) 2003-2005 Simtec Electronics
	4	* Ben Dooks <ben@simtec.co.uk>
	5	*
	6	* http://www.handhelds.org/projects/h1940.html
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
1da177e4 LT	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/types.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/list.h>
	18	#include <linux/timer.h>
	19	#include <linux/init.h>
d052d1be	20	#include <linux/platform_device.h>
1da177e4 LT	21
	22	#include <asm/mach/arch.h>
	23	#include <asm/mach/map.h>
	24	#include <asm/mach/irq.h>
	25
	26	#include <asm/hardware.h>
	27	#include <asm/hardware/iomd.h>
	28	#include <asm/io.h>
	29	#include <asm/irq.h>
	30	#include <asm/mach-types.h>
	31
e1981680	32
1da177e4	33	#include <asm/arch/regs-serial.h>
f92273c1 AP	34	#include <asm/arch/regs-lcd.h>
f92273c1 AP	35
9073341c	36	#include <asm/arch/h1940.h>
e1981680	37	#include <asm/arch/h1940-latch.h>
f92273c1	38	#include <asm/arch/fb.h>
1da177e4 LT	39
	40	#include <linux/serial_core.h>
	41
	42	#include "clock.h"
	43	#include "devs.h"
	44	#include "cpu.h"
9073341c	45	#include "pm.h"
1da177e4 LT	46
1da177e4 LT	47	static struct map_desc h1940_iodesc[] __initdata = {
e1981680 BD	48	[0] = {
	49	.virtual = (unsigned long)H1940_LATCH,
	50	.pfn = __phys_to_pfn(H1940_PA_LATCH),
	51	.length = SZ_16K,
	52	.type = MT_DEVICE
	53	},
1da177e4 LT	54	};
	55
	56	#define UCON S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK
	57	#define ULCON S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB
	58	#define UFCON S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE
	59
66a9b49a	60	static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
1da177e4 LT	61	[0] = {
	62	.hwport = 0,
	63	.flags = 0,
	64	.ucon = 0x3c5,
	65	.ulcon = 0x03,
	66	.ufcon = 0x51,
	67	},
	68	[1] = {
	69	.hwport = 1,
	70	.flags = 0,
	71	.ucon = 0x245,
	72	.ulcon = 0x03,
	73	.ufcon = 0x00,
	74	},
	75	/* IR port */
	76	[2] = {
	77	.hwport = 2,
	78	.flags = 0,
	79	.uart_flags = UPF_CONS_FLOW,
	80	.ucon = 0x3c5,
	81	.ulcon = 0x43,
	82	.ufcon = 0x51,
	83	}
	84	};
	85
e1981680 BD	86	/* Board control latch control */
	87
	88	static unsigned int latch_state = H1940_LATCH_DEFAULT;
	89
	90	void h1940_latch_control(unsigned int clear, unsigned int set)
	91	{
	92	unsigned long flags;
	93
	94	local_irq_save(flags);
	95
	96	latch_state &= ~clear;
	97	latch_state \|= set;
	98
	99	__raw_writel(latch_state, H1940_LATCH);
	100
	101	local_irq_restore(flags);
	102	}
	103
	104	EXPORT_SYMBOL_GPL(h1940_latch_control);
1da177e4 LT	105
1da177e4 LT	106
f92273c1 AP	107	/**
	108	* Set lcd on or off
	109	**/
	110	static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = {
	111	.fixed_syncs= 1,
	112	.regs={
	113	.lcdcon1= S3C2410_LCDCON1_TFT16BPP \| \
	114	S3C2410_LCDCON1_TFT \| \
	115	S3C2410_LCDCON1_CLKVAL(0x0C),
	116
	117	.lcdcon2= S3C2410_LCDCON2_VBPD(7) \| \
	118	S3C2410_LCDCON2_LINEVAL(319) \| \
	119	S3C2410_LCDCON2_VFPD(6) \| \
	120	S3C2410_LCDCON2_VSPW(0),
	121
	122	.lcdcon3= S3C2410_LCDCON3_HBPD(19) \| \
	123	S3C2410_LCDCON3_HOZVAL(239) \| \
	124	S3C2410_LCDCON3_HFPD(7),
	125
	126	.lcdcon4= S3C2410_LCDCON4_MVAL(0) \| \
	127	S3C2410_LCDCON4_HSPW(3),
	128
	129	.lcdcon5= S3C2410_LCDCON5_FRM565 \| \
	130	S3C2410_LCDCON5_INVVLINE \| \
	131	S3C2410_LCDCON5_HWSWP,
	132	},
	133	.lpcsel= 0x02,
	134	.gpccon= 0xaa940659,
	135	.gpccon_mask= 0xffffffff,
	136	.gpcup= 0x0000ffff,
	137	.gpcup_mask= 0xffffffff,
	138	.gpdcon= 0xaa84aaa0,
	139	.gpdcon_mask= 0xffffffff,
	140	.gpdup= 0x0000faff,
	141	.gpdup_mask= 0xffffffff,
	142
	143	.width= 240,
	144	.height= 320,
	145	.xres= {240,240,240},
	146	.yres= {320,320,320},
	147	.bpp= {16,16,16},
	148	};
1da177e4 LT	149
	150	static struct platform_device *h1940_devices[] __initdata = {
	151	&s3c_device_usb,
	152	&s3c_device_lcd,
	153	&s3c_device_wdt,
	154	&s3c_device_i2c,
	155	&s3c_device_iis,
	156	};
	157
	158	static struct s3c24xx_board h1940_board __initdata = {
	159	.devices = h1940_devices,
	160	.devices_count = ARRAY_SIZE(h1940_devices)
	161	};
	162
5fe10ab1	163	static void __init h1940_map_io(void)
1da177e4 LT	164	{
	165	s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
	166	s3c24xx_init_clocks(0);
	167	s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
	168	s3c24xx_set_board(&h1940_board);
9073341c BD	169
	170	/* setup PM */
	171
	172	memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
	173	s3c2410_pm_init();
1da177e4 LT	174	}
1da177e4 LT	175
5fe10ab1	176	static void __init h1940_init_irq(void)
1da177e4 LT	177	{
1da177e4 LT	178	s3c24xx_init_irq();
1da177e4 LT	179	}
1da177e4 LT	180
5fe10ab1	181	static void __init h1940_init(void)
f92273c1	182	{
893b0309	183	s3c24xx_fb_set_platdata(&h1940_lcdcfg);
f92273c1 AP	184	}
f92273c1 AP	185
1da177e4	186	MACHINE_START(H1940, "IPAQ-H1940")
e9dea0c6	187	/* Maintainer: Ben Dooks <ben@fluff.org> */
e9dea0c6 RK	188	.phys_io = S3C2410_PA_UART,
	189	.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
	190	.boot_params = S3C2410_SDRAM_PA + 0x100,
	191	.map_io = h1940_map_io,
	192	.init_irq = h1940_init_irq,
f92273c1	193	.init_machine = h1940_init,
1da177e4 LT	194	.timer = &s3c24xx_timer,
1da177e4 LT	195	MACHINE_END