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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
333a42e1 | 20 | #include <linux/sysdev.h> |
b6d1f542 | 21 | #include <linux/serial_core.h> |
d052d1be | 22 | #include <linux/platform_device.h> |
fced80c7 | 23 | #include <linux/io.h> |
3909b9f7 AP |
24 | #include <linux/gpio.h> |
25 | ||
26 | #include <linux/mmc/host.h> | |
1da177e4 LT |
27 | |
28 | #include <asm/mach/arch.h> | |
29 | #include <asm/mach/map.h> | |
30 | #include <asm/mach/irq.h> | |
31 | ||
a09e64fb | 32 | #include <mach/hardware.h> |
1da177e4 LT |
33 | #include <asm/irq.h> |
34 | #include <asm/mach-types.h> | |
35 | ||
a2b7ba9c | 36 | #include <plat/regs-serial.h> |
a09e64fb | 37 | #include <mach/regs-lcd.h> |
a09e64fb | 38 | #include <mach/regs-clock.h> |
f92273c1 | 39 | |
3909b9f7 AP |
40 | #include <mach/regs-gpio.h> |
41 | #include <mach/gpio-fns.h> | |
42 | #include <mach/gpio-nrs.h> | |
43 | ||
a09e64fb RK |
44 | #include <mach/h1940.h> |
45 | #include <mach/h1940-latch.h> | |
46 | #include <mach/fb.h> | |
57bd4b91 | 47 | #include <plat/udc.h> |
3e1b776c | 48 | #include <plat/iic.h> |
1da177e4 | 49 | |
d5120ae7 | 50 | #include <plat/clock.h> |
a2b7ba9c BD |
51 | #include <plat/devs.h> |
52 | #include <plat/cpu.h> | |
e24b864a | 53 | #include <plat/pll.h> |
a2b7ba9c | 54 | #include <plat/pm.h> |
3909b9f7 | 55 | #include <plat/mci.h> |
1da177e4 LT |
56 | |
57 | static struct map_desc h1940_iodesc[] __initdata = { | |
e1981680 BD |
58 | [0] = { |
59 | .virtual = (unsigned long)H1940_LATCH, | |
60 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
61 | .length = SZ_16K, | |
62 | .type = MT_DEVICE | |
63 | }, | |
1da177e4 LT |
64 | }; |
65 | ||
66 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
67 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
68 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
69 | ||
66a9b49a | 70 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
71 | [0] = { |
72 | .hwport = 0, | |
73 | .flags = 0, | |
74 | .ucon = 0x3c5, | |
75 | .ulcon = 0x03, | |
76 | .ufcon = 0x51, | |
77 | }, | |
78 | [1] = { | |
79 | .hwport = 1, | |
80 | .flags = 0, | |
81 | .ucon = 0x245, | |
82 | .ulcon = 0x03, | |
83 | .ufcon = 0x00, | |
84 | }, | |
85 | /* IR port */ | |
86 | [2] = { | |
87 | .hwport = 2, | |
88 | .flags = 0, | |
89 | .uart_flags = UPF_CONS_FLOW, | |
90 | .ucon = 0x3c5, | |
91 | .ulcon = 0x43, | |
92 | .ufcon = 0x51, | |
93 | } | |
94 | }; | |
95 | ||
e1981680 BD |
96 | /* Board control latch control */ |
97 | ||
98 | static unsigned int latch_state = H1940_LATCH_DEFAULT; | |
99 | ||
100 | void h1940_latch_control(unsigned int clear, unsigned int set) | |
101 | { | |
102 | unsigned long flags; | |
103 | ||
104 | local_irq_save(flags); | |
105 | ||
106 | latch_state &= ~clear; | |
107 | latch_state |= set; | |
108 | ||
109 | __raw_writel(latch_state, H1940_LATCH); | |
110 | ||
111 | local_irq_restore(flags); | |
112 | } | |
113 | ||
114 | EXPORT_SYMBOL_GPL(h1940_latch_control); | |
1da177e4 | 115 | |
71a9c424 AP |
116 | static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) |
117 | { | |
118 | printk(KERN_DEBUG "udc: pullup(%d)\n",cmd); | |
119 | ||
120 | switch (cmd) | |
121 | { | |
122 | case S3C2410_UDC_P_ENABLE : | |
123 | h1940_latch_control(0, H1940_LATCH_USB_DP); | |
124 | break; | |
125 | case S3C2410_UDC_P_DISABLE : | |
126 | h1940_latch_control(H1940_LATCH_USB_DP, 0); | |
127 | break; | |
128 | case S3C2410_UDC_P_RESET : | |
129 | break; | |
130 | default: | |
131 | break; | |
132 | } | |
133 | } | |
134 | ||
135 | static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |
136 | .udc_command = h1940_udc_pullup, | |
070276d5 | 137 | .vbus_pin = S3C2410_GPG(5), |
71a9c424 AP |
138 | .vbus_pin_inverted = 1, |
139 | }; | |
140 | ||
141 | ||
f92273c1 AP |
142 | /** |
143 | * Set lcd on or off | |
144 | **/ | |
09fe75f6 | 145 | static struct s3c2410fb_display h1940_lcd __initdata = { |
f28ef573 KH |
146 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ |
147 | S3C2410_LCDCON5_INVVLINE | \ | |
148 | S3C2410_LCDCON5_HWSWP, | |
09fe75f6 | 149 | |
1f411537 | 150 | .type = S3C2410_LCDCON1_TFT, |
09fe75f6 KH |
151 | .width = 240, |
152 | .height = 320, | |
69816699 | 153 | .pixclock = 260000, |
09fe75f6 KH |
154 | .xres = 240, |
155 | .yres = 320, | |
156 | .bpp = 16, | |
1f411537 KH |
157 | .left_margin = 20, |
158 | .right_margin = 8, | |
93d11f5a | 159 | .hsync_len = 4, |
5f20f69b KH |
160 | .upper_margin = 8, |
161 | .lower_margin = 7, | |
93d11f5a | 162 | .vsync_len = 1, |
09fe75f6 KH |
163 | }; |
164 | ||
165 | static struct s3c2410fb_mach_info h1940_fb_info __initdata = { | |
09fe75f6 KH |
166 | .displays = &h1940_lcd, |
167 | .num_displays = 1, | |
168 | .default_display = 0, | |
169 | ||
f92273c1 AP |
170 | .lpcsel= 0x02, |
171 | .gpccon= 0xaa940659, | |
172 | .gpccon_mask= 0xffffffff, | |
173 | .gpcup= 0x0000ffff, | |
174 | .gpcup_mask= 0xffffffff, | |
175 | .gpdcon= 0xaa84aaa0, | |
176 | .gpdcon_mask= 0xffffffff, | |
177 | .gpdup= 0x0000faff, | |
178 | .gpdup_mask= 0xffffffff, | |
f92273c1 | 179 | }; |
1da177e4 | 180 | |
ff34aaa9 | 181 | static struct platform_device h1940_device_leds = { |
d2a76020 AP |
182 | .name = "h1940-leds", |
183 | .id = -1, | |
184 | }; | |
185 | ||
ff34aaa9 | 186 | static struct platform_device h1940_device_bluetooth = { |
7fdc7849 AP |
187 | .name = "h1940-bt", |
188 | .id = -1, | |
189 | }; | |
190 | ||
3909b9f7 AP |
191 | static struct s3c24xx_mci_pdata h1940_mmc_cfg = { |
192 | .gpio_detect = S3C2410_GPF(5), | |
193 | .gpio_wprotect = S3C2410_GPH(8), | |
194 | .set_power = NULL, | |
195 | .ocr_avail = MMC_VDD_32_33, | |
196 | }; | |
197 | ||
1da177e4 LT |
198 | static struct platform_device *h1940_devices[] __initdata = { |
199 | &s3c_device_usb, | |
200 | &s3c_device_lcd, | |
201 | &s3c_device_wdt, | |
3e1b776c | 202 | &s3c_device_i2c0, |
1da177e4 | 203 | &s3c_device_iis, |
71a9c424 | 204 | &s3c_device_usbgadget, |
ff34aaa9 BD |
205 | &h1940_device_leds, |
206 | &h1940_device_bluetooth, | |
3909b9f7 | 207 | &s3c_device_sdi, |
1da177e4 LT |
208 | }; |
209 | ||
5fe10ab1 | 210 | static void __init h1940_map_io(void) |
1da177e4 LT |
211 | { |
212 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
213 | s3c24xx_init_clocks(0); | |
214 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
9073341c BD |
215 | |
216 | /* setup PM */ | |
217 | ||
b1dfe1f1 | 218 | #ifdef CONFIG_PM_H1940 |
9073341c | 219 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); |
b1dfe1f1 | 220 | #endif |
4e59c25d | 221 | s3c_pm_init(); |
1da177e4 LT |
222 | } |
223 | ||
5fe10ab1 | 224 | static void __init h1940_init_irq(void) |
1da177e4 LT |
225 | { |
226 | s3c24xx_init_irq(); | |
1da177e4 LT |
227 | } |
228 | ||
5fe10ab1 | 229 | static void __init h1940_init(void) |
f92273c1 | 230 | { |
71a9c424 AP |
231 | u32 tmp; |
232 | ||
09fe75f6 | 233 | s3c24xx_fb_set_platdata(&h1940_fb_info); |
71a9c424 | 234 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
3e1b776c | 235 | s3c_i2c0_set_platdata(NULL); |
71a9c424 | 236 | |
3909b9f7 AP |
237 | s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; |
238 | ||
71a9c424 AP |
239 | /* Turn off suspend on both USB ports, and switch the |
240 | * selectable USB port to USB device mode. */ | |
241 | ||
242 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | |
243 | S3C2410_MISCCR_USBSUSPND0 | | |
244 | S3C2410_MISCCR_USBSUSPND1, 0x0); | |
245 | ||
e24b864a BD |
246 | tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) |
247 | | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) | |
248 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); | |
71a9c424 | 249 | writel(tmp, S3C2410_UPLLCON); |
57e5171c BD |
250 | |
251 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); | |
f92273c1 AP |
252 | } |
253 | ||
1da177e4 | 254 | MACHINE_START(H1940, "IPAQ-H1940") |
e9dea0c6 | 255 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
e9dea0c6 RK |
256 | .phys_io = S3C2410_PA_UART, |
257 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
258 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
259 | .map_io = h1940_map_io, | |
260 | .init_irq = h1940_init_irq, | |
71a9c424 | 261 | .init_machine = h1940_init, |
1da177e4 LT |
262 | .timer = &s3c24xx_timer, |
263 | MACHINE_END |