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[ARM] pxa: use chip->ack() instead of accessing GEDR directly
[net-next-2.6.git] / arch / arm / mach-pxa / viper.c
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352699a3
MZ		 1/*
2 * linux/arch/arm/mach-pxa/viper.c
3 *
4 * Support for the Arcom VIPER SBC.
5 *
6 * Author: Ian Campbell
7 * Created: Feb 03, 2003
8 * Copyright: Arcom Control Systems
9 *
10 * Maintained by Marc Zyngier <maz@misterjones.org>
11 * <marc.zyngier@altran.com>
12 *
13 * Based on lubbock.c:
14 * Author: Nicolas Pitre
15 * Created: Jun 15, 2001
16 * Copyright: MontaVista Software Inc.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/types.h>
24#include <linux/memory.h>
25#include <linux/cpu.h>
26#include <linux/cpufreq.h>
27#include <linux/delay.h>
28#include <linux/fs.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/major.h>
32#include <linux/module.h>
33#include <linux/pm.h>
34#include <linux/sched.h>
35#include <linux/gpio.h>
36#include <linux/i2c-gpio.h>
37#include <linux/serial_8250.h>
38#include <linux/smc91x.h>
39#include <linux/pwm_backlight.h>
40#include <linux/usb/isp116x.h>
41#include <linux/mtd/mtd.h>
42#include <linux/mtd/partitions.h>
43#include <linux/mtd/physmap.h>
44
51c62982 45#include <mach/pxa25x.h>
352699a3
MZ		 46#include <mach/audio.h>
47#include <mach/pxafb.h>
f0a83701 48#include <plat/i2c.h>
776abac8 49#include <mach/regs-uart.h>
c2de1c38 50#include <mach/arcom-pcmcia.h>
352699a3
MZ		 51#include <mach/viper.h>
52
53#include <asm/setup.h>
54#include <asm/mach-types.h>
55#include <asm/irq.h>
56#include <asm/sizes.h>
57
58#include <asm/mach/arch.h>
59#include <asm/mach/map.h>
60#include <asm/mach/irq.h>
61
62#include "generic.h"
63#include "devices.h"
64
65static unsigned int icr;
66
67static void viper_icr_set_bit(unsigned int bit)
68{
69 icr |= bit;
70 VIPER_ICR = icr;
71}
72
73static void viper_icr_clear_bit(unsigned int bit)
74{
75 icr &= ~bit;
76 VIPER_ICR = icr;
77}
78
79/* This function is used from the pcmcia module to reset the CF */
c2de1c38 80static void viper_cf_reset(int state)
352699a3
MZ		 81{
82 if (state)
83 viper_icr_set_bit(VIPER_ICR_CF_RST);
84 else
85 viper_icr_clear_bit(VIPER_ICR_CF_RST);
86}
c2de1c38
MZ		 87
88static struct arcom_pcmcia_pdata viper_pcmcia_info = {
89 .cd_gpio = VIPER_CF_CD_GPIO,
90 .rdy_gpio = VIPER_CF_RDY_GPIO,
91 .pwr_gpio = VIPER_CF_POWER_GPIO,
92 .reset = viper_cf_reset,
93};
94
95static struct platform_device viper_pcmcia_device = {
96 .name = "viper-pcmcia",
97 .id = -1,
98 .dev = {
99 .platform_data = &viper_pcmcia_info,
100 },
101};
352699a3
MZ		 102
103/*
104 * The CPLD version register was not present on VIPER boards prior to
105 * v2i1. On v1 boards where the version register is not present we
106 * will just read back the previous value from the databus.
107 *
108 * Therefore we do two reads. The first time we write 0 to the
109 * (read-only) register before reading and the second time we write
110 * 0xff first. If the two reads do not match or they read back as 0xff
111 * or 0x00 then we have version 1 hardware.
112 */
113static u8 viper_hw_version(void)
114{
115 u8 v1, v2;
116 unsigned long flags;
117
118 local_irq_save(flags);
119
120 VIPER_VERSION = 0;
121 v1 = VIPER_VERSION;
122 VIPER_VERSION = 0xff;
123 v2 = VIPER_VERSION;
124
125 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
126
127 local_irq_restore(flags);
128 return v1;
129}
130
131/* CPU sysdev */
132static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
133{
134 viper_icr_set_bit(VIPER_ICR_R_DIS);
135 return 0;
136}
137
138static int viper_cpu_resume(struct sys_device *sysdev)
139{
140 viper_icr_clear_bit(VIPER_ICR_R_DIS);
141 return 0;
142}
143
144static struct sysdev_driver viper_cpu_sysdev_driver = {
145 .suspend = viper_cpu_suspend,
146 .resume = viper_cpu_resume,
147};
148
149static unsigned int current_voltage_divisor;
150
151/*
152 * If force is not true then step from existing to new divisor. If
153 * force is true then jump straight to the new divisor. Stepping is
154 * used because if the jump in voltage is too large, the VCC can dip
155 * too low and the regulator cuts out.
156 *
157 * force can be used to initialize the divisor to a know state by
158 * setting the value for the current clock speed, since we are already
159 * running at that speed we know the voltage should be pretty close so
160 * the jump won't be too large
161 */
162static void viper_set_core_cpu_voltage(unsigned long khz, int force)
163{
164 int i = 0;
165 unsigned int divisor = 0;
166 const char *v;
167
168 if (khz < 200000) {
169 v = "1.0"; divisor = 0xfff;
170 } else if (khz < 300000) {
171 v = "1.1"; divisor = 0xde5;
172 } else {
173 v = "1.3"; divisor = 0x325;
174 }
175
176 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
177 v, (int)khz / 1000, (int)khz % 1000);
178
179#define STEP 0x100
180 do {
181 int step;
182
183 if (force)
184 step = divisor;
185 else if (current_voltage_divisor < divisor - STEP)
186 step = current_voltage_divisor + STEP;
187 else if (current_voltage_divisor > divisor + STEP)
188 step = current_voltage_divisor - STEP;
189 else
190 step = divisor;
191 force = 0;
192
193 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
194 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
195
196 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
197 udelay(1);
198
199 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
200 udelay(1);
201
202 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
203 udelay(1);
204
205 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
206 }
207 udelay(1);
208
209 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
210 udelay(1);
211
212 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
213
214 current_voltage_divisor = step;
215 } while (current_voltage_divisor != divisor);
216}
217
218/* Interrupt handling */
219static unsigned long viper_irq_enabled_mask;
a9ff8f64
MZ		 220static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
221static const int viper_isa_irq_map[] = {
222 0, /* ISA irq #0, invalid */
223 0, /* ISA irq #1, invalid */
224 0, /* ISA irq #2, invalid */
225 1 << 0, /* ISA irq #3 */
226 1 << 1, /* ISA irq #4 */
227 1 << 2, /* ISA irq #5 */
228 1 << 3, /* ISA irq #6 */
229 1 << 4, /* ISA irq #7 */
230 0, /* ISA irq #8, invalid */
231 1 << 8, /* ISA irq #9 */
232 1 << 5, /* ISA irq #10 */
233 1 << 6, /* ISA irq #11 */
234 1 << 7, /* ISA irq #12 */
235 0, /* ISA irq #13, invalid */
236 1 << 9, /* ISA irq #14 */
237 1 << 10, /* ISA irq #15 */
238};
239
240static inline int viper_irq_to_bitmask(unsigned int irq)
241{
242 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
243}
244
245static inline int viper_bit_to_irq(int bit)
246{
247 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
248}
352699a3
MZ		 249
250static void viper_ack_irq(unsigned int irq)
251{
a9ff8f64 252 int viper_irq = viper_irq_to_bitmask(irq);
352699a3 253
a9ff8f64
MZ		 254 if (viper_irq & 0xff)
255 VIPER_LO_IRQ_STATUS = viper_irq;
352699a3 256 else
a9ff8f64 257 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
352699a3
MZ		 258}
259
260static void viper_mask_irq(unsigned int irq)
261{
a9ff8f64 262 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
352699a3
MZ		 263}
264
265static void viper_unmask_irq(unsigned int irq)
266{
a9ff8f64 267 viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
352699a3
MZ		 268}
269
270static inline unsigned long viper_irq_pending(void)
271{
272 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
273 viper_irq_enabled_mask;
274}
275
276static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
277{
278 unsigned long pending;
279
280 pending = viper_irq_pending();
281 do {
a9ff8f64
MZ		 282 /* we're in a chained irq handler,
283 * so ack the interrupt by hand */
669cb51c 284 desc->chip->ack(irq);
a9ff8f64 285
352699a3 286 if (likely(pending)) {
a9ff8f64 287 irq = viper_bit_to_irq(__ffs(pending));
352699a3
MZ		 288 generic_handle_irq(irq);
289 }
290 pending = viper_irq_pending();
291 } while (pending);
292}
293
294static struct irq_chip viper_irq_chip = {
295 .name = "ISA",
296 .ack = viper_ack_irq,
297 .mask = viper_mask_irq,
298 .unmask = viper_unmask_irq
299};
300
301static void __init viper_init_irq(void)
302{
a9ff8f64 303 int level;
352699a3
MZ		 304 int isa_irq;
305
306 pxa25x_init_irq();
307
308 /* setup ISA IRQs */
a9ff8f64
MZ		 309 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
310 isa_irq = viper_bit_to_irq(level);
352699a3
MZ		 311 set_irq_chip(isa_irq, &viper_irq_chip);
312 set_irq_handler(isa_irq, handle_edge_irq);
313 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
314 }
315
316 set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
317 viper_irq_handler);
318 set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
352699a3
MZ		 319}
320
321/* Flat Panel */
322static struct pxafb_mode_info fb_mode_info[] = {
323 {
324 .pixclock = 157500,
325
326 .xres = 320,
327 .yres = 240,
328
329 .bpp = 16,
330
331 .hsync_len = 63,
332 .left_margin = 7,
333 .right_margin = 13,
334
335 .vsync_len = 20,
336 .upper_margin = 0,
337 .lower_margin = 0,
338
339 .sync = 0,
340 },
341};
342
343static struct pxafb_mach_info fb_info = {
344 .modes = fb_mode_info,
345 .num_modes = 1,
346 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
347};
348
349static int viper_backlight_init(struct device *dev)
350{
351 int ret;
352
353 /* GPIO9 and 10 control FB backlight. Initialise to off */
354 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
355 if (ret)
356 goto err_request_bckl;
357
358 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
359 if (ret)
360 goto err_request_lcd;
361
362 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
363 if (ret)
364 goto err_dir;
365
366 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
367 if (ret)
368 goto err_dir;
369
370 return 0;
371
372err_dir:
373 gpio_free(VIPER_LCD_EN_GPIO);
374err_request_lcd:
375 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
376err_request_bckl:
377 dev_err(dev, "Failed to setup LCD GPIOs\n");
378
379 return ret;
380}
381
2d51a521 382static int viper_backlight_notify(struct device *dev, int brightness)
352699a3
MZ		 383{
384 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
385 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
386
387 return brightness;
388}
389
390static void viper_backlight_exit(struct device *dev)
391{
392 gpio_free(VIPER_LCD_EN_GPIO);
393 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
394}
395
396static struct platform_pwm_backlight_data viper_backlight_data = {
397 .pwm_id = 0,
398 .max_brightness = 100,
399 .dft_brightness = 100,
400 .pwm_period_ns = 1000000,
401 .init = viper_backlight_init,
402 .notify = viper_backlight_notify,
403 .exit = viper_backlight_exit,
404};
405
406static struct platform_device viper_backlight_device = {
407 .name = "pwm-backlight",
408 .dev = {
409 .parent = &pxa25x_device_pwm0.dev,
410 .platform_data = &viper_backlight_data,
411 },
412};
413
414/* Ethernet */
415static struct resource smc91x_resources[] = {
416 [0] = {
417 .name = "smc91x-regs",
418 .start = VIPER_ETH_PHYS + 0x300,
419 .end = VIPER_ETH_PHYS + 0x30f,
420 .flags = IORESOURCE_MEM,
421 },
422 [1] = {
423 .start = gpio_to_irq(VIPER_ETH_GPIO),
424 .end = gpio_to_irq(VIPER_ETH_GPIO),
425 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
426 },
427 [2] = {
428 .name = "smc91x-data32",
429 .start = VIPER_ETH_DATA_PHYS,
430 .end = VIPER_ETH_DATA_PHYS + 3,
431 .flags = IORESOURCE_MEM,
432 },
433};
434
435static struct smc91x_platdata viper_smc91x_info = {
436 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
437 .leda = RPC_LED_100_10,
438 .ledb = RPC_LED_TX_RX,
439};
440
441static struct platform_device smc91x_device = {
442 .name = "smc91x",
443 .id = -1,
444 .num_resources = ARRAY_SIZE(smc91x_resources),
445 .resource = smc91x_resources,
446 .dev = {
447 .platform_data = &viper_smc91x_info,
448 },
449};
450
451/* i2c */
452static struct i2c_gpio_platform_data i2c_bus_data = {
453 .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
454 .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
455 .udelay = 10,
456 .timeout = 100,
457};
458
459static struct platform_device i2c_bus_device = {
460 .name = "i2c-gpio",
461 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
462 .dev = {
463 .platform_data = &i2c_bus_data,
464 }
465};
466
467static struct i2c_board_info __initdata viper_i2c_devices[] = {
468 {
469 I2C_BOARD_INFO("ds1338", 0x68),
470 },
471};
472
473/*
474 * Serial configuration:
475 * You can either have the standard PXA ports driven by the PXA driver,
476 * or all the ports (PXA + 16850) driven by the 8250 driver.
477 * Choose your poison.
478 */
479
480static struct resource viper_serial_resources[] = {
481#ifndef CONFIG_SERIAL_PXA
482 {
483 .start = 0x40100000,
484 .end = 0x4010001f,
485 .flags = IORESOURCE_MEM,
486 },
487 {
488 .start = 0x40200000,
489 .end = 0x4020001f,
490 .flags = IORESOURCE_MEM,
491 },
492 {
493 .start = 0x40700000,
494 .end = 0x4070001f,
495 .flags = IORESOURCE_MEM,
496 },
497 {
498 .start = VIPER_UARTA_PHYS,
499 .end = VIPER_UARTA_PHYS + 0xf,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .start = VIPER_UARTB_PHYS,
504 .end = VIPER_UARTB_PHYS + 0xf,
505 .flags = IORESOURCE_MEM,
506 },
507#else
508 {
509 0,
510 },
511#endif
512};
513
514static struct plat_serial8250_port serial_platform_data[] = {
515#ifndef CONFIG_SERIAL_PXA
516 /* Internal UARTs */
517 {
518 .membase = (void *)&FFUART,
519 .mapbase = __PREG(FFUART),
520 .irq = IRQ_FFUART,
521 .uartclk = 921600 * 16,
522 .regshift = 2,
523 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
524 .iotype = UPIO_MEM,
525 },
526 {
527 .membase = (void *)&BTUART,
528 .mapbase = __PREG(BTUART),
529 .irq = IRQ_BTUART,
530 .uartclk = 921600 * 16,
531 .regshift = 2,
532 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
533 .iotype = UPIO_MEM,
534 },
535 {
536 .membase = (void *)&STUART,
537 .mapbase = __PREG(STUART),
538 .irq = IRQ_STUART,
539 .uartclk = 921600 * 16,
540 .regshift = 2,
541 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
542 .iotype = UPIO_MEM,
543 },
544 /* External UARTs */
545 {
546 .mapbase = VIPER_UARTA_PHYS,
547 .irq = gpio_to_irq(VIPER_UARTA_GPIO),
3fe6ccff 548 .irqflags = IRQF_TRIGGER_RISING,
352699a3
MZ		 549 .uartclk = 1843200,
550 .regshift = 1,
551 .iotype = UPIO_MEM,
552 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
553 UPF_SKIP_TEST,
554 },
555 {
556 .mapbase = VIPER_UARTB_PHYS,
557 .irq = gpio_to_irq(VIPER_UARTB_GPIO),
3fe6ccff 558 .irqflags = IRQF_TRIGGER_RISING,
352699a3
MZ		 559 .uartclk = 1843200,
560 .regshift = 1,
561 .iotype = UPIO_MEM,
562 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
563 UPF_SKIP_TEST,
564 },
565#endif
566 { },
567};
568
569static struct platform_device serial_device = {
570 .name = "serial8250",
571 .id = 0,
572 .dev = {
573 .platform_data = serial_platform_data,
574 },
575 .num_resources = ARRAY_SIZE(viper_serial_resources),
576 .resource = viper_serial_resources,
577};
578
579/* USB */
580static void isp116x_delay(struct device *dev, int delay)
581{
582 ndelay(delay);
583}
584
585static struct resource isp116x_resources[] = {
586 [0] = { /* DATA */
587 .start = VIPER_USB_PHYS + 0,
588 .end = VIPER_USB_PHYS + 1,
589 .flags = IORESOURCE_MEM,
590 },
591 [1] = { /* ADDR */
592 .start = VIPER_USB_PHYS + 2,
593 .end = VIPER_USB_PHYS + 3,
594 .flags = IORESOURCE_MEM,
595 },
596 [2] = {
597 .start = gpio_to_irq(VIPER_USB_GPIO),
598 .end = gpio_to_irq(VIPER_USB_GPIO),
599 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
600 },
601};
602
603/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
604static struct isp116x_platform_data isp116x_platform_data = {
605 /* Enable internal resistors on downstream ports */
606 .sel15Kres = 1,
607 /* On-chip overcurrent protection */
608 .oc_enable = 1,
609 /* INT output polarity */
610 .int_act_high = 1,
611 /* INT edge or level triggered */
612 .int_edge_triggered = 0,
613
614 /* WAKEUP pin connected - NOT SUPPORTED */
615 /* .remote_wakeup_connected = 0, */
616 /* Wakeup by devices on usb bus enabled */
617 .remote_wakeup_enable = 0,
618 .delay = isp116x_delay,
619};
620
621static struct platform_device isp116x_device = {
622 .name = "isp116x-hcd",
623 .id = -1,
624 .num_resources = ARRAY_SIZE(isp116x_resources),
625 .resource = isp116x_resources,
626 .dev = {
627 .platform_data = &isp116x_platform_data,
628 },
629
630};
631
632/* MTD */
633static struct resource mtd_resources[] = {
634 [0] = { /* RedBoot config + filesystem flash */
635 .start = VIPER_FLASH_PHYS,
636 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
637 .flags = IORESOURCE_MEM,
638 },
639 [1] = { /* Boot flash */
640 .start = VIPER_BOOT_PHYS,
641 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
642 .flags = IORESOURCE_MEM,
643 },
644 [2] = { /*
645 * SRAM size is actually 256KB, 8bits, with a sparse mapping
646 * (each byte is on a 16bit boundary).
647 */
648 .start = _VIPER_SRAM_BASE,
649 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
650 .flags = IORESOURCE_MEM,
651 },
652};
653
654static struct mtd_partition viper_boot_flash_partition = {
655 .name = "RedBoot",
656 .size = SZ_1M,
657 .offset = 0,
658 .mask_flags = MTD_WRITEABLE, /* force R/O */
659};
660
661static struct physmap_flash_data viper_flash_data[] = {
662 [0] = {
663 .width = 2,
664 .parts = NULL,
665 .nr_parts = 0,
666 },
667 [1] = {
668 .width = 2,
669 .parts = &viper_boot_flash_partition,
670 .nr_parts = 1,
671 },
672};
673
674static struct platform_device viper_mtd_devices[] = {
675 [0] = {
676 .name = "physmap-flash",
677 .id = 0,
678 .dev = {
679 .platform_data = &viper_flash_data[0],
680 },
681 .resource = &mtd_resources[0],
682 .num_resources = 1,
683 },
684 [1] = {
685 .name = "physmap-flash",
686 .id = 1,
687 .dev = {
688 .platform_data = &viper_flash_data[1],
689 },
690 .resource = &mtd_resources[1],
691 .num_resources = 1,
692 },
693};
694
695static struct platform_device *viper_devs[] __initdata = {
696 &smc91x_device,
697 &i2c_bus_device,
698 &serial_device,
699 &isp116x_device,
700 &viper_mtd_devices[0],
701 &viper_mtd_devices[1],
702 &viper_backlight_device,
c2de1c38 703 &viper_pcmcia_device,
352699a3
MZ		 704};
705
706static mfp_cfg_t viper_pin_config[] __initdata = {
707 /* Chip selects */
708 GPIO15_nCS_1,
709 GPIO78_nCS_2,
710 GPIO79_nCS_3,
711 GPIO80_nCS_4,
712 GPIO33_nCS_5,
713
714 /* FP Backlight */
715 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
716 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
717 GPIO16_PWM0_OUT,
718
719 /* Ethernet PHY Ready */
720 GPIO18_RDY,
721
722 /* Serial shutdown */
723 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
724
725 /* Compact-Flash / PC104 */
726 GPIO48_nPOE,
727 GPIO49_nPWE,
728 GPIO50_nPIOR,
729 GPIO51_nPIOW,
730 GPIO52_nPCE_1,
731 GPIO53_nPCE_2,
732 GPIO54_nPSKTSEL,
733 GPIO55_nPREG,
734 GPIO56_nPWAIT,
735 GPIO57_nIOIS16,
736 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
737 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
738 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
739
740 /* Integrated UPS control */
741 GPIO20_GPIO, /* VIPER_UPS_GPIO */
742
743 /* Vcc regulator control */
744 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
745 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
746 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
747
748 /* i2c busses */
749 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
750 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
751 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
752 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
753
754 /* PC/104 Interrupt */
755 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
756};
757
758static unsigned long viper_tpm;
759
760static int __init viper_tpm_setup(char *str)
761{
762 strict_strtoul(str, 10, &viper_tpm);
763 return 1;
764}
765
766__setup("tpm=", viper_tpm_setup);
767
768static void __init viper_tpm_init(void)
769{
770 struct platform_device *tpm_device;
771 struct i2c_gpio_platform_data i2c_tpm_data = {
772 .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
773 .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
774 .udelay = 10,
775 .timeout = 100,
776 };
777 char *errstr;
778
779 /* Allocate TPM i2c bus if requested */
780 if (!viper_tpm)
781 return;
782
783 tpm_device = platform_device_alloc("i2c-gpio", 2);
784 if (tpm_device) {
785 if (!platform_device_add_data(tpm_device,
786 &i2c_tpm_data,
787 sizeof(i2c_tpm_data))) {
788 if (platform_device_add(tpm_device)) {
789 errstr = "register TPM i2c bus";
790 goto error_free_tpm;
791 }
792 } else {
793 errstr = "allocate TPM i2c bus data";
794 goto error_free_tpm;
795 }
796 } else {
797 errstr = "allocate TPM i2c device";
798 goto error_tpm;
799 }
800
801 return;
802
803error_free_tpm:
804 kfree(tpm_device);
805error_tpm:
806 pr_err("viper: Couldn't %s, giving up\n", errstr);
807}
808
809static void __init viper_init_vcore_gpios(void)
810{
811 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
812 goto err_request_data;
813
814 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
815 goto err_request_clk;
816
817 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
818 goto err_request_cs;
819
820 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
821 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
822 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
823 goto err_dir;
824
825 /* c/should assume redboot set the correct level ??? */
826 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
827
828 return;
829
830err_dir:
831 gpio_free(VIPER_PSU_nCS_LD_GPIO);
832err_request_cs:
833 gpio_free(VIPER_PSU_CLK_GPIO);
834err_request_clk:
835 gpio_free(VIPER_PSU_DATA_GPIO);
836err_request_data:
837 pr_err("viper: Failed to setup vcore control GPIOs\n");
838}
839
840static void __init viper_init_serial_gpio(void)
841{
842 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
843 goto err_request;
844
845 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
846 goto err_dir;
847
848 return;
849
850err_dir:
851 gpio_free(VIPER_UART_SHDN_GPIO);
852err_request:
853 pr_err("viper: Failed to setup UART shutdown GPIO\n");
854}
855
856#ifdef CONFIG_CPU_FREQ
857static int viper_cpufreq_notifier(struct notifier_block *nb,
858 unsigned long val, void *data)
859{
860 struct cpufreq_freqs *freq = data;
861
862 /* TODO: Adjust timings??? */
863
864 switch (val) {
865 case CPUFREQ_PRECHANGE:
866 if (freq->old < freq->new) {
867 /* we are getting faster so raise the voltage
868 * before we change freq */
869 viper_set_core_cpu_voltage(freq->new, 0);
870 }
871 break;
872 case CPUFREQ_POSTCHANGE:
873 if (freq->old > freq->new) {
874 /* we are slowing down so drop the power
875 * after we change freq */
876 viper_set_core_cpu_voltage(freq->new, 0);
877 }
878 break;
879 case CPUFREQ_RESUMECHANGE:
880 viper_set_core_cpu_voltage(freq->new, 0);
881 break;
882 default:
883 /* ignore */
884 break;
885 }
886
887 return 0;
888}
889
890static struct notifier_block viper_cpufreq_notifier_block = {
891 .notifier_call = viper_cpufreq_notifier
892};
893
894static void __init viper_init_cpufreq(void)
895{
896 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
897 CPUFREQ_TRANSITION_NOTIFIER))
898 pr_err("viper: Failed to setup cpufreq notifier\n");
899}
900#else
901static inline void viper_init_cpufreq(void) {}
902#endif
903
904static void viper_power_off(void)
905{
906 pr_notice("Shutting off UPS\n");
907 gpio_set_value(VIPER_UPS_GPIO, 1);
908 /* Spin to death... */
909 while (1);
910}
911
912static void __init viper_init(void)
913{
914 u8 version;
915
916 pm_power_off = viper_power_off;
917
918 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
919
cc155c6f
RK		 920 pxa_set_ffuart_info(NULL);
921 pxa_set_btuart_info(NULL);
922 pxa_set_stuart_info(NULL);
923
352699a3
MZ		 924 /* Wake-up serial console */
925 viper_init_serial_gpio();
926
927 set_pxa_fb_info(&fb_info);
928
929 /* v1 hardware cannot use the datacs line */
930 version = viper_hw_version();
931 if (version == 0)
932 smc91x_device.num_resources--;
933
934 pxa_set_i2c_info(NULL);
935 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
936
937 viper_init_vcore_gpios();
938 viper_init_cpufreq();
939
940 sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
941
942 if (version) {
943 pr_info("viper: hardware v%di%d detected. "
944 "CPLD revision %d.\n",
945 VIPER_BOARD_VERSION(version),
946 VIPER_BOARD_ISSUE(version),
947 VIPER_CPLD_REVISION(version));
948 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
949 (VIPER_BOARD_ISSUE(version) << 4) |
950 VIPER_CPLD_REVISION(version);
951 } else {
952 pr_info("viper: No version register.\n");
953 }
954
955 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
956
957 viper_tpm_init();
958 pxa_set_ac97_info(NULL);
959}
960
961static struct map_desc viper_io_desc[] __initdata = {
962 {
963 .virtual = VIPER_CPLD_BASE,
964 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
965 .length = 0x00300000,
966 .type = MT_DEVICE,
967 },
968 {
969 .virtual = VIPER_PC104IO_BASE,
b393c696 970 .pfn = __phys_to_pfn(0x30000000),
352699a3
MZ		 971 .length = 0x00800000,
972 .type = MT_DEVICE,
973 },
974};
975
976static void __init viper_map_io(void)
977{
978 pxa_map_io();
979
980 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
981
982 PCFR |= PCFR_OPDE;
983}
984
985MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
986 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
987 .phys_io = 0x40000000,
988 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
989 .boot_params = 0xa0000100,
990 .map_io = viper_map_io,
991 .init_irq = viper_init_irq,
992 .timer = &pxa_timer,
993 .init_machine = viper_init,
994MACHINE_END
Clone of davem's net-next-2.6 tree