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[ARM] pxa: add the missing AC97 pin configurations
[net-next-2.6.git] / arch / arm / mach-pxa / e800.c
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1/*
2 * Hardware definitions for the Toshiba eseries PDAs
3 *
4 * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
5 *
6 * This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
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15#include <linux/device.h>
16#include <linux/platform_device.h>
17#include <linux/fb.h>
b1ae1b7b 18#include <linux/mfd/tc6393xb.h>
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19
20#include <video/w100fb.h>
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21
22#include <asm/setup.h>
23#include <asm/mach/arch.h>
24#include <asm/mach-types.h>
25
51c62982 26#include <mach/pxa25x.h>
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27#include <mach/eseries-gpio.h>
28#include <mach/udc.h>
80b02c17 29#include <mach/irqs.h>
80748fb8 30#include <mach/audio.h>
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31
32#include "generic.h"
33#include "eseries.h"
b1ae1b7b 34#include "clock.h"
7dc96414 35
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36/* ------------------------ e800 LCD definitions ------------------------- */
37
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38static unsigned long e800_pin_config[] __initdata = {
39 /* AC97 */
40 GPIO28_AC97_BITCLK,
41 GPIO29_AC97_SDATA_IN_0,
42 GPIO30_AC97_SDATA_OUT,
43 GPIO31_AC97_SYNC,
44};
45
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46static struct w100_gen_regs e800_lcd_regs = {
47 .lcd_format = 0x00008003,
48 .lcdd_cntl1 = 0x02a00000,
49 .lcdd_cntl2 = 0x0003ffff,
50 .genlcd_cntl1 = 0x000ff2a3,
51 .genlcd_cntl2 = 0x000002a3,
52 .genlcd_cntl3 = 0x000102aa,
53};
54
55static struct w100_mode e800_lcd_mode[2] = {
56 [0] = {
57 .xres = 480,
58 .yres = 640,
59 .left_margin = 52,
60 .right_margin = 148,
61 .upper_margin = 2,
62 .lower_margin = 6,
63 .crtc_ss = 0x80350034,
64 .crtc_ls = 0x802b0026,
65 .crtc_gs = 0x80160016,
66 .crtc_vpos_gs = 0x00020003,
67 .crtc_rev = 0x0040001d,
68 .crtc_dclk = 0xe0000000,
69 .crtc_gclk = 0x82a50049,
70 .crtc_goe = 0x80ee001c,
71 .crtc_ps1_active = 0x00000000,
72 .pll_freq = 128,
73 .pixclk_divider = 4,
74 .pixclk_divider_rotated = 6,
75 .pixclk_src = CLK_SRC_PLL,
76 .sysclk_divider = 0,
77 .sysclk_src = CLK_SRC_PLL,
78 },
79 [1] = {
80 .xres = 240,
81 .yres = 320,
82 .left_margin = 15,
83 .right_margin = 88,
84 .upper_margin = 0,
85 .lower_margin = 7,
86 .crtc_ss = 0xd010000f,
87 .crtc_ls = 0x80070003,
88 .crtc_gs = 0x80000000,
89 .crtc_vpos_gs = 0x01460147,
90 .crtc_rev = 0x00400003,
91 .crtc_dclk = 0xa1700030,
92 .crtc_gclk = 0x814b0008,
93 .crtc_goe = 0x80cc0015,
94 .crtc_ps1_active = 0x00000000,
95 .pll_freq = 100,
96 .pixclk_divider = 6, /* Wince uses 14 which gives a */
97 .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
98 .pixclk_src = CLK_SRC_PLL,
99 .sysclk_divider = 0,
100 .sysclk_src = CLK_SRC_PLL,
101 }
102};
103
104
105static struct w100_gpio_regs e800_w100_gpio_info = {
106 .init_data1 = 0xc13fc019,
107 .gpio_dir1 = 0x3e40df7f,
108 .gpio_oe1 = 0x003c3000,
109 .init_data2 = 0x00000000,
110 .gpio_dir2 = 0x00000000,
111 .gpio_oe2 = 0x00000000,
112};
113
114static struct w100_mem_info e800_w100_mem_info = {
115 .ext_cntl = 0x09640011,
116 .sdram_mode_reg = 0x00600021,
117 .ext_timing_cntl = 0x10001545,
118 .io_cntl = 0x7ddd7333,
119 .size = 0x1fffff,
120};
121
122static void e800_tg_change(struct w100fb_par *par)
123{
124 unsigned long tmp;
125
126 tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
127 if (par->mode->xres == 480)
128 tmp |= 0x100;
129 else
130 tmp &= ~0x100;
131 w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
132}
133
134static struct w100_tg_info e800_tg_info = {
135 .change = e800_tg_change,
136};
137
138static struct w100fb_mach_info e800_fb_info = {
139 .modelist = e800_lcd_mode,
140 .num_modes = 2,
141 .regs = &e800_lcd_regs,
142 .gpio = &e800_w100_gpio_info,
143 .mem = &e800_w100_mem_info,
144 .tg = &e800_tg_info,
145 .xtal_freq = 16000000,
146};
147
148static struct resource e800_fb_resources[] = {
149 [0] = {
150 .start = 0x0c000000,
151 .end = 0x0cffffff,
152 .flags = IORESOURCE_MEM,
153 },
154};
155
156static struct platform_device e800_fb_device = {
157 .name = "w100fb",
158 .id = -1,
159 .dev = {
160 .platform_data = &e800_fb_info,
161 },
162 .num_resources = ARRAY_SIZE(e800_fb_resources),
163 .resource = e800_fb_resources,
164};
165
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166/* --------------------------- UDC definitions --------------------------- */
167
168static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
169 .gpio_vbus = GPIO_E800_USB_DISC,
170 .gpio_pullup = GPIO_E800_USB_PULLUP,
171 .gpio_pullup_inverted = 1
172};
173
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174/* ----------------- e800 tc6393xb parameters ------------------ */
175
176static struct tc6393xb_platform_data e800_tc6393xb_info = {
177 .irq_base = IRQ_BOARD_START,
178 .scr_pll2cr = 0x0cc1,
179 .scr_gper = 0,
180 .gpio_base = -1,
181 .suspend = &eseries_tmio_suspend,
182 .resume = &eseries_tmio_resume,
183 .enable = &eseries_tmio_enable,
184 .disable = &eseries_tmio_disable,
185};
186
187static struct platform_device e800_tc6393xb_device = {
188 .name = "tc6393xb",
189 .id = -1,
190 .dev = {
191 .platform_data = &e800_tc6393xb_info,
192 },
193 .num_resources = 2,
194 .resource = eseries_tmio_resources,
195};
196
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197/* ----------------------------------------------------------------------- */
198
199static struct platform_device *devices[] __initdata = {
200 &e800_fb_device,
b1ae1b7b 201 &e800_tc6393xb_device,
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202};
203
204static void __init e800_init(void)
205{
c11b6a42 206 pxa2xx_mfp_config(ARRAY_AND_SIZE(e800_pin_config));
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207 pxa_set_ffuart_info(NULL);
208 pxa_set_btuart_info(NULL);
209 pxa_set_stuart_info(NULL);
c68ffdda 210 clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
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211 "GPIO11_CLK", NULL),
212 eseries_get_tmio_gpios();
0ec3cf69 213 platform_add_devices(devices, ARRAY_SIZE(devices));
ebcce7b1 214 pxa_set_udc_info(&e800_udc_mach_info);
80748fb8 215 pxa_set_ac97_info(NULL);
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216}
217
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218MACHINE_START(E800, "Toshiba e800")
219 /* Maintainer: Ian Molton (spyro@f2s.com) */
220 .phys_io = 0x40000000,
221 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
222 .boot_params = 0xa0000100,
223 .map_io = pxa_map_io,
224 .init_irq = pxa25x_init_irq,
225 .fixup = eseries_fixup,
0ec3cf69 226 .init_machine = e800_init,
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227 .timer = &pxa_timer,
228MACHINE_END
229