[net-next-2.6.git] / arch / arm / mach-omap2 / omap_hwmod_34xx.h

/*
 * omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips
 *
 * Copyright (C) 2009 Nokia Corporation
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */
#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H

#ifdef CONFIG_ARCH_OMAP3

#include <plat/omap_hwmod.h>
#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/dma.h>

#include "prm-regbits-34xx.h"

static struct omap_hwmod omap34xx_mpu_hwmod;
static struct omap_hwmod omap34xx_l3_hwmod;
static struct omap_hwmod omap34xx_l4_core_hwmod;
static struct omap_hwmod omap34xx_l4_per_hwmod;

/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = {
	.master	= &omap34xx_l3_hwmod,
	.slave	= &omap34xx_l4_core_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* L3 -> L4_PER interface */
static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = {
	.master = &omap34xx_l3_hwmod,
	.slave	= &omap34xx_l4_per_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* MPU -> L3 interface */
static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = {
	.master = &omap34xx_mpu_hwmod,
	.slave	= &omap34xx_l3_hwmod,
	.user	= OCP_USER_MPU,
};

/* Slave interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = {
	&omap34xx_mpu__l3,
};

/* Master interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = {
	&omap34xx_l3__l4_core,
	&omap34xx_l3__l4_per,
};

/* L3 */
static struct omap_hwmod omap34xx_l3_hwmod = {
	.name		= "l3_hwmod",
	.masters	= omap34xx_l3_masters,
	.masters_cnt	= ARRAY_SIZE(omap34xx_l3_masters),
	.slaves		= omap34xx_l3_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap34xx_l3_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};

static struct omap_hwmod omap34xx_l4_wkup_hwmod;

/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
	.master	= &omap34xx_l4_core_hwmod,
	.slave	= &omap34xx_l4_wkup_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
	&omap34xx_l3__l4_core,
};

/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = {
	&omap34xx_l4_core__l4_wkup,
};

/* L4 CORE */
static struct omap_hwmod omap34xx_l4_core_hwmod = {
	.name		= "l4_core_hwmod",
	.masters	= omap34xx_l4_core_masters,
	.masters_cnt	= ARRAY_SIZE(omap34xx_l4_core_masters),
	.slaves		= omap34xx_l4_core_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap34xx_l4_core_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};

/* Slave interfaces on the L4_PER interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = {
	&omap34xx_l3__l4_per,
};

/* Master interfaces on the L4_PER interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = {
};

/* L4 PER */
static struct omap_hwmod omap34xx_l4_per_hwmod = {
	.name		= "l4_per_hwmod",
	.masters	= omap34xx_l4_per_masters,
	.masters_cnt	= ARRAY_SIZE(omap34xx_l4_per_masters),
	.slaves		= omap34xx_l4_per_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap34xx_l4_per_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};

/* Slave interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = {
	&omap34xx_l4_core__l4_wkup,
};

/* Master interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = {
};

/* L4 WKUP */
static struct omap_hwmod omap34xx_l4_wkup_hwmod = {
	.name		= "l4_wkup_hwmod",
	.masters	= omap34xx_l4_wkup_masters,
	.masters_cnt	= ARRAY_SIZE(omap34xx_l4_wkup_masters),
	.slaves		= omap34xx_l4_wkup_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap34xx_l4_wkup_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};

/* Master interfaces on the MPU device */
static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = {
	&omap34xx_mpu__l3,
};

/* MPU */
static struct omap_hwmod omap34xx_mpu_hwmod = {
	.name		= "mpu_hwmod",
	.clkdev_dev_id	= NULL,
	.clkdev_con_id	= "arm_fck",
	.masters	= omap34xx_mpu_masters,
	.masters_cnt	= ARRAY_SIZE(omap34xx_mpu_masters),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};

static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
	&omap34xx_l3_hwmod,
	&omap34xx_l4_core_hwmod,
	&omap34xx_l4_per_hwmod,
	&omap34xx_l4_wkup_hwmod,
	&omap34xx_mpu_hwmod,
	NULL,
};

#else
# define omap34xx_hwmods		0
#endif

#endif
Commit	Line	Data
02bfc030 PW	1	/*
	2	* omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips
	3	*
	4	* Copyright (C) 2009 Nokia Corporation
	5	* Paul Walmsley
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	*/
	12	#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
	13	#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
	14
a8eb7ca0	15	#ifdef CONFIG_ARCH_OMAP3
02bfc030	16
ce491cf8	17	#include <plat/omap_hwmod.h>
02bfc030	18	#include <mach/irqs.h>
ce491cf8 TL	19	#include <plat/cpu.h>
ce491cf8 TL	20	#include <plat/dma.h>
02bfc030 PW	21
	22	#include "prm-regbits-34xx.h"
	23
	24	static struct omap_hwmod omap34xx_mpu_hwmod;
	25	static struct omap_hwmod omap34xx_l3_hwmod;
	26	static struct omap_hwmod omap34xx_l4_core_hwmod;
	27	static struct omap_hwmod omap34xx_l4_per_hwmod;
	28
	29	/* L3 -> L4_CORE interface */
	30	static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = {
	31	.master = &omap34xx_l3_hwmod,
	32	.slave = &omap34xx_l4_core_hwmod,
	33	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	34	};
	35
	36	/* L3 -> L4_PER interface */
	37	static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = {
	38	.master = &omap34xx_l3_hwmod,
	39	.slave = &omap34xx_l4_per_hwmod,
	40	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	41	};
	42
	43	/* MPU -> L3 interface */
	44	static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = {
	45	.master = &omap34xx_mpu_hwmod,
	46	.slave = &omap34xx_l3_hwmod,
	47	.user = OCP_USER_MPU,
	48	};
	49
	50	/* Slave interfaces on the L3 interconnect */
	51	static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = {
	52	&omap34xx_mpu__l3,
	53	};
	54
	55	/* Master interfaces on the L3 interconnect */
	56	static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = {
	57	&omap34xx_l3__l4_core,
	58	&omap34xx_l3__l4_per,
	59	};
	60
	61	/* L3 */
	62	static struct omap_hwmod omap34xx_l3_hwmod = {
	63	.name = "l3_hwmod",
	64	.masters = omap34xx_l3_masters,
	65	.masters_cnt = ARRAY_SIZE(omap34xx_l3_masters),
	66	.slaves = omap34xx_l3_slaves,
	67	.slaves_cnt = ARRAY_SIZE(omap34xx_l3_slaves),
	68	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
	69	};
	70
	71	static struct omap_hwmod omap34xx_l4_wkup_hwmod;
	72
	73	/* L4_CORE -> L4_WKUP interface */
	74	static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
	75	.master = &omap34xx_l4_core_hwmod,
	76	.slave = &omap34xx_l4_wkup_hwmod,
	77	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	78	};
	79
	80	/* Slave interfaces on the L4_CORE interconnect */
	81	static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
	82	&omap34xx_l3__l4_core,
	83	};
	84
85	/* Master interfaces on the L4_CORE interconnect */
86	static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = {
87	&omap34xx_l4_core__l4_wkup,
88	};
89
90	/* L4 CORE */
91	static struct omap_hwmod omap34xx_l4_core_hwmod = {
92	.name = "l4_core_hwmod",
93	.masters = omap34xx_l4_core_masters,
94	.masters_cnt = ARRAY_SIZE(omap34xx_l4_core_masters),
95	.slaves = omap34xx_l4_core_slaves,
96	.slaves_cnt = ARRAY_SIZE(omap34xx_l4_core_slaves),
97	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
98	};
99
100	/* Slave interfaces on the L4_PER interconnect */
101	static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = {
102	&omap34xx_l3__l4_per,
103	};
104
105	/* Master interfaces on the L4_PER interconnect */
106	static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = {
107	};
108
109	/* L4 PER */
110	static struct omap_hwmod omap34xx_l4_per_hwmod = {
111	.name = "l4_per_hwmod",
112	.masters = omap34xx_l4_per_masters,
113	.masters_cnt = ARRAY_SIZE(omap34xx_l4_per_masters),
114	.slaves = omap34xx_l4_per_slaves,
115	.slaves_cnt = ARRAY_SIZE(omap34xx_l4_per_slaves),
116	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
117	};
118
119	/* Slave interfaces on the L4_WKUP interconnect */
120	static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = {
121	&omap34xx_l4_core__l4_wkup,
122	};
123
124	/* Master interfaces on the L4_WKUP interconnect */
125	static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = {
126	};
127
128	/* L4 WKUP */
129	static struct omap_hwmod omap34xx_l4_wkup_hwmod = {
130	.name = "l4_wkup_hwmod",
131	.masters = omap34xx_l4_wkup_masters,
132	.masters_cnt = ARRAY_SIZE(omap34xx_l4_wkup_masters),
133	.slaves = omap34xx_l4_wkup_slaves,
134	.slaves_cnt = ARRAY_SIZE(omap34xx_l4_wkup_slaves),
135	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
136	};
137
138	/* Master interfaces on the MPU device */
139	static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = {
140	&omap34xx_mpu__l3,
141	};
142
143	/* MPU */
144	static struct omap_hwmod omap34xx_mpu_hwmod = {
145	.name = "mpu_hwmod",
146	.clkdev_dev_id = NULL,
147	.clkdev_con_id = "arm_fck",
148	.masters = omap34xx_mpu_masters,
149	.masters_cnt = ARRAY_SIZE(omap34xx_mpu_masters),
150	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
151	};
152
153	static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
154	&omap34xx_l3_hwmod,
155	&omap34xx_l4_core_hwmod,
156	&omap34xx_l4_per_hwmod,
157	&omap34xx_l4_wkup_hwmod,
158	&omap34xx_mpu_hwmod,
159	NULL,
160	};
161
162	#else
163	# define omap34xx_hwmods 0
164	#endif
165
166	#endif
167
168