]>
Commit | Line | Data |
---|---|---|
63138812 KV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/board-n8x0.c | |
3 | * | |
4 | * Copyright (C) 2005-2009 Nokia Corporation | |
5 | * Author: Juha Yrjola <juha.yrjola@nokia.com> | |
6 | * | |
7 | * Modified from mach-omap2/board-generic.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/clk.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/gpio.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/io.h> | |
19 | #include <linux/stddef.h> | |
9418c65f | 20 | #include <linux/i2c.h> |
63138812 KV |
21 | #include <linux/spi/spi.h> |
22 | #include <linux/usb/musb.h> | |
23 | ||
24 | #include <asm/mach/arch.h> | |
25 | #include <asm/mach-types.h> | |
26 | ||
ce491cf8 TL |
27 | #include <plat/board.h> |
28 | #include <plat/common.h> | |
9418c65f | 29 | #include <plat/menelaus.h> |
63138812 | 30 | #include <mach/irqs.h> |
ce491cf8 TL |
31 | #include <plat/mcspi.h> |
32 | #include <plat/onenand.h> | |
9418c65f | 33 | #include <plat/mmc.h> |
ce491cf8 | 34 | #include <plat/serial.h> |
63138812 | 35 | |
bd8f0fc9 TL |
36 | #include "mux.h" |
37 | ||
9418c65f TL |
38 | static int slot1_cover_open; |
39 | static int slot2_cover_open; | |
40 | static struct device *mmc_device; | |
41 | ||
97b9ad16 FA |
42 | #define TUSB6010_ASYNC_CS 1 |
43 | #define TUSB6010_SYNC_CS 4 | |
44 | #define TUSB6010_GPIO_INT 58 | |
45 | #define TUSB6010_GPIO_ENABLE 0 | |
46 | #define TUSB6010_DMACHAN 0x3f | |
47 | ||
48 | #if defined(CONFIG_USB_TUSB6010) || \ | |
49 | defined(CONFIG_USB_TUSB6010_MODULE) | |
50 | /* | |
51 | * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and | |
52 | * 1.5 V voltage regulators of PM companion chip. Companion chip will then | |
53 | * provide then PGOOD signal to TUSB6010 which will release it from reset. | |
54 | */ | |
55 | static int tusb_set_power(int state) | |
56 | { | |
57 | int i, retval = 0; | |
58 | ||
59 | if (state) { | |
60 | gpio_set_value(TUSB6010_GPIO_ENABLE, 1); | |
61 | msleep(1); | |
62 | ||
63 | /* Wait until TUSB6010 pulls INT pin down */ | |
64 | i = 100; | |
65 | while (i && gpio_get_value(TUSB6010_GPIO_INT)) { | |
66 | msleep(1); | |
67 | i--; | |
68 | } | |
69 | ||
70 | if (!i) { | |
71 | printk(KERN_ERR "tusb: powerup failed\n"); | |
72 | retval = -ENODEV; | |
73 | } | |
74 | } else { | |
75 | gpio_set_value(TUSB6010_GPIO_ENABLE, 0); | |
76 | msleep(10); | |
77 | } | |
78 | ||
79 | return retval; | |
80 | } | |
81 | ||
82 | static struct musb_hdrc_config musb_config = { | |
83 | .multipoint = 1, | |
84 | .dyn_fifo = 1, | |
85 | .num_eps = 16, | |
86 | .ram_bits = 12, | |
87 | }; | |
88 | ||
89 | static struct musb_hdrc_platform_data tusb_data = { | |
90 | #if defined(CONFIG_USB_MUSB_OTG) | |
91 | .mode = MUSB_OTG, | |
92 | #elif defined(CONFIG_USB_MUSB_PERIPHERAL) | |
93 | .mode = MUSB_PERIPHERAL, | |
94 | #else /* defined(CONFIG_USB_MUSB_HOST) */ | |
95 | .mode = MUSB_HOST, | |
96 | #endif | |
97 | .set_power = tusb_set_power, | |
98 | .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */ | |
99 | .power = 100, /* Max 100 mA VBUS for host mode */ | |
100 | .config = &musb_config, | |
101 | }; | |
102 | ||
103 | static void __init n8x0_usb_init(void) | |
104 | { | |
105 | int ret = 0; | |
106 | static char announce[] __initdata = KERN_INFO "TUSB 6010\n"; | |
107 | ||
108 | /* PM companion chip power control pin */ | |
109 | ret = gpio_request(TUSB6010_GPIO_ENABLE, "TUSB6010 enable"); | |
110 | if (ret != 0) { | |
111 | printk(KERN_ERR "Could not get TUSB power GPIO%i\n", | |
112 | TUSB6010_GPIO_ENABLE); | |
113 | return; | |
114 | } | |
115 | gpio_direction_output(TUSB6010_GPIO_ENABLE, 0); | |
116 | ||
117 | tusb_set_power(0); | |
118 | ||
119 | ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2, | |
120 | TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS, | |
121 | TUSB6010_GPIO_INT, TUSB6010_DMACHAN); | |
122 | if (ret != 0) | |
123 | goto err; | |
124 | ||
125 | printk(announce); | |
126 | ||
127 | return; | |
128 | ||
129 | err: | |
130 | gpio_free(TUSB6010_GPIO_ENABLE); | |
131 | } | |
132 | #else | |
133 | ||
134 | static void __init n8x0_usb_init(void) {} | |
135 | ||
136 | #endif /*CONFIG_USB_TUSB6010 */ | |
137 | ||
138 | ||
63138812 KV |
139 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
140 | .turbo_mode = 0, | |
141 | .single_channel = 1, | |
142 | }; | |
143 | ||
144 | static struct spi_board_info n800_spi_board_info[] __initdata = { | |
145 | { | |
146 | .modalias = "p54spi", | |
147 | .bus_num = 2, | |
148 | .chip_select = 0, | |
149 | .max_speed_hz = 48000000, | |
150 | .controller_data = &p54spi_mcspi_config, | |
151 | }, | |
152 | }; | |
153 | ||
154 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ | |
155 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
156 | ||
157 | static struct mtd_partition onenand_partitions[] = { | |
158 | { | |
159 | .name = "bootloader", | |
160 | .offset = 0, | |
161 | .size = 0x20000, | |
162 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
163 | }, | |
164 | { | |
165 | .name = "config", | |
166 | .offset = MTDPART_OFS_APPEND, | |
167 | .size = 0x60000, | |
168 | }, | |
169 | { | |
170 | .name = "kernel", | |
171 | .offset = MTDPART_OFS_APPEND, | |
172 | .size = 0x200000, | |
173 | }, | |
174 | { | |
175 | .name = "initfs", | |
176 | .offset = MTDPART_OFS_APPEND, | |
177 | .size = 0x400000, | |
178 | }, | |
179 | { | |
180 | .name = "rootfs", | |
181 | .offset = MTDPART_OFS_APPEND, | |
182 | .size = MTDPART_SIZ_FULL, | |
183 | }, | |
184 | }; | |
185 | ||
186 | static struct omap_onenand_platform_data board_onenand_data = { | |
187 | .cs = 0, | |
188 | .gpio_irq = 26, | |
189 | .parts = onenand_partitions, | |
190 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
191 | .flags = ONENAND_SYNC_READ, | |
192 | }; | |
193 | ||
194 | static void __init n8x0_onenand_init(void) | |
195 | { | |
196 | gpmc_onenand_init(&board_onenand_data); | |
197 | } | |
198 | ||
199 | #else | |
200 | ||
201 | static void __init n8x0_onenand_init(void) {} | |
202 | ||
203 | #endif | |
204 | ||
9418c65f TL |
205 | #if defined(CONFIG_MENELAUS) && \ |
206 | (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)) | |
207 | ||
208 | /* | |
209 | * On both N800 and N810, only the first of the two MMC controllers is in use. | |
210 | * The two MMC slots are multiplexed via Menelaus companion chip over I2C. | |
211 | * On N800, both slots are powered via Menelaus. On N810, only one of the | |
212 | * slots is powered via Menelaus. The N810 EMMC is powered via GPIO. | |
213 | * | |
214 | * VMMC slot 1 on both N800 and N810 | |
215 | * VDCDC3_APE and VMCS2_APE slot 2 on N800 | |
216 | * GPIO23 and GPIO9 slot 2 EMMC on N810 | |
217 | * | |
218 | */ | |
219 | #define N8X0_SLOT_SWITCH_GPIO 96 | |
220 | #define N810_EMMC_VSD_GPIO 23 | |
1dea5c6b | 221 | #define N810_EMMC_VIO_GPIO 9 |
9418c65f TL |
222 | |
223 | static int n8x0_mmc_switch_slot(struct device *dev, int slot) | |
224 | { | |
225 | #ifdef CONFIG_MMC_DEBUG | |
226 | dev_dbg(dev, "Choose slot %d\n", slot + 1); | |
227 | #endif | |
228 | gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); | |
229 | return 0; | |
230 | } | |
231 | ||
232 | static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, | |
233 | int power_on, int vdd) | |
234 | { | |
235 | int mV; | |
236 | ||
237 | #ifdef CONFIG_MMC_DEBUG | |
238 | dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, | |
239 | power_on ? "on" : "off", vdd); | |
240 | #endif | |
241 | if (slot == 0) { | |
242 | if (!power_on) | |
243 | return menelaus_set_vmmc(0); | |
244 | switch (1 << vdd) { | |
245 | case MMC_VDD_33_34: | |
246 | case MMC_VDD_32_33: | |
247 | case MMC_VDD_31_32: | |
248 | mV = 3100; | |
249 | break; | |
250 | case MMC_VDD_30_31: | |
251 | mV = 3000; | |
252 | break; | |
253 | case MMC_VDD_28_29: | |
254 | mV = 2800; | |
255 | break; | |
256 | case MMC_VDD_165_195: | |
257 | mV = 1850; | |
258 | break; | |
259 | default: | |
260 | BUG(); | |
261 | } | |
262 | return menelaus_set_vmmc(mV); | |
263 | } else { | |
264 | if (!power_on) | |
265 | return menelaus_set_vdcdc(3, 0); | |
266 | switch (1 << vdd) { | |
267 | case MMC_VDD_33_34: | |
268 | case MMC_VDD_32_33: | |
269 | mV = 3300; | |
270 | break; | |
271 | case MMC_VDD_30_31: | |
272 | case MMC_VDD_29_30: | |
273 | mV = 3000; | |
274 | break; | |
275 | case MMC_VDD_28_29: | |
276 | case MMC_VDD_27_28: | |
277 | mV = 2800; | |
278 | break; | |
279 | case MMC_VDD_24_25: | |
280 | case MMC_VDD_23_24: | |
281 | mV = 2400; | |
282 | break; | |
283 | case MMC_VDD_22_23: | |
284 | case MMC_VDD_21_22: | |
285 | mV = 2200; | |
286 | break; | |
287 | case MMC_VDD_20_21: | |
288 | mV = 2000; | |
289 | break; | |
290 | case MMC_VDD_165_195: | |
291 | mV = 1800; | |
292 | break; | |
293 | default: | |
294 | BUG(); | |
295 | } | |
296 | return menelaus_set_vdcdc(3, mV); | |
297 | } | |
298 | return 0; | |
299 | } | |
300 | ||
301 | static void n810_set_power_emmc(struct device *dev, | |
302 | int power_on) | |
303 | { | |
304 | dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off"); | |
305 | ||
306 | if (power_on) { | |
307 | gpio_set_value(N810_EMMC_VSD_GPIO, 1); | |
308 | msleep(1); | |
1dea5c6b | 309 | gpio_set_value(N810_EMMC_VIO_GPIO, 1); |
9418c65f TL |
310 | msleep(1); |
311 | } else { | |
1dea5c6b | 312 | gpio_set_value(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
313 | msleep(50); |
314 | gpio_set_value(N810_EMMC_VSD_GPIO, 0); | |
315 | msleep(50); | |
316 | } | |
317 | } | |
318 | ||
319 | static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, | |
320 | int vdd) | |
321 | { | |
322 | if (machine_is_nokia_n800() || slot == 0) | |
323 | return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); | |
324 | ||
325 | n810_set_power_emmc(dev, power_on); | |
326 | ||
327 | return 0; | |
328 | } | |
329 | ||
330 | static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) | |
331 | { | |
332 | int r; | |
333 | ||
334 | dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1, | |
335 | bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull"); | |
336 | BUG_ON(slot != 0 && slot != 1); | |
337 | slot++; | |
338 | switch (bus_mode) { | |
339 | case MMC_BUSMODE_OPENDRAIN: | |
340 | r = menelaus_set_mmc_opendrain(slot, 1); | |
341 | break; | |
342 | case MMC_BUSMODE_PUSHPULL: | |
343 | r = menelaus_set_mmc_opendrain(slot, 0); | |
344 | break; | |
345 | default: | |
346 | BUG(); | |
347 | } | |
348 | if (r != 0 && printk_ratelimit()) | |
349 | dev_err(dev, "MMC: unable to set bus mode for slot %d\n", | |
350 | slot); | |
351 | return r; | |
352 | } | |
353 | ||
354 | static int n8x0_mmc_get_cover_state(struct device *dev, int slot) | |
355 | { | |
356 | slot++; | |
357 | BUG_ON(slot != 1 && slot != 2); | |
358 | if (slot == 1) | |
359 | return slot1_cover_open; | |
360 | else | |
361 | return slot2_cover_open; | |
362 | } | |
363 | ||
364 | static void n8x0_mmc_callback(void *data, u8 card_mask) | |
365 | { | |
366 | int bit, *openp, index; | |
367 | ||
368 | if (machine_is_nokia_n800()) { | |
369 | bit = 1 << 1; | |
370 | openp = &slot2_cover_open; | |
371 | index = 1; | |
372 | } else { | |
373 | bit = 1; | |
374 | openp = &slot1_cover_open; | |
375 | index = 0; | |
376 | } | |
377 | ||
378 | if (card_mask & bit) | |
379 | *openp = 1; | |
380 | else | |
381 | *openp = 0; | |
382 | ||
383 | omap_mmc_notify_cover_event(mmc_device, index, *openp); | |
384 | } | |
385 | ||
386 | void n8x0_mmc_slot1_cover_handler(void *arg, int closed_state) | |
387 | { | |
388 | if (mmc_device == NULL) | |
389 | return; | |
390 | ||
391 | slot1_cover_open = !closed_state; | |
392 | omap_mmc_notify_cover_event(mmc_device, 0, closed_state); | |
393 | } | |
394 | ||
395 | static int n8x0_mmc_late_init(struct device *dev) | |
396 | { | |
397 | int r, bit, *openp; | |
398 | int vs2sel; | |
399 | ||
400 | mmc_device = dev; | |
401 | ||
402 | r = menelaus_set_slot_sel(1); | |
403 | if (r < 0) | |
404 | return r; | |
405 | ||
406 | if (machine_is_nokia_n800()) | |
407 | vs2sel = 0; | |
408 | else | |
409 | vs2sel = 2; | |
410 | ||
411 | r = menelaus_set_mmc_slot(2, 0, vs2sel, 1); | |
412 | if (r < 0) | |
413 | return r; | |
414 | ||
415 | n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */ | |
416 | n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16); | |
417 | ||
418 | r = menelaus_set_mmc_slot(1, 1, 0, 1); | |
419 | if (r < 0) | |
420 | return r; | |
421 | r = menelaus_set_mmc_slot(2, 1, vs2sel, 1); | |
422 | if (r < 0) | |
423 | return r; | |
424 | ||
425 | r = menelaus_get_slot_pin_states(); | |
426 | if (r < 0) | |
427 | return r; | |
428 | ||
429 | if (machine_is_nokia_n800()) { | |
430 | bit = 1 << 1; | |
431 | openp = &slot2_cover_open; | |
432 | } else { | |
433 | bit = 1; | |
434 | openp = &slot1_cover_open; | |
435 | slot2_cover_open = 0; | |
436 | } | |
437 | ||
438 | /* All slot pin bits seem to be inversed until first switch change */ | |
439 | if (r == 0xf || r == (0xf & ~bit)) | |
440 | r = ~r; | |
441 | ||
442 | if (r & bit) | |
443 | *openp = 1; | |
444 | else | |
445 | *openp = 0; | |
446 | ||
447 | r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL); | |
448 | ||
449 | return r; | |
450 | } | |
451 | ||
452 | static void n8x0_mmc_shutdown(struct device *dev) | |
453 | { | |
454 | int vs2sel; | |
455 | ||
456 | if (machine_is_nokia_n800()) | |
457 | vs2sel = 0; | |
458 | else | |
459 | vs2sel = 2; | |
460 | ||
461 | menelaus_set_mmc_slot(1, 0, 0, 0); | |
462 | menelaus_set_mmc_slot(2, 0, vs2sel, 0); | |
463 | } | |
464 | ||
465 | static void n8x0_mmc_cleanup(struct device *dev) | |
466 | { | |
467 | menelaus_unregister_mmc_callback(); | |
468 | ||
469 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
470 | ||
471 | if (machine_is_nokia_n810()) { | |
472 | gpio_free(N810_EMMC_VSD_GPIO); | |
1dea5c6b | 473 | gpio_free(N810_EMMC_VIO_GPIO); |
9418c65f TL |
474 | } |
475 | } | |
476 | ||
477 | /* | |
478 | * MMC controller1 has two slots that are multiplexed via I2C. | |
479 | * MMC controller2 is not in use. | |
480 | */ | |
481 | static struct omap_mmc_platform_data mmc1_data = { | |
482 | .nr_slots = 2, | |
483 | .switch_slot = n8x0_mmc_switch_slot, | |
484 | .init = n8x0_mmc_late_init, | |
485 | .cleanup = n8x0_mmc_cleanup, | |
486 | .shutdown = n8x0_mmc_shutdown, | |
487 | .max_freq = 24000000, | |
488 | .dma_mask = 0xffffffff, | |
489 | .slots[0] = { | |
490 | .wires = 4, | |
491 | .set_power = n8x0_mmc_set_power, | |
492 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
493 | .get_cover_state = n8x0_mmc_get_cover_state, | |
494 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 | | |
495 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
496 | .name = "internal", | |
497 | }, | |
498 | .slots[1] = { | |
499 | .set_power = n8x0_mmc_set_power, | |
500 | .set_bus_mode = n8x0_mmc_set_bus_mode, | |
501 | .get_cover_state = n8x0_mmc_get_cover_state, | |
502 | .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 | | |
503 | MMC_VDD_21_22 | MMC_VDD_22_23 | | |
504 | MMC_VDD_23_24 | MMC_VDD_24_25 | | |
505 | MMC_VDD_27_28 | MMC_VDD_28_29 | | |
506 | MMC_VDD_29_30 | MMC_VDD_30_31 | | |
507 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
508 | .name = "external", | |
509 | }, | |
510 | }; | |
511 | ||
512 | static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC]; | |
513 | ||
514 | void __init n8x0_mmc_init(void) | |
515 | ||
516 | { | |
517 | int err; | |
518 | ||
519 | if (machine_is_nokia_n810()) { | |
520 | mmc1_data.slots[0].name = "external"; | |
521 | ||
522 | /* | |
523 | * Some Samsung Movinand chips do not like open-ended | |
524 | * multi-block reads and fall to braind-dead state | |
525 | * while doing so. Reducing the number of blocks in | |
526 | * the transfer or delays in clock disable do not help | |
527 | */ | |
528 | mmc1_data.slots[1].name = "internal"; | |
529 | mmc1_data.slots[1].ban_openended = 1; | |
530 | } | |
531 | ||
532 | err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch"); | |
533 | if (err) | |
1dea5c6b | 534 | return; |
9418c65f TL |
535 | |
536 | gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0); | |
537 | ||
538 | if (machine_is_nokia_n810()) { | |
539 | err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf"); | |
540 | if (err) { | |
541 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
1dea5c6b | 542 | return; |
9418c65f TL |
543 | } |
544 | gpio_direction_output(N810_EMMC_VSD_GPIO, 0); | |
545 | ||
1dea5c6b | 546 | err = gpio_request(N810_EMMC_VIO_GPIO, "MMC slot 2 Vdd"); |
9418c65f TL |
547 | if (err) { |
548 | gpio_free(N8X0_SLOT_SWITCH_GPIO); | |
549 | gpio_free(N810_EMMC_VSD_GPIO); | |
1dea5c6b | 550 | return; |
9418c65f | 551 | } |
1dea5c6b | 552 | gpio_direction_output(N810_EMMC_VIO_GPIO, 0); |
9418c65f TL |
553 | } |
554 | ||
555 | mmc_data[0] = &mmc1_data; | |
556 | omap2_init_mmc(mmc_data, OMAP24XX_NR_MMC); | |
557 | } | |
558 | #else | |
559 | ||
560 | void __init n8x0_mmc_init(void) | |
561 | { | |
562 | } | |
563 | ||
564 | void n8x0_mmc_slot1_cover_handler(void *arg, int state) | |
565 | { | |
566 | } | |
567 | ||
568 | #endif /* CONFIG_MMC_OMAP */ | |
569 | ||
570 | #ifdef CONFIG_MENELAUS | |
571 | ||
572 | static int n8x0_auto_sleep_regulators(void) | |
573 | { | |
574 | u32 val; | |
575 | int ret; | |
576 | ||
577 | val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \ | |
578 | | EN_VAUX_SLEEP | EN_VIO_SLEEP \ | |
579 | | EN_VMEM_SLEEP | EN_DC3_SLEEP \ | |
580 | | EN_VC_SLEEP | EN_DC2_SLEEP; | |
581 | ||
582 | ret = menelaus_set_regulator_sleep(1, val); | |
583 | if (ret < 0) { | |
584 | printk(KERN_ERR "Could not set regulators to sleep on " | |
585 | "menelaus: %u\n", ret); | |
586 | return ret; | |
587 | } | |
588 | return 0; | |
589 | } | |
590 | ||
591 | static int n8x0_auto_voltage_scale(void) | |
592 | { | |
593 | int ret; | |
594 | ||
595 | ret = menelaus_set_vcore_hw(1400, 1050); | |
596 | if (ret < 0) { | |
597 | printk(KERN_ERR "Could not set VCORE voltage on " | |
598 | "menelaus: %u\n", ret); | |
599 | return ret; | |
600 | } | |
601 | return 0; | |
602 | } | |
603 | ||
604 | static int n8x0_menelaus_late_init(struct device *dev) | |
605 | { | |
606 | int ret; | |
607 | ||
608 | ret = n8x0_auto_voltage_scale(); | |
609 | if (ret < 0) | |
610 | return ret; | |
611 | ret = n8x0_auto_sleep_regulators(); | |
612 | if (ret < 0) | |
613 | return ret; | |
614 | return 0; | |
615 | } | |
616 | ||
617 | static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] = { | |
618 | { | |
619 | I2C_BOARD_INFO("menelaus", 0x72), | |
620 | .irq = INT_24XX_SYS_NIRQ, | |
621 | }, | |
622 | }; | |
623 | ||
624 | static struct menelaus_platform_data n8x0_menelaus_platform_data = { | |
625 | .late_init = n8x0_menelaus_late_init, | |
626 | }; | |
627 | ||
628 | static void __init n8x0_menelaus_init(void) | |
629 | { | |
630 | n8x0_i2c_board_info_1[0].platform_data = &n8x0_menelaus_platform_data; | |
631 | omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1, | |
632 | ARRAY_SIZE(n8x0_i2c_board_info_1)); | |
633 | } | |
634 | ||
635 | #else | |
636 | static inline void __init n8x0_menelaus_init(void) | |
637 | { | |
638 | } | |
639 | #endif | |
640 | ||
63138812 KV |
641 | static void __init n8x0_map_io(void) |
642 | { | |
643 | omap2_set_globals_242x(); | |
6fbd55d0 | 644 | omap242x_map_common_io(); |
63138812 KV |
645 | } |
646 | ||
647 | static void __init n8x0_init_irq(void) | |
648 | { | |
649 | omap2_init_common_hw(NULL, NULL); | |
650 | omap_init_irq(); | |
651 | omap_gpio_init(); | |
652 | } | |
653 | ||
bd8f0fc9 TL |
654 | #ifdef CONFIG_OMAP_MUX |
655 | static struct omap_board_mux board_mux[] __initdata = { | |
656 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
657 | }; | |
658 | #else | |
659 | #define board_mux NULL | |
660 | #endif | |
661 | ||
63138812 KV |
662 | static void __init n8x0_init_machine(void) |
663 | { | |
bd8f0fc9 | 664 | omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC); |
63138812 KV |
665 | /* FIXME: add n810 spi devices */ |
666 | spi_register_board_info(n800_spi_board_info, | |
667 | ARRAY_SIZE(n800_spi_board_info)); | |
668 | ||
669 | omap_serial_init(); | |
9418c65f | 670 | n8x0_menelaus_init(); |
63138812 | 671 | n8x0_onenand_init(); |
9418c65f | 672 | n8x0_mmc_init(); |
97b9ad16 | 673 | n8x0_usb_init(); |
63138812 KV |
674 | } |
675 | ||
676 | MACHINE_START(NOKIA_N800, "Nokia N800") | |
677 | .phys_io = 0x48000000, | |
b4224b23 | 678 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
63138812 KV |
679 | .boot_params = 0x80000100, |
680 | .map_io = n8x0_map_io, | |
681 | .init_irq = n8x0_init_irq, | |
682 | .init_machine = n8x0_init_machine, | |
683 | .timer = &omap_timer, | |
684 | MACHINE_END | |
685 | ||
686 | MACHINE_START(NOKIA_N810, "Nokia N810") | |
687 | .phys_io = 0x48000000, | |
b4224b23 | 688 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
63138812 KV |
689 | .boot_params = 0x80000100, |
690 | .map_io = n8x0_map_io, | |
691 | .init_irq = n8x0_init_irq, | |
692 | .init_machine = n8x0_init_machine, | |
693 | .timer = &omap_timer, | |
694 | MACHINE_END | |
695 | ||
696 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | |
697 | .phys_io = 0x48000000, | |
b4224b23 | 698 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
63138812 KV |
699 | .boot_params = 0x80000100, |
700 | .map_io = n8x0_map_io, | |
701 | .init_irq = n8x0_init_irq, | |
702 | .init_machine = n8x0_init_machine, | |
703 | .timer = &omap_timer, | |
704 | MACHINE_END |