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1 | /* |
2 | * linux/arch/arm/mach-omap2/board-3430sdp.c | |
3 | * | |
4 | * Copyright (C) 2007 Texas Instruments | |
5 | * | |
6 | * Modified from mach-omap2/board-generic.c | |
7 | * | |
8 | * Initial code: Syed Mohammed Khasim | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/input.h> | |
6135434a | 20 | #include <linux/input/matrix_keypad.h> |
6fdc29e2 SMK |
21 | #include <linux/spi/spi.h> |
22 | #include <linux/spi/ads7846.h> | |
b07682b6 | 23 | #include <linux/i2c/twl.h> |
6fdc29e2 SMK |
24 | #include <linux/regulator/machine.h> |
25 | #include <linux/io.h> | |
26 | #include <linux/gpio.h> | |
27 | ||
28 | #include <mach/hardware.h> | |
29 | #include <asm/mach-types.h> | |
30 | #include <asm/mach/arch.h> | |
31 | #include <asm/mach/map.h> | |
32 | ||
ce491cf8 | 33 | #include <plat/mcspi.h> |
ce491cf8 TL |
34 | #include <plat/board.h> |
35 | #include <plat/usb.h> | |
36 | #include <plat/common.h> | |
37 | #include <plat/dma.h> | |
38 | #include <plat/gpmc.h> | |
d9056ce2 | 39 | #include <plat/display.h> |
6fdc29e2 | 40 | |
ce491cf8 | 41 | #include <plat/control.h> |
ce491cf8 | 42 | #include <plat/gpmc-smc91x.h> |
6fdc29e2 | 43 | |
88c8460a VS |
44 | #include <mach/board-sdp.h> |
45 | ||
ca5742bd | 46 | #include "mux.h" |
17a722ca | 47 | #include "sdram-qimonda-hyb18m512160af-6.h" |
d02a900b | 48 | #include "hsmmc.h" |
6fdc29e2 SMK |
49 | |
50 | #define CONFIG_DISABLE_HFCLK 1 | |
51 | ||
6fdc29e2 SMK |
52 | #define SDP3430_TS_GPIO_IRQ_SDPV1 3 |
53 | #define SDP3430_TS_GPIO_IRQ_SDPV2 2 | |
54 | ||
55 | #define ENABLE_VAUX3_DEDICATED 0x03 | |
56 | #define ENABLE_VAUX3_DEV_GRP 0x20 | |
57 | ||
58 | #define TWL4030_MSECURE_GPIO 22 | |
59 | ||
4f543332 | 60 | static int board_keymap[] = { |
6fdc29e2 SMK |
61 | KEY(0, 0, KEY_LEFT), |
62 | KEY(0, 1, KEY_RIGHT), | |
63 | KEY(0, 2, KEY_A), | |
64 | KEY(0, 3, KEY_B), | |
65 | KEY(0, 4, KEY_C), | |
66 | KEY(1, 0, KEY_DOWN), | |
67 | KEY(1, 1, KEY_UP), | |
68 | KEY(1, 2, KEY_E), | |
69 | KEY(1, 3, KEY_F), | |
70 | KEY(1, 4, KEY_G), | |
71 | KEY(2, 0, KEY_ENTER), | |
72 | KEY(2, 1, KEY_I), | |
73 | KEY(2, 2, KEY_J), | |
74 | KEY(2, 3, KEY_K), | |
75 | KEY(2, 4, KEY_3), | |
76 | KEY(3, 0, KEY_M), | |
77 | KEY(3, 1, KEY_N), | |
78 | KEY(3, 2, KEY_O), | |
79 | KEY(3, 3, KEY_P), | |
80 | KEY(3, 4, KEY_Q), | |
81 | KEY(4, 0, KEY_R), | |
82 | KEY(4, 1, KEY_4), | |
83 | KEY(4, 2, KEY_T), | |
84 | KEY(4, 3, KEY_U), | |
85 | KEY(4, 4, KEY_D), | |
86 | KEY(5, 0, KEY_V), | |
87 | KEY(5, 1, KEY_W), | |
88 | KEY(5, 2, KEY_L), | |
89 | KEY(5, 3, KEY_S), | |
90 | KEY(5, 4, KEY_H), | |
91 | 0 | |
92 | }; | |
93 | ||
4f543332 TL |
94 | static struct matrix_keymap_data board_map_data = { |
95 | .keymap = board_keymap, | |
96 | .keymap_size = ARRAY_SIZE(board_keymap), | |
97 | }; | |
98 | ||
6fdc29e2 | 99 | static struct twl4030_keypad_data sdp3430_kp_data = { |
4f543332 | 100 | .keymap_data = &board_map_data, |
6fdc29e2 SMK |
101 | .rows = 5, |
102 | .cols = 6, | |
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103 | .rep = 1, |
104 | }; | |
105 | ||
106 | static int ts_gpio; /* Needed for ads7846_get_pendown_state */ | |
107 | ||
108 | /** | |
109 | * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq | |
110 | * | |
111 | * @return - void. If request gpio fails then Flag KERN_ERR. | |
112 | */ | |
113 | static void ads7846_dev_init(void) | |
114 | { | |
115 | if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) { | |
116 | printk(KERN_ERR "can't get ads746 pen down GPIO\n"); | |
117 | return; | |
118 | } | |
119 | ||
120 | gpio_direction_input(ts_gpio); | |
121 | ||
122 | omap_set_gpio_debounce(ts_gpio, 1); | |
123 | omap_set_gpio_debounce_time(ts_gpio, 0xa); | |
124 | } | |
125 | ||
126 | static int ads7846_get_pendown_state(void) | |
127 | { | |
128 | return !gpio_get_value(ts_gpio); | |
129 | } | |
130 | ||
131 | static struct ads7846_platform_data tsc2046_config __initdata = { | |
132 | .get_pendown_state = ads7846_get_pendown_state, | |
133 | .keep_vref_on = 1, | |
134 | }; | |
135 | ||
136 | ||
137 | static struct omap2_mcspi_device_config tsc2046_mcspi_config = { | |
138 | .turbo_mode = 0, | |
139 | .single_channel = 1, /* 0: slave, 1: master */ | |
140 | }; | |
141 | ||
142 | static struct spi_board_info sdp3430_spi_board_info[] __initdata = { | |
143 | [0] = { | |
144 | /* | |
145 | * TSC2046 operates at a max freqency of 2MHz, so | |
146 | * operate slightly below at 1.5MHz | |
147 | */ | |
148 | .modalias = "ads7846", | |
149 | .bus_num = 1, | |
150 | .chip_select = 0, | |
151 | .max_speed_hz = 1500000, | |
152 | .controller_data = &tsc2046_mcspi_config, | |
153 | .irq = 0, | |
154 | .platform_data = &tsc2046_config, | |
155 | }, | |
156 | }; | |
157 | ||
d9056ce2 TV |
158 | |
159 | #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8 | |
160 | #define SDP3430_LCD_PANEL_ENABLE_GPIO 5 | |
161 | ||
162 | static unsigned backlight_gpio; | |
163 | static unsigned enable_gpio; | |
164 | static int lcd_enabled; | |
165 | static int dvi_enabled; | |
166 | ||
167 | static void __init sdp3430_display_init(void) | |
168 | { | |
169 | int r; | |
170 | ||
171 | enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO; | |
172 | backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO; | |
173 | ||
174 | r = gpio_request(enable_gpio, "LCD reset"); | |
175 | if (r) { | |
176 | printk(KERN_ERR "failed to get LCD reset GPIO\n"); | |
177 | goto err0; | |
178 | } | |
179 | ||
180 | r = gpio_request(backlight_gpio, "LCD Backlight"); | |
181 | if (r) { | |
182 | printk(KERN_ERR "failed to get LCD backlight GPIO\n"); | |
183 | goto err1; | |
184 | } | |
185 | ||
186 | gpio_direction_output(enable_gpio, 0); | |
187 | gpio_direction_output(backlight_gpio, 0); | |
188 | ||
189 | return; | |
190 | err1: | |
191 | gpio_free(enable_gpio); | |
192 | err0: | |
193 | return; | |
194 | } | |
195 | ||
196 | static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev) | |
197 | { | |
198 | if (dvi_enabled) { | |
199 | printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); | |
200 | return -EINVAL; | |
201 | } | |
202 | ||
203 | gpio_direction_output(enable_gpio, 1); | |
204 | gpio_direction_output(backlight_gpio, 1); | |
205 | ||
206 | lcd_enabled = 1; | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
211 | static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev) | |
212 | { | |
213 | lcd_enabled = 0; | |
214 | ||
215 | gpio_direction_output(enable_gpio, 0); | |
216 | gpio_direction_output(backlight_gpio, 0); | |
217 | } | |
218 | ||
219 | static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev) | |
220 | { | |
221 | if (lcd_enabled) { | |
222 | printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); | |
223 | return -EINVAL; | |
224 | } | |
225 | ||
226 | dvi_enabled = 1; | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
231 | static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev) | |
232 | { | |
233 | dvi_enabled = 0; | |
234 | } | |
235 | ||
236 | static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev) | |
237 | { | |
238 | return 0; | |
239 | } | |
240 | ||
241 | static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev) | |
242 | { | |
243 | } | |
244 | ||
245 | ||
246 | static struct omap_dss_device sdp3430_lcd_device = { | |
247 | .name = "lcd", | |
248 | .driver_name = "sharp_ls_panel", | |
249 | .type = OMAP_DISPLAY_TYPE_DPI, | |
250 | .phy.dpi.data_lines = 16, | |
251 | .platform_enable = sdp3430_panel_enable_lcd, | |
252 | .platform_disable = sdp3430_panel_disable_lcd, | |
6fdc29e2 SMK |
253 | }; |
254 | ||
d9056ce2 TV |
255 | static struct omap_dss_device sdp3430_dvi_device = { |
256 | .name = "dvi", | |
257 | .driver_name = "generic_panel", | |
258 | .type = OMAP_DISPLAY_TYPE_DPI, | |
259 | .phy.dpi.data_lines = 24, | |
260 | .platform_enable = sdp3430_panel_enable_dvi, | |
261 | .platform_disable = sdp3430_panel_disable_dvi, | |
6fdc29e2 SMK |
262 | }; |
263 | ||
d9056ce2 TV |
264 | static struct omap_dss_device sdp3430_tv_device = { |
265 | .name = "tv", | |
266 | .driver_name = "venc", | |
267 | .type = OMAP_DISPLAY_TYPE_VENC, | |
268 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | |
269 | .platform_enable = sdp3430_panel_enable_tv, | |
270 | .platform_disable = sdp3430_panel_disable_tv, | |
6fdc29e2 SMK |
271 | }; |
272 | ||
d9056ce2 TV |
273 | |
274 | static struct omap_dss_device *sdp3430_dss_devices[] = { | |
6fdc29e2 | 275 | &sdp3430_lcd_device, |
d9056ce2 TV |
276 | &sdp3430_dvi_device, |
277 | &sdp3430_tv_device, | |
6fdc29e2 SMK |
278 | }; |
279 | ||
d9056ce2 TV |
280 | static struct omap_dss_board_info sdp3430_dss_data = { |
281 | .num_devices = ARRAY_SIZE(sdp3430_dss_devices), | |
282 | .devices = sdp3430_dss_devices, | |
283 | .default_device = &sdp3430_lcd_device, | |
284 | }; | |
285 | ||
286 | static struct platform_device sdp3430_dss_device = { | |
287 | .name = "omapdss", | |
288 | .id = -1, | |
289 | .dev = { | |
290 | .platform_data = &sdp3430_dss_data, | |
291 | }, | |
292 | }; | |
293 | ||
294 | static struct regulator_consumer_supply sdp3430_vdda_dac_supply = { | |
295 | .supply = "vdda_dac", | |
296 | .dev = &sdp3430_dss_device.dev, | |
297 | }; | |
298 | ||
299 | static struct platform_device *sdp3430_devices[] __initdata = { | |
300 | &sdp3430_dss_device, | |
6fdc29e2 SMK |
301 | }; |
302 | ||
303 | static struct omap_board_config_kernel sdp3430_config[] __initdata = { | |
6fdc29e2 SMK |
304 | }; |
305 | ||
b3c6df3a PW |
306 | static void __init omap_3430sdp_init_irq(void) |
307 | { | |
308 | omap_board_config = sdp3430_config; | |
309 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); | |
310 | omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); | |
311 | omap_init_irq(); | |
312 | omap_gpio_init(); | |
313 | } | |
314 | ||
6fdc29e2 SMK |
315 | static int sdp3430_batt_table[] = { |
316 | /* 0 C*/ | |
317 | 30800, 29500, 28300, 27100, | |
318 | 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | |
319 | 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | |
320 | 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | |
321 | 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | |
322 | 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | |
323 | 4040, 3910, 3790, 3670, 3550 | |
324 | }; | |
325 | ||
326 | static struct twl4030_bci_platform_data sdp3430_bci_data = { | |
327 | .battery_tmp_tbl = sdp3430_batt_table, | |
328 | .tblsize = ARRAY_SIZE(sdp3430_batt_table), | |
329 | }; | |
330 | ||
331 | static struct twl4030_hsmmc_info mmc[] = { | |
332 | { | |
333 | .mmc = 1, | |
334 | /* 8 bits (default) requires S6.3 == ON, | |
335 | * so the SIM card isn't used; else 4 bits. | |
336 | */ | |
337 | .wires = 8, | |
338 | .gpio_wp = 4, | |
339 | }, | |
340 | { | |
341 | .mmc = 2, | |
342 | .wires = 8, | |
343 | .gpio_wp = 7, | |
344 | }, | |
345 | {} /* Terminator */ | |
346 | }; | |
347 | ||
348 | static struct regulator_consumer_supply sdp3430_vmmc1_supply = { | |
349 | .supply = "vmmc", | |
350 | }; | |
351 | ||
352 | static struct regulator_consumer_supply sdp3430_vsim_supply = { | |
353 | .supply = "vmmc_aux", | |
354 | }; | |
355 | ||
356 | static struct regulator_consumer_supply sdp3430_vmmc2_supply = { | |
357 | .supply = "vmmc", | |
358 | }; | |
359 | ||
360 | static int sdp3430_twl_gpio_setup(struct device *dev, | |
361 | unsigned gpio, unsigned ngpio) | |
362 | { | |
363 | /* gpio + 0 is "mmc0_cd" (input/IRQ), | |
364 | * gpio + 1 is "mmc1_cd" (input/IRQ) | |
365 | */ | |
366 | mmc[0].gpio_cd = gpio + 0; | |
367 | mmc[1].gpio_cd = gpio + 1; | |
368 | twl4030_mmc_init(mmc); | |
369 | ||
370 | /* link regulators to MMC adapters ... we "know" the | |
371 | * regulators will be set up only *after* we return. | |
372 | */ | |
373 | sdp3430_vmmc1_supply.dev = mmc[0].dev; | |
374 | sdp3430_vsim_supply.dev = mmc[0].dev; | |
375 | sdp3430_vmmc2_supply.dev = mmc[1].dev; | |
376 | ||
377 | /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ | |
378 | gpio_request(gpio + 7, "sub_lcd_en_bkl"); | |
379 | gpio_direction_output(gpio + 7, 0); | |
380 | ||
381 | /* gpio + 15 is "sub_lcd_nRST" (output) */ | |
382 | gpio_request(gpio + 15, "sub_lcd_nRST"); | |
383 | gpio_direction_output(gpio + 15, 0); | |
384 | ||
385 | return 0; | |
386 | } | |
387 | ||
388 | static struct twl4030_gpio_platform_data sdp3430_gpio_data = { | |
389 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
390 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
391 | .irq_end = TWL4030_GPIO_IRQ_END, | |
392 | .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13) | |
393 | | BIT(16) | BIT(17), | |
394 | .setup = sdp3430_twl_gpio_setup, | |
395 | }; | |
396 | ||
397 | static struct twl4030_usb_data sdp3430_usb_data = { | |
398 | .usb_mode = T2_USB_MODE_ULPI, | |
399 | }; | |
400 | ||
401 | static struct twl4030_madc_platform_data sdp3430_madc_data = { | |
402 | .irq_line = 1, | |
403 | }; | |
404 | ||
405 | /* | |
406 | * Apply all the fixed voltages since most versions of U-Boot | |
407 | * don't bother with that initialization. | |
408 | */ | |
409 | ||
410 | /* VAUX1 for mainboard (irda and sub-lcd) */ | |
411 | static struct regulator_init_data sdp3430_vaux1 = { | |
412 | .constraints = { | |
413 | .min_uV = 2800000, | |
414 | .max_uV = 2800000, | |
415 | .apply_uV = true, | |
416 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
417 | | REGULATOR_MODE_STANDBY, | |
418 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
419 | | REGULATOR_CHANGE_STATUS, | |
420 | }, | |
421 | }; | |
422 | ||
423 | /* VAUX2 for camera module */ | |
424 | static struct regulator_init_data sdp3430_vaux2 = { | |
425 | .constraints = { | |
426 | .min_uV = 2800000, | |
427 | .max_uV = 2800000, | |
428 | .apply_uV = true, | |
429 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
430 | | REGULATOR_MODE_STANDBY, | |
431 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
432 | | REGULATOR_CHANGE_STATUS, | |
433 | }, | |
434 | }; | |
435 | ||
436 | /* VAUX3 for LCD board */ | |
437 | static struct regulator_init_data sdp3430_vaux3 = { | |
438 | .constraints = { | |
439 | .min_uV = 2800000, | |
440 | .max_uV = 2800000, | |
441 | .apply_uV = true, | |
442 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
443 | | REGULATOR_MODE_STANDBY, | |
444 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
445 | | REGULATOR_CHANGE_STATUS, | |
446 | }, | |
447 | }; | |
448 | ||
449 | /* VAUX4 for OMAP VDD_CSI2 (camera) */ | |
450 | static struct regulator_init_data sdp3430_vaux4 = { | |
451 | .constraints = { | |
452 | .min_uV = 1800000, | |
453 | .max_uV = 1800000, | |
454 | .apply_uV = true, | |
455 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
456 | | REGULATOR_MODE_STANDBY, | |
457 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
458 | | REGULATOR_CHANGE_STATUS, | |
459 | }, | |
460 | }; | |
461 | ||
462 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | |
463 | static struct regulator_init_data sdp3430_vmmc1 = { | |
464 | .constraints = { | |
465 | .min_uV = 1850000, | |
466 | .max_uV = 3150000, | |
467 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
468 | | REGULATOR_MODE_STANDBY, | |
469 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
470 | | REGULATOR_CHANGE_MODE | |
471 | | REGULATOR_CHANGE_STATUS, | |
472 | }, | |
473 | .num_consumer_supplies = 1, | |
474 | .consumer_supplies = &sdp3430_vmmc1_supply, | |
475 | }; | |
476 | ||
477 | /* VMMC2 for MMC2 card */ | |
478 | static struct regulator_init_data sdp3430_vmmc2 = { | |
479 | .constraints = { | |
480 | .min_uV = 1850000, | |
481 | .max_uV = 1850000, | |
482 | .apply_uV = true, | |
483 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
484 | | REGULATOR_MODE_STANDBY, | |
485 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
486 | | REGULATOR_CHANGE_STATUS, | |
487 | }, | |
488 | .num_consumer_supplies = 1, | |
489 | .consumer_supplies = &sdp3430_vmmc2_supply, | |
490 | }; | |
491 | ||
492 | /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ | |
493 | static struct regulator_init_data sdp3430_vsim = { | |
494 | .constraints = { | |
495 | .min_uV = 1800000, | |
496 | .max_uV = 3000000, | |
497 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
498 | | REGULATOR_MODE_STANDBY, | |
499 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
500 | | REGULATOR_CHANGE_MODE | |
501 | | REGULATOR_CHANGE_STATUS, | |
502 | }, | |
503 | .num_consumer_supplies = 1, | |
504 | .consumer_supplies = &sdp3430_vsim_supply, | |
505 | }; | |
506 | ||
507 | /* VDAC for DSS driving S-Video */ | |
508 | static struct regulator_init_data sdp3430_vdac = { | |
509 | .constraints = { | |
510 | .min_uV = 1800000, | |
511 | .max_uV = 1800000, | |
512 | .apply_uV = true, | |
513 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
514 | | REGULATOR_MODE_STANDBY, | |
515 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
516 | | REGULATOR_CHANGE_STATUS, | |
517 | }, | |
518 | .num_consumer_supplies = 1, | |
d9056ce2 | 519 | .consumer_supplies = &sdp3430_vdda_dac_supply, |
6fdc29e2 SMK |
520 | }; |
521 | ||
522 | /* VPLL2 for digital video outputs */ | |
d9056ce2 TV |
523 | static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { |
524 | { | |
525 | .supply = "vdvi", | |
526 | .dev = &sdp3430_lcd_device.dev, | |
527 | }, | |
528 | { | |
529 | .supply = "vdds_dsi", | |
530 | .dev = &sdp3430_dss_device.dev, | |
531 | } | |
532 | }; | |
533 | ||
6fdc29e2 SMK |
534 | static struct regulator_init_data sdp3430_vpll2 = { |
535 | .constraints = { | |
536 | .name = "VDVI", | |
537 | .min_uV = 1800000, | |
538 | .max_uV = 1800000, | |
d9056ce2 | 539 | .apply_uV = true, |
6fdc29e2 SMK |
540 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
541 | | REGULATOR_MODE_STANDBY, | |
542 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
543 | | REGULATOR_CHANGE_STATUS, | |
544 | }, | |
d9056ce2 TV |
545 | .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies), |
546 | .consumer_supplies = sdp3430_vpll2_supplies, | |
6fdc29e2 SMK |
547 | }; |
548 | ||
e86fa0b4 PU |
549 | static struct twl4030_codec_audio_data sdp3430_audio = { |
550 | .audio_mclk = 26000000, | |
551 | }; | |
552 | ||
553 | static struct twl4030_codec_data sdp3430_codec = { | |
6df74efb | 554 | .audio_mclk = 26000000, |
e86fa0b4 PU |
555 | .audio = &sdp3430_audio, |
556 | }; | |
557 | ||
6fdc29e2 SMK |
558 | static struct twl4030_platform_data sdp3430_twldata = { |
559 | .irq_base = TWL4030_IRQ_BASE, | |
560 | .irq_end = TWL4030_IRQ_END, | |
561 | ||
562 | /* platform_data for children goes here */ | |
563 | .bci = &sdp3430_bci_data, | |
564 | .gpio = &sdp3430_gpio_data, | |
565 | .madc = &sdp3430_madc_data, | |
566 | .keypad = &sdp3430_kp_data, | |
567 | .usb = &sdp3430_usb_data, | |
e86fa0b4 | 568 | .codec = &sdp3430_codec, |
6fdc29e2 SMK |
569 | |
570 | .vaux1 = &sdp3430_vaux1, | |
571 | .vaux2 = &sdp3430_vaux2, | |
572 | .vaux3 = &sdp3430_vaux3, | |
573 | .vaux4 = &sdp3430_vaux4, | |
574 | .vmmc1 = &sdp3430_vmmc1, | |
575 | .vmmc2 = &sdp3430_vmmc2, | |
576 | .vsim = &sdp3430_vsim, | |
577 | .vdac = &sdp3430_vdac, | |
578 | .vpll2 = &sdp3430_vpll2, | |
579 | }; | |
580 | ||
581 | static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = { | |
582 | { | |
583 | I2C_BOARD_INFO("twl4030", 0x48), | |
584 | .flags = I2C_CLIENT_WAKE, | |
585 | .irq = INT_34XX_SYS_NIRQ, | |
586 | .platform_data = &sdp3430_twldata, | |
587 | }, | |
588 | }; | |
589 | ||
590 | static int __init omap3430_i2c_init(void) | |
591 | { | |
592 | /* i2c1 for PMIC only */ | |
593 | omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo, | |
594 | ARRAY_SIZE(sdp3430_i2c_boardinfo)); | |
595 | /* i2c2 on camera connector (for sensor control) and optional isp1301 */ | |
596 | omap_register_i2c_bus(2, 400, NULL, 0); | |
597 | /* i2c3 on display connector (for DVI, tfp410) */ | |
598 | omap_register_i2c_bus(3, 400, NULL, 0); | |
599 | return 0; | |
600 | } | |
601 | ||
1a48e157 TL |
602 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
603 | ||
604 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
605 | .cs = 3, | |
606 | .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 | | |
607 | IORESOURCE_IRQ_LOWLEVEL, | |
608 | }; | |
609 | ||
610 | static void __init board_smc91x_init(void) | |
611 | { | |
612 | if (omap_rev() > OMAP3430_REV_ES1_0) | |
613 | board_smc91x_data.gpio_irq = 6; | |
614 | else | |
615 | board_smc91x_data.gpio_irq = 29; | |
616 | ||
617 | gpmc_smc91x_init(&board_smc91x_data); | |
618 | } | |
619 | ||
620 | #else | |
621 | ||
622 | static inline void board_smc91x_init(void) | |
623 | { | |
624 | } | |
625 | ||
626 | #endif | |
627 | ||
5110b298 RT |
628 | static void enable_board_wakeup_source(void) |
629 | { | |
4896e394 TL |
630 | /* T2 interrupt line (keypad) */ |
631 | omap_mux_init_signal("sys_nirq", | |
632 | OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP); | |
5110b298 RT |
633 | } |
634 | ||
58a5491c FB |
635 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { |
636 | ||
637 | .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, | |
638 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | |
639 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | |
640 | ||
641 | .phy_reset = true, | |
642 | .reset_gpio_port[0] = 57, | |
643 | .reset_gpio_port[1] = 61, | |
644 | .reset_gpio_port[2] = -EINVAL | |
645 | }; | |
646 | ||
ca5742bd TL |
647 | #ifdef CONFIG_OMAP_MUX |
648 | static struct omap_board_mux board_mux[] __initdata = { | |
649 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
650 | }; | |
651 | #else | |
652 | #define board_mux NULL | |
653 | #endif | |
654 | ||
88c8460a VS |
655 | static struct mtd_partition sdp_nor_partitions[] = { |
656 | /* bootloader (U-Boot, etc) in first sector */ | |
657 | { | |
658 | .name = "Bootloader-NOR", | |
659 | .offset = 0, | |
660 | .size = SZ_256K, | |
661 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
662 | }, | |
663 | /* bootloader params in the next sector */ | |
664 | { | |
665 | .name = "Params-NOR", | |
666 | .offset = MTDPART_OFS_APPEND, | |
667 | .size = SZ_256K, | |
668 | .mask_flags = 0, | |
669 | }, | |
670 | /* kernel */ | |
671 | { | |
672 | .name = "Kernel-NOR", | |
673 | .offset = MTDPART_OFS_APPEND, | |
674 | .size = SZ_2M, | |
675 | .mask_flags = 0 | |
676 | }, | |
677 | /* file system */ | |
678 | { | |
679 | .name = "Filesystem-NOR", | |
680 | .offset = MTDPART_OFS_APPEND, | |
681 | .size = MTDPART_SIZ_FULL, | |
682 | .mask_flags = 0 | |
683 | } | |
684 | }; | |
685 | ||
686 | static struct mtd_partition sdp_onenand_partitions[] = { | |
687 | { | |
688 | .name = "X-Loader-OneNAND", | |
689 | .offset = 0, | |
690 | .size = 4 * (64 * 2048), | |
691 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
692 | }, | |
693 | { | |
694 | .name = "U-Boot-OneNAND", | |
695 | .offset = MTDPART_OFS_APPEND, | |
696 | .size = 2 * (64 * 2048), | |
697 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
698 | }, | |
699 | { | |
700 | .name = "U-Boot Environment-OneNAND", | |
701 | .offset = MTDPART_OFS_APPEND, | |
702 | .size = 1 * (64 * 2048), | |
703 | }, | |
704 | { | |
705 | .name = "Kernel-OneNAND", | |
706 | .offset = MTDPART_OFS_APPEND, | |
707 | .size = 16 * (64 * 2048), | |
708 | }, | |
709 | { | |
710 | .name = "File System-OneNAND", | |
711 | .offset = MTDPART_OFS_APPEND, | |
712 | .size = MTDPART_SIZ_FULL, | |
713 | }, | |
714 | }; | |
715 | ||
716 | static struct mtd_partition sdp_nand_partitions[] = { | |
717 | /* All the partition sizes are listed in terms of NAND block size */ | |
718 | { | |
719 | .name = "X-Loader-NAND", | |
720 | .offset = 0, | |
721 | .size = 4 * (64 * 2048), | |
722 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
723 | }, | |
724 | { | |
725 | .name = "U-Boot-NAND", | |
726 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ | |
727 | .size = 10 * (64 * 2048), | |
728 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
729 | }, | |
730 | { | |
731 | .name = "Boot Env-NAND", | |
732 | ||
733 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */ | |
734 | .size = 6 * (64 * 2048), | |
735 | }, | |
736 | { | |
737 | .name = "Kernel-NAND", | |
738 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ | |
739 | .size = 40 * (64 * 2048), | |
740 | }, | |
741 | { | |
742 | .name = "File System - NAND", | |
743 | .size = MTDPART_SIZ_FULL, | |
744 | .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */ | |
745 | }, | |
746 | }; | |
747 | ||
748 | static struct flash_partitions sdp_flash_partitions[] = { | |
749 | { | |
750 | .parts = sdp_nor_partitions, | |
751 | .nr_parts = ARRAY_SIZE(sdp_nor_partitions), | |
752 | }, | |
753 | { | |
754 | .parts = sdp_onenand_partitions, | |
755 | .nr_parts = ARRAY_SIZE(sdp_onenand_partitions), | |
756 | }, | |
757 | { | |
758 | .parts = sdp_nand_partitions, | |
759 | .nr_parts = ARRAY_SIZE(sdp_nand_partitions), | |
760 | }, | |
761 | }; | |
762 | ||
6fdc29e2 SMK |
763 | static void __init omap_3430sdp_init(void) |
764 | { | |
ca5742bd | 765 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
6fdc29e2 SMK |
766 | omap3430_i2c_init(); |
767 | platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); | |
6fdc29e2 SMK |
768 | if (omap_rev() > OMAP3430_REV_ES1_0) |
769 | ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; | |
770 | else | |
771 | ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1; | |
772 | sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio); | |
773 | spi_register_board_info(sdp3430_spi_board_info, | |
774 | ARRAY_SIZE(sdp3430_spi_board_info)); | |
775 | ads7846_dev_init(); | |
776 | omap_serial_init(); | |
777 | usb_musb_init(); | |
1a48e157 | 778 | board_smc91x_init(); |
88c8460a | 779 | sdp_flash_init(sdp_flash_partitions); |
d9056ce2 | 780 | sdp3430_display_init(); |
5110b298 | 781 | enable_board_wakeup_source(); |
58a5491c | 782 | usb_ehci_init(&ehci_pdata); |
6fdc29e2 SMK |
783 | } |
784 | ||
785 | static void __init omap_3430sdp_map_io(void) | |
786 | { | |
787 | omap2_set_globals_343x(); | |
6fbd55d0 | 788 | omap34xx_map_common_io(); |
6fdc29e2 SMK |
789 | } |
790 | ||
791 | MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") | |
792 | /* Maintainer: Syed Khasim - Texas Instruments Inc */ | |
793 | .phys_io = 0x48000000, | |
b4224b23 | 794 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, |
6fdc29e2 SMK |
795 | .boot_params = 0x80000100, |
796 | .map_io = omap_3430sdp_map_io, | |
797 | .init_irq = omap_3430sdp_init_irq, | |
798 | .init_machine = omap_3430sdp_init, | |
799 | .timer = &omap_timer, | |
800 | MACHINE_END |