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omap: Move omap1 USB platform init code into mach-omap1/usb.c
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1da177e4 1/*
dbdf9ced 2 * linux/arch/arm/mach-omap1/board-h2.c
1da177e4
LT
3 *
4 * Board specific inits for OMAP-1610 H2
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * H2 specific changes and cleanup
15 * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kernel.h>
d052d1be 23#include <linux/platform_device.h>
1da177e4 24#include <linux/delay.h>
8056c6cb 25#include <linux/i2c.h>
1da177e4 26#include <linux/mtd/mtd.h>
9b6553cd 27#include <linux/mtd/nand.h>
1da177e4 28#include <linux/mtd/partitions.h>
561b036a 29#include <linux/mtd/physmap.h>
9b6553cd 30#include <linux/input.h>
6d16bfb5 31#include <linux/i2c/tps65010.h>
3bc48014 32#include <linux/smc91x.h>
1da177e4 33
a09e64fb 34#include <mach/hardware.h>
8056c6cb
DB
35#include <asm/gpio.h>
36
1da177e4
LT
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
1da177e4
LT
39#include <asm/mach/map.h>
40
ce491cf8
TL
41#include <plat/mux.h>
42#include <plat/dma.h>
43#include <plat/tc.h>
ce491cf8
TL
44#include <plat/irda.h>
45#include <plat/usb.h>
46#include <plat/keypad.h>
47#include <plat/common.h>
561b036a 48#include <plat/flash.h>
1da177e4 49
eb6b0b18
TL
50#include "board-h2.h"
51
52/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
53#define OMAP1610_ETHR_START 0x04000300
54
9b6553cd
TL
55static int h2_keymap[] = {
56 KEY(0, 0, KEY_LEFT),
57 KEY(0, 1, KEY_RIGHT),
58 KEY(0, 2, KEY_3),
59 KEY(0, 3, KEY_F10),
60 KEY(0, 4, KEY_F5),
61 KEY(0, 5, KEY_9),
62 KEY(1, 0, KEY_DOWN),
63 KEY(1, 1, KEY_UP),
64 KEY(1, 2, KEY_2),
65 KEY(1, 3, KEY_F9),
66 KEY(1, 4, KEY_F7),
67 KEY(1, 5, KEY_0),
68 KEY(2, 0, KEY_ENTER),
69 KEY(2, 1, KEY_6),
70 KEY(2, 2, KEY_1),
71 KEY(2, 3, KEY_F2),
72 KEY(2, 4, KEY_F6),
73 KEY(2, 5, KEY_HOME),
74 KEY(3, 0, KEY_8),
75 KEY(3, 1, KEY_5),
76 KEY(3, 2, KEY_F12),
77 KEY(3, 3, KEY_F3),
78 KEY(3, 4, KEY_F8),
79 KEY(3, 5, KEY_END),
80 KEY(4, 0, KEY_7),
81 KEY(4, 1, KEY_4),
82 KEY(4, 2, KEY_F11),
83 KEY(4, 3, KEY_F1),
84 KEY(4, 4, KEY_F4),
85 KEY(4, 5, KEY_ESC),
86 KEY(5, 0, KEY_F13),
87 KEY(5, 1, KEY_F14),
88 KEY(5, 2, KEY_F15),
89 KEY(5, 3, KEY_F16),
90 KEY(5, 4, KEY_SLEEP),
91 0
92};
93
94static struct mtd_partition h2_nor_partitions[] = {
1da177e4
LT
95 /* bootloader (U-Boot, etc) in first sector */
96 {
97 .name = "bootloader",
98 .offset = 0,
99 .size = SZ_128K,
100 .mask_flags = MTD_WRITEABLE, /* force read-only */
101 },
102 /* bootloader params in the next sector */
103 {
104 .name = "params",
105 .offset = MTDPART_OFS_APPEND,
106 .size = SZ_128K,
107 .mask_flags = 0,
108 },
109 /* kernel */
110 {
111 .name = "kernel",
112 .offset = MTDPART_OFS_APPEND,
113 .size = SZ_2M,
114 .mask_flags = 0
115 },
116 /* file system */
117 {
118 .name = "filesystem",
119 .offset = MTDPART_OFS_APPEND,
120 .size = MTDPART_SIZ_FULL,
121 .mask_flags = 0
122 }
123};
124
561b036a 125static struct physmap_flash_data h2_nor_data = {
1da177e4 126 .width = 2,
561b036a 127 .set_vpp = omap1_set_vpp,
9b6553cd
TL
128 .parts = h2_nor_partitions,
129 .nr_parts = ARRAY_SIZE(h2_nor_partitions),
1da177e4
LT
130};
131
9b6553cd 132static struct resource h2_nor_resource = {
7c38cf02 133 /* This is on CS3, wherever it's mapped */
1da177e4
LT
134 .flags = IORESOURCE_MEM,
135};
136
9b6553cd 137static struct platform_device h2_nor_device = {
561b036a 138 .name = "physmap-flash",
1da177e4
LT
139 .id = 0,
140 .dev = {
9b6553cd 141 .platform_data = &h2_nor_data,
1da177e4
LT
142 },
143 .num_resources = 1,
9b6553cd 144 .resource = &h2_nor_resource,
1da177e4
LT
145};
146
a524626b
TL
147static struct mtd_partition h2_nand_partitions[] = {
148#if 0
149 /* REVISIT: enable these partitions if you make NAND BOOT
150 * work on your H2 (rev C or newer); published versions of
151 * x-load only support P2 and H3.
152 */
153 {
154 .name = "xloader",
155 .offset = 0,
156 .size = 64 * 1024,
157 .mask_flags = MTD_WRITEABLE, /* force read-only */
158 },
159 {
160 .name = "bootloader",
161 .offset = MTDPART_OFS_APPEND,
162 .size = 256 * 1024,
163 .mask_flags = MTD_WRITEABLE, /* force read-only */
164 },
165 {
166 .name = "params",
167 .offset = MTDPART_OFS_APPEND,
168 .size = 192 * 1024,
169 },
170 {
171 .name = "kernel",
172 .offset = MTDPART_OFS_APPEND,
173 .size = 2 * SZ_1M,
174 },
175#endif
176 {
177 .name = "filesystem",
178 .size = MTDPART_SIZ_FULL,
179 .offset = MTDPART_OFS_APPEND,
180 },
181};
182
414f552a
LM
183static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
184{
185 struct nand_chip *this = mtd->priv;
186 unsigned long mask;
187
188 if (cmd == NAND_CMD_NONE)
189 return;
190
191 mask = (ctrl & NAND_CLE) ? 0x02 : 0;
192 if (ctrl & NAND_ALE)
193 mask |= 0x04;
194 writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
195}
196
197#define H2_NAND_RB_GPIO_PIN 62
198
199static int h2_nand_dev_ready(struct mtd_info *mtd)
200{
201 return gpio_get_value(H2_NAND_RB_GPIO_PIN);
202}
203
204static const char *h2_part_probes[] = { "cmdlinepart", NULL };
205
206struct platform_nand_data h2_nand_platdata = {
207 .chip = {
208 .nr_chips = 1,
209 .chip_offset = 0,
210 .nr_partitions = ARRAY_SIZE(h2_nand_partitions),
211 .partitions = h2_nand_partitions,
212 .options = NAND_SAMSUNG_LP_OPTIONS,
213 .part_probe_types = h2_part_probes,
214 },
215 .ctrl = {
216 .cmd_ctrl = h2_nand_cmd_ctl,
217 .dev_ready = h2_nand_dev_ready,
218
219 },
a524626b
TL
220};
221
222static struct resource h2_nand_resource = {
223 .flags = IORESOURCE_MEM,
224};
225
226static struct platform_device h2_nand_device = {
414f552a 227 .name = "gen_nand",
a524626b
TL
228 .id = 0,
229 .dev = {
414f552a 230 .platform_data = &h2_nand_platdata,
a524626b
TL
231 },
232 .num_resources = 1,
233 .resource = &h2_nand_resource,
234};
a524626b 235
3bc48014
LM
236static struct smc91x_platdata h2_smc91x_info = {
237 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
238 .leda = RPC_LED_100_10,
239 .ledb = RPC_LED_TX_RX,
240};
241
1da177e4
LT
242static struct resource h2_smc91x_resources[] = {
243 [0] = {
244 .start = OMAP1610_ETHR_START, /* Physical */
245 .end = OMAP1610_ETHR_START + 0xf,
246 .flags = IORESOURCE_MEM,
247 },
248 [1] = {
249 .start = OMAP_GPIO_IRQ(0),
250 .end = OMAP_GPIO_IRQ(0),
e7b3dc7e 251 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
1da177e4
LT
252 },
253};
254
255static struct platform_device h2_smc91x_device = {
256 .name = "smc91x",
257 .id = 0,
3bc48014
LM
258 .dev = {
259 .platform_data = &h2_smc91x_info,
260 },
1da177e4
LT
261 .num_resources = ARRAY_SIZE(h2_smc91x_resources),
262 .resource = h2_smc91x_resources,
263};
264
9b6553cd
TL
265static struct resource h2_kp_resources[] = {
266 [0] = {
267 .start = INT_KEYBOARD,
268 .end = INT_KEYBOARD,
269 .flags = IORESOURCE_IRQ,
270 },
271};
272
273static struct omap_kp_platform_data h2_kp_data = {
4d24607b
KS
274 .rows = 8,
275 .cols = 8,
276 .keymap = h2_keymap,
277 .keymapsize = ARRAY_SIZE(h2_keymap),
278 .rep = 1,
279 .delay = 9,
280 .dbounce = 1,
9b6553cd
TL
281};
282
283static struct platform_device h2_kp_device = {
284 .name = "omap-keypad",
285 .id = -1,
286 .dev = {
287 .platform_data = &h2_kp_data,
288 },
289 .num_resources = ARRAY_SIZE(h2_kp_resources),
290 .resource = h2_kp_resources,
291};
292
293#define H2_IRDA_FIRSEL_GPIO_PIN 17
294
295#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
296static int h2_transceiver_mode(struct device *dev, int state)
297{
0b84b5ca
DB
298 /* SIR when low, else MIR/FIR when HIGH */
299 gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE));
9b6553cd
TL
300 return 0;
301}
302#endif
303
304static struct omap_irda_config h2_irda_data = {
305 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
306 .rx_channel = OMAP_DMA_UART3_RX,
307 .tx_channel = OMAP_DMA_UART3_TX,
308 .dest_start = UART3_THR,
309 .src_start = UART3_RHR,
310 .tx_trigger = 0,
311 .rx_trigger = 0,
312};
313
314static struct resource h2_irda_resources[] = {
315 [0] = {
316 .start = INT_UART3,
317 .end = INT_UART3,
318 .flags = IORESOURCE_IRQ,
319 },
320};
a524626b
TL
321
322static u64 irda_dmamask = 0xffffffff;
323
9b6553cd
TL
324static struct platform_device h2_irda_device = {
325 .name = "omapirda",
326 .id = 0,
327 .dev = {
328 .platform_data = &h2_irda_data,
a524626b 329 .dma_mask = &irda_dmamask,
9b6553cd
TL
330 },
331 .num_resources = ARRAY_SIZE(h2_irda_resources),
332 .resource = h2_irda_resources,
333};
334
335static struct platform_device h2_lcd_device = {
336 .name = "lcd_h2",
337 .id = -1,
338};
339
1da177e4 340static struct platform_device *h2_devices[] __initdata = {
9b6553cd 341 &h2_nor_device,
78be6325 342 &h2_nand_device,
1da177e4 343 &h2_smc91x_device,
9b6553cd
TL
344 &h2_irda_device,
345 &h2_kp_device,
346 &h2_lcd_device,
1da177e4
LT
347};
348
349static void __init h2_init_smc91x(void)
350{
f2d18fea 351 if (gpio_request(0, "SMC91x irq") < 0) {
1da177e4
LT
352 printk("Error requesting gpio 0 for smc91x irq\n");
353 return;
354 }
1da177e4
LT
355}
356
d8874665
TL
357static int tps_setup(struct i2c_client *client, void *context)
358{
359 tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
360 TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
361
362 return 0;
363}
364
365static struct tps65010_board tps_board = {
366 .base = H2_TPS_GPIO_BASE,
367 .outmask = 0x0f,
368 .setup = tps_setup,
369};
370
e27a93a9
TL
371static struct i2c_board_info __initdata h2_i2c_board_info[] = {
372 {
9221bb1c 373 I2C_BOARD_INFO("tps65010", 0x48),
9221bb1c 374 .irq = OMAP_GPIO_IRQ(58),
d8874665 375 .platform_data = &tps_board,
9221bb1c 376 }, {
e27a93a9 377 I2C_BOARD_INFO("isp1301_omap", 0x2d),
e27a93a9
TL
378 .irq = OMAP_GPIO_IRQ(2),
379 },
380};
381
7c38cf02 382static void __init h2_init_irq(void)
1da177e4 383{
87bd63f6 384 omap1_init_common_hw();
1da177e4
LT
385 omap_init_irq();
386 omap_gpio_init();
387 h2_init_smc91x();
388}
389
390static struct omap_usb_config h2_usb_config __initdata = {
391 /* usb1 has a Mini-AB port and external isp1301 transceiver */
392 .otg = 2,
393
394#ifdef CONFIG_USB_GADGET_OMAP
6e2d4107
DC
395 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
396 /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
1da177e4
LT
397#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
398 /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
6e2d4107 399 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
1da177e4
LT
400#endif
401
402 .pins[1] = 3,
403};
404
3179a019 405static struct omap_lcd_config h2_lcd_config __initdata = {
3179a019
TL
406 .ctrl_name = "internal",
407};
408
e3318fb4 409static struct omap_board_config_kernel h2_config[] __initdata = {
3179a019 410 { OMAP_TAG_LCD, &h2_lcd_config },
1da177e4
LT
411};
412
413static void __init h2_init(void)
414{
9b6553cd
TL
415 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
416 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
417 * notice whether a NAND chip is enabled at probe time.
418 *
419 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
420 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
421 * detecting that in code here, to avoid probing every possible flash
422 * configuration...
7c38cf02 423 */
9b6553cd
TL
424 h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
425 h2_nor_resource.end += SZ_32M - 1;
426
a524626b
TL
427 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
428 h2_nand_resource.end += SZ_4K - 1;
f2d18fea
JN
429 if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
430 BUG();
431 gpio_direction_input(H2_NAND_RB_GPIO_PIN);
a524626b 432
9b6553cd
TL
433 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
434 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
7c38cf02
TL
435
436 /* MMC: card detect and WP */
6e2d4107 437 /* omap_cfg_reg(U19_ARMIO1); */ /* CD */
7c38cf02
TL
438 omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
439
9b6553cd
TL
440 /* Irda */
441#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
442 omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
f2d18fea
JN
443 if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0)
444 BUG();
445 gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0);
446 h2_irda_data.transceiver_mode = h2_transceiver_mode;
9b6553cd
TL
447#endif
448
1da177e4
LT
449 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
450 omap_board_config = h2_config;
451 omap_board_config_size = ARRAY_SIZE(h2_config);
3179a019 452 omap_serial_init();
1ed16a86
JN
453 omap_register_i2c_bus(1, 100, h2_i2c_board_info,
454 ARRAY_SIZE(h2_i2c_board_info));
dd0cdd88 455 omap1_usb_init(&h2_usb_config);
138ab9f8 456 h2_mmc_init();
1da177e4
LT
457}
458
459static void __init h2_map_io(void)
460{
87bd63f6 461 omap1_map_common_io();
1da177e4
LT
462}
463
464MACHINE_START(OMAP_H2, "TI-H2")
e9dea0c6 465 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
e9dea0c6
RK
466 .phys_io = 0xfff00000,
467 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
468 .boot_params = 0x10000100,
469 .map_io = h2_map_io,
470 .init_irq = h2_init_irq,
471 .init_machine = h2_init,
1da177e4
LT
472 .timer = &omap_timer,
473MACHINE_END