[net-next-2.6.git] / arch / arm / mach-mx3 / mach-kzm_arm11_01.c

/*
 * KZM-ARM11-01 support
 *  Copyright (C) 2009  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 * based on code for MX31ADS,
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
 *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/smsc911x.h>
#include <linux/types.h>

#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include <mach/clock.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#include <mach/memory.h>

#include "devices.h"

#define KZM_ARM11_IO_ADDRESS(x) (					\
	IMX_IO_ADDRESS(x, MX31_CS4) ?:					\
	IMX_IO_ADDRESS(x, MX31_CS5) ?:					\
	MX31_IO_ADDRESS(x))

/*
 *  KZM-ARM11-01 Board Control Registers on FPGA
 */
#define KZM_ARM11_CTL1		(MX31_CS4_BASE_ADDR + 0x1000)
#define KZM_ARM11_CTL2		(MX31_CS4_BASE_ADDR + 0x1001)
#define KZM_ARM11_RSW1		(MX31_CS4_BASE_ADDR + 0x1002)
#define KZM_ARM11_BACK_LIGHT	(MX31_CS4_BASE_ADDR + 0x1004)
#define KZM_ARM11_FPGA_REV	(MX31_CS4_BASE_ADDR + 0x1008)
#define KZM_ARM11_7SEG_LED	(MX31_CS4_BASE_ADDR + 0x1010)
#define KZM_ARM11_LEDS		(MX31_CS4_BASE_ADDR + 0x1020)
#define KZM_ARM11_DIPSW2	(MX31_CS4_BASE_ADDR + 0x1003)

/*
 * External UART for touch panel on FPGA
 */
#define KZM_ARM11_16550		(MX31_CS4_BASE_ADDR + 0x1050)

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/*
 * KZM-ARM11-01 has an external UART on FPGA
 */
static struct plat_serial8250_port serial_platform_data[] = {
	{
		.membase	= KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
		.mapbase	= KZM_ARM11_16550,
		.irq		= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
		.irqflags	= IRQ_TYPE_EDGE_RISING,
		.uartclk	= 14745600,
		.regshift	= 0,
		.iotype		= UPIO_MEM,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
				  UPF_BUGGY_UART,
	},
	{},
};

static struct resource serial8250_resources[] = {
	{
		.start	= KZM_ARM11_16550,
		.end	= KZM_ARM11_16550 + 0x10,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device serial_device = {
	.name		= "serial8250",
	.id		= PLAT8250_DEV_PLATFORM,
	.dev		= {
				.platform_data = serial_platform_data,
			  },
	.num_resources	= ARRAY_SIZE(serial8250_resources),
	.resource	= serial8250_resources,
};

static int __init kzm_init_ext_uart(void)
{
	u8 tmp;

	/*
	 * GPIO 1-1: external UART interrupt line
	 */
	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));

	/*
	 * Unmask UART interrupt
	 */
	tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
	tmp |= 0x2;
	__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));

	return platform_device_register(&serial_device);
}
#else
static inline int kzm_init_ext_uart(void)
{
	return 0;
}
#endif

/*
 * SMSC LAN9118
 */
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
static struct smsc911x_platform_config kzm_smsc9118_config = {
	.phy_interface	= PHY_INTERFACE_MODE_MII,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
};

static struct resource kzm_smsc9118_resources[] = {
	{
		.start	= MX31_CS5_BASE_ADDR,
		.end	= MX31_CS5_BASE_ADDR + SZ_128K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct platform_device kzm_smsc9118_device = {
	.name		= "smsc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(kzm_smsc9118_resources),
	.resource	= kzm_smsc9118_resources,
	.dev		= {
				.platform_data = &kzm_smsc9118_config,
			  },
};

static int __init kzm_init_smsc9118(void)
{
	/*
	 * GPIO 1-2: SMSC9118 interrupt line
	 */
	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));

	return platform_device_register(&kzm_smsc9118_device);
}
#else
static inline int kzm_init_smsc9118(void)
{
	return 0;
}
#endif

#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
static struct imxuart_platform_data uart_pdata = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static void __init kzm_init_imx_uart(void)
{
	mxc_register_device(&mxc_uart_device0, &uart_pdata);

	mxc_register_device(&mxc_uart_device1, &uart_pdata);
}
#else
static inline void kzm_init_imx_uart(void)
{
}
#endif

static int kzm_pins[] __initdata = {
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	MX31_PIN_DCD_DCE1__DCD_DCE1,
	MX31_PIN_RI_DCE1__RI_DCE1,
	MX31_PIN_DSR_DCE1__DSR_DCE1,
	MX31_PIN_DTR_DCE1__DTR_DCE1,
	MX31_PIN_CTS2__CTS2,
	MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2,
	MX31_PIN_RXD2__RXD2,
	MX31_PIN_DCD_DTE1__DCD_DTE2,
	MX31_PIN_RI_DTE1__RI_DTE2,
	MX31_PIN_DSR_DTE1__DSR_DTE2,
	MX31_PIN_DTR_DTE1__DTR_DTE2,
};

/*
 * Board specific initialization.
 */
static void __init kzm_board_init(void)
{
	mxc_iomux_setup_multiple_pins(kzm_pins,
				      ARRAY_SIZE(kzm_pins), "kzm");
	kzm_init_ext_uart();
	kzm_init_smsc9118();
	kzm_init_imx_uart();

	pr_info("Clock input source is 26MHz\n");
}

/*
 * This structure defines static mappings for the kzm-arm11-01 board.
 */
static struct map_desc kzm_io_desc[] __initdata = {
	{
		.virtual	= MX31_CS4_BASE_ADDR_VIRT,
		.pfn		= __phys_to_pfn(MX31_CS4_BASE_ADDR),
		.length		= MX31_CS4_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= MX31_CS5_BASE_ADDR_VIRT,
		.pfn		= __phys_to_pfn(MX31_CS5_BASE_ADDR),
		.length		= MX31_CS5_SIZE,
		.type		= MT_DEVICE
	},
};

/*
 * Set up static virtual mappings.
 */
static void __init kzm_map_io(void)
{
	mx31_map_io();
	iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
}

static void __init kzm_timer_init(void)
{
	mx31_clocks_init(26000000);
}

static struct sys_timer kzm_timer = {
	.init   = kzm_timer_init,
};

/*
 * The following uses standard kernel macros define in arch.h in order to
 * initialize __mach_desc_KZM_ARM11_01 data structure.
 */
MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
	.phys_io        = MX31_AIPS1_BASE_ADDR,
	.io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
	.boot_params    = MX3x_PHYS_OFFSET + 0x100,
	.map_io         = kzm_map_io,
	.init_irq       = mx31_init_irq,
	.init_machine   = kzm_board_init,
	.timer          = &kzm_timer,
MACHINE_END
Commit	Line	Data
415c7d26 YY	1	/*
	2	* KZM-ARM11-01 support
	3	* Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
	4	*
	5	* based on code for MX31ADS,
	6	* Copyright (C) 2000 Deep Blue Solutions Ltd
	7	* Copyright (C) 2002 Shane Nay (shane@minirl.com)
	8	* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	23	*/
	24
	25	#include <linux/gpio.h>
	26	#include <linux/init.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/serial_8250.h>
	29	#include <linux/smsc911x.h>
	30	#include <linux/types.h>
	31
	32	#include <asm/irq.h>
	33	#include <asm/mach-types.h>
	34	#include <asm/setup.h>
	35	#include <asm/mach/arch.h>
	36	#include <asm/mach/irq.h>
	37	#include <asm/mach/map.h>
	38	#include <asm/mach/time.h>
	39
415c7d26 YY	40	#include <mach/clock.h>
	41	#include <mach/common.h>
	42	#include <mach/imx-uart.h>
	43	#include <mach/iomux-mx3.h>
	44	#include <mach/memory.h>
	45
	46	#include "devices.h"
	47
59e26081 UKK	48	#define KZM_ARM11_IO_ADDRESS(x) ( \
	49	IMX_IO_ADDRESS(x, MX31_CS4) ?: \
	50	IMX_IO_ADDRESS(x, MX31_CS5) ?: \
	51	MX31_IO_ADDRESS(x))
	52
7b562d0f UKK	53	/*
	54	* KZM-ARM11-01 Board Control Registers on FPGA
	55	*/
	56	#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
	57	#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
	58	#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
	59	#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
	60	#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
	61	#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
	62	#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
	63	#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
	64
	65	/*
	66	* External UART for touch panel on FPGA
	67	*/
	68	#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
	69
415c7d26 YY	70	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	71	/*
	72	* KZM-ARM11-01 has an external UART on FPGA
	73	*/
	74	static struct plat_serial8250_port serial_platform_data[] = {
	75	{
59e26081	76	.membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
415c7d26 YY	77	.mapbase = KZM_ARM11_16550,
	78	.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
	79	.irqflags = IRQ_TYPE_EDGE_RISING,
	80	.uartclk = 14745600,
	81	.regshift = 0,
	82	.iotype = UPIO_MEM,
	83	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \|
	84	UPF_BUGGY_UART,
	85	},
	86	{},
	87	};
	88
	89	static struct resource serial8250_resources[] = {
	90	{
	91	.start = KZM_ARM11_16550,
	92	.end = KZM_ARM11_16550 + 0x10,
	93	.flags = IORESOURCE_MEM,
	94	},
	95	{
	96	.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
	97	.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
	98	.flags = IORESOURCE_IRQ,
	99	},
	100	};
	101
	102	static struct platform_device serial_device = {
	103	.name = "serial8250",
	104	.id = PLAT8250_DEV_PLATFORM,
	105	.dev = {
	106	.platform_data = serial_platform_data,
	107	},
	108	.num_resources = ARRAY_SIZE(serial8250_resources),
	109	.resource = serial8250_resources,
	110	};
	111
	112	static int __init kzm_init_ext_uart(void)
	113	{
	114	u8 tmp;
	115
	116	/*
	117	* GPIO 1-1: external UART interrupt line
	118	*/
	119	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
	120	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
	121	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
	122
	123	/*
	124	* Unmask UART interrupt
	125	*/
59e26081	126	tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
415c7d26	127	tmp \|= 0x2;
59e26081	128	__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
415c7d26 YY	129
	130	return platform_device_register(&serial_device);
	131	}
	132	#else
	133	static inline int kzm_init_ext_uart(void)
	134	{
	135	return 0;
	136	}
	137	#endif
	138
	139	/*
	140	* SMSC LAN9118
	141	*/
	142	#if defined(CONFIG_SMSC911X) \|\| defined(CONFIG_SMSC911X_MODULE)
	143	static struct smsc911x_platform_config kzm_smsc9118_config = {
	144	.phy_interface = PHY_INTERFACE_MODE_MII,
	145	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	146	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	147	.flags = SMSC911X_USE_32BIT \| SMSC911X_SAVE_MAC_ADDRESS,
	148	};
	149
	150	static struct resource kzm_smsc9118_resources[] = {
	151	{
f568dd7f UKK	152	.start = MX31_CS5_BASE_ADDR,
f568dd7f UKK	153	.end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
415c7d26 YY	154	.flags = IORESOURCE_MEM,
	155	},
	156	{
	157	.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
	158	.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
	159	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	160	},
	161	};
	162
	163	static struct platform_device kzm_smsc9118_device = {
	164	.name = "smsc911x",
	165	.id = -1,
	166	.num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
	167	.resource = kzm_smsc9118_resources,
	168	.dev = {
	169	.platform_data = &kzm_smsc9118_config,
	170	},
	171	};
	172
	173	static int __init kzm_init_smsc9118(void)
	174	{
	175	/*
	176	* GPIO 1-2: SMSC9118 interrupt line
	177	*/
	178	mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
	179	gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
	180	gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
	181
	182	return platform_device_register(&kzm_smsc9118_device);
	183	}
	184	#else
	185	static inline int kzm_init_smsc9118(void)
	186	{
	187	return 0;
	188	}
	189	#endif
	190
	191	#if defined(CONFIG_SERIAL_IMX) \|\| defined(CONFIG_SERIAL_IMX_MODULE)
	192	static struct imxuart_platform_data uart_pdata = {
	193	.flags = IMXUART_HAVE_RTSCTS,
	194	};
	195
	196	static void __init kzm_init_imx_uart(void)
	197	{
	198	mxc_register_device(&mxc_uart_device0, &uart_pdata);
	199
	200	mxc_register_device(&mxc_uart_device1, &uart_pdata);
	201	}
	202	#else
	203	static inline void kzm_init_imx_uart(void)
	204	{
	205	}
	206	#endif
	207
	208	static int kzm_pins[] __initdata = {
	209	MX31_PIN_CTS1__CTS1,
	210	MX31_PIN_RTS1__RTS1,
	211	MX31_PIN_TXD1__TXD1,
	212	MX31_PIN_RXD1__RXD1,
	213	MX31_PIN_DCD_DCE1__DCD_DCE1,
	214	MX31_PIN_RI_DCE1__RI_DCE1,
	215	MX31_PIN_DSR_DCE1__DSR_DCE1,
	216	MX31_PIN_DTR_DCE1__DTR_DCE1,
	217	MX31_PIN_CTS2__CTS2,
218	MX31_PIN_RTS2__RTS2,
219	MX31_PIN_TXD2__TXD2,
220	MX31_PIN_RXD2__RXD2,
221	MX31_PIN_DCD_DTE1__DCD_DTE2,
222	MX31_PIN_RI_DTE1__RI_DTE2,
223	MX31_PIN_DSR_DTE1__DSR_DTE2,
224	MX31_PIN_DTR_DTE1__DTR_DTE2,
225	};
226
227	/*
228	* Board specific initialization.
229	*/
230	static void __init kzm_board_init(void)
231	{
232	mxc_iomux_setup_multiple_pins(kzm_pins,
233	ARRAY_SIZE(kzm_pins), "kzm");
234	kzm_init_ext_uart();
235	kzm_init_smsc9118();
236	kzm_init_imx_uart();
237
238	pr_info("Clock input source is 26MHz\n");
239	}
240
241	/*
242	* This structure defines static mappings for the kzm-arm11-01 board.
243	*/
244	static struct map_desc kzm_io_desc[] __initdata = {
245	{
f568dd7f UKK	246	.virtual = MX31_CS4_BASE_ADDR_VIRT,
	247	.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
	248	.length = MX31_CS4_SIZE,
415c7d26 YY	249	.type = MT_DEVICE
	250	},
	251	{
f568dd7f UKK	252	.virtual = MX31_CS5_BASE_ADDR_VIRT,
	253	.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
	254	.length = MX31_CS5_SIZE,
415c7d26 YY	255	.type = MT_DEVICE
	256	},
	257	};
	258
	259	/*
	260	* Set up static virtual mappings.
	261	*/
	262	static void __init kzm_map_io(void)
	263	{
	264	mx31_map_io();
	265	iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
	266	}
	267
	268	static void __init kzm_timer_init(void)
	269	{
	270	mx31_clocks_init(26000000);
	271	}
	272
	273	static struct sys_timer kzm_timer = {
	274	.init = kzm_timer_init,
	275	};
	276
	277	/*
	278	* The following uses standard kernel macros define in arch.h in order to
	279	* initialize __mach_desc_KZM_ARM11_01 data structure.
	280	*/
	281	MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
f568dd7f	282	.phys_io = MX31_AIPS1_BASE_ADDR,
321ed164	283	.io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
34101237	284	.boot_params = MX3x_PHYS_OFFSET + 0x100,
415c7d26 YY	285	.map_io = kzm_map_io,
	286	.init_irq = mx31_init_irq,
	287	.init_machine = kzm_board_init,
	288	.timer = &kzm_timer,
	289	MACHINE_END