]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
a09e64fb | 2 | * arch/arm/mach-ixp2000/include/mach/ixdp2x00.h |
1da177e4 LT |
3 | * |
4 | * Register and other defines for IXDP2[48]00 platforms | |
5 | * | |
6 | * Original Author: Naeem Afzal <naeem.m.afzal@intel.com> | |
7 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | |
8 | * | |
9 | * Copyright (C) 2002 Intel Corp. | |
10 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify it | |
13 | * under the terms of the GNU General Public License as published by the | |
14 | * Free Software Foundation; either version 2 of the License, or (at your | |
15 | * option) any later version. | |
16 | */ | |
17 | #ifndef _IXDP2X00_H_ | |
18 | #define _IXDP2X00_H_ | |
19 | ||
20 | /* | |
21 | * On board CPLD memory map | |
22 | */ | |
23 | #define IXDP2X00_PHYS_CPLD_BASE 0xc7000000 | |
91f6a589 LB |
24 | #define IXDP2X00_VIRT_CPLD_BASE 0xfe000000 |
25 | #define IXDP2X00_CPLD_SIZE 0x00100000 | |
1da177e4 LT |
26 | |
27 | ||
28 | #define IXDP2X00_CPLD_REG(x) \ | |
29 | (volatile unsigned long *)(IXDP2X00_VIRT_CPLD_BASE | x) | |
30 | ||
31 | /* | |
32 | * IXDP2400 CPLD registers | |
33 | */ | |
34 | #define IXDP2400_CPLD_SYSLED IXDP2X00_CPLD_REG(0x0) | |
35 | #define IXDP2400_CPLD_DISP_DATA IXDP2X00_CPLD_REG(0x4) | |
36 | #define IXDP2400_CPLD_CLOCK_SPEED IXDP2X00_CPLD_REG(0x8) | |
37 | #define IXDP2400_CPLD_INT_STAT IXDP2X00_CPLD_REG(0xc) | |
38 | #define IXDP2400_CPLD_REV IXDP2X00_CPLD_REG(0x10) | |
39 | #define IXDP2400_CPLD_SYS_CLK_M IXDP2X00_CPLD_REG(0x14) | |
40 | #define IXDP2400_CPLD_SYS_CLK_N IXDP2X00_CPLD_REG(0x18) | |
41 | #define IXDP2400_CPLD_INT_MASK IXDP2X00_CPLD_REG(0x48) | |
42 | ||
43 | /* | |
44 | * IXDP2800 CPLD registers | |
45 | */ | |
46 | #define IXDP2800_CPLD_INT_STAT IXDP2X00_CPLD_REG(0x0) | |
47 | #define IXDP2800_CPLD_INT_MASK IXDP2X00_CPLD_REG(0x140) | |
48 | ||
49 | ||
50 | #define IXDP2X00_GPIO_I2C_ENABLE 0x02 | |
51 | #define IXDP2X00_GPIO_SCL 0x07 | |
52 | #define IXDP2X00_GPIO_SDA 0x06 | |
53 | ||
54 | /* | |
55 | * PCI devfns for on-board devices. We need these to be able to | |
56 | * properly translate IRQs and for device removal. | |
57 | */ | |
58 | #define IXDP2400_SLAVE_ENET_DEVFN 0x18 /* Bus 1 */ | |
59 | #define IXDP2400_MASTER_ENET_DEVFN 0x20 /* Bus 1 */ | |
60 | #define IXDP2400_MEDIA_DEVFN 0x28 /* Bus 1 */ | |
61 | #define IXDP2400_SWITCH_FABRIC_DEVFN 0x30 /* Bus 1 */ | |
62 | ||
63 | #define IXDP2800_SLAVE_ENET_DEVFN 0x20 /* Bus 1 */ | |
64 | #define IXDP2800_MASTER_ENET_DEVFN 0x18 /* Bus 1 */ | |
65 | #define IXDP2800_SWITCH_FABRIC_DEVFN 0x30 /* Bus 1 */ | |
66 | ||
67 | #define IXDP2X00_P2P_DEVFN 0x20 /* Bus 0 */ | |
68 | #define IXDP2X00_21555_DEVFN 0x30 /* Bus 0 */ | |
69 | #define IXDP2X00_SLAVE_NPU_DEVFN 0x28 /* Bus 1 */ | |
70 | #define IXDP2X00_PMC_DEVFN 0x38 /* Bus 1 */ | |
71 | #define IXDP2X00_MASTER_NPU_DEVFN 0x38 /* Bus 1 */ | |
72 | ||
73 | #ifndef __ASSEMBLY__ | |
74 | /* | |
709eb502 | 75 | * The master NPU is always PCI master. |
1da177e4 LT |
76 | */ |
77 | static inline unsigned int ixdp2x00_master_npu(void) | |
78 | { | |
709eb502 | 79 | return !!ixp2000_is_pcimaster(); |
1da177e4 LT |
80 | } |
81 | ||
82 | /* | |
83 | * Helper functions used by ixdp2400 and ixdp2800 specific code | |
84 | */ | |
85 | void ixdp2x00_init_irq(volatile unsigned long*, volatile unsigned long *, unsigned long); | |
86 | void ixdp2x00_slave_pci_postinit(void); | |
87 | void ixdp2x00_init_machine(void); | |
88 | void ixdp2x00_map_io(void); | |
89 | ||
90 | #endif | |
91 | ||
92 | #endif /*_IXDP2X00_H_ */ |