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Commit | Line | Data |
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83f53220 | 1 | /* |
5526b3f7 | 2 | * Table of the DAVINCI register configurations for the PINMUX combinations |
83f53220 VB |
3 | * |
4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> | |
5 | * | |
5526b3f7 KH |
6 | * Based on linux/include/asm-arm/arch-omap/mux.h: |
7 | * Copyright (C) 2003 - 2005 Nokia Corporation | |
8 | * | |
9 | * Written by Tony Lindgren | |
10 | * | |
83f53220 VB |
11 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
12 | * the terms of the GNU General Public License version 2. This program | |
13 | * is licensed "as is" without any warranty of any kind, whether express | |
14 | * or implied. | |
5526b3f7 KH |
15 | * |
16 | * Copyright (C) 2008 Texas Instruments. | |
83f53220 | 17 | */ |
5526b3f7 KH |
18 | |
19 | #ifndef __INC_MACH_MUX_H | |
20 | #define __INC_MACH_MUX_H | |
21 | ||
5526b3f7 KH |
22 | struct mux_config { |
23 | const char *name; | |
24 | const char *mux_reg_name; | |
25 | const unsigned char mux_reg; | |
26 | const unsigned char mask_offset; | |
27 | const unsigned char mask; | |
28 | const unsigned char mode; | |
29 | bool debug; | |
30 | }; | |
31 | ||
32 | enum davinci_dm644x_index { | |
33 | /* ATA and HDDIR functions */ | |
34 | DM644X_HDIREN, | |
35 | DM644X_ATAEN, | |
36 | DM644X_ATAEN_DISABLE, | |
37 | ||
38 | /* HPI functions */ | |
39 | DM644X_HPIEN_DISABLE, | |
40 | ||
41 | /* AEAW functions */ | |
42 | DM644X_AEAW, | |
c16fe267 AP |
43 | DM644X_AEAW0, |
44 | DM644X_AEAW1, | |
45 | DM644X_AEAW2, | |
46 | DM644X_AEAW3, | |
47 | DM644X_AEAW4, | |
5526b3f7 KH |
48 | |
49 | /* Memory Stick */ | |
50 | DM644X_MSTK, | |
51 | ||
52 | /* I2C */ | |
53 | DM644X_I2C, | |
54 | ||
55 | /* ASP function */ | |
56 | DM644X_MCBSP, | |
57 | ||
58 | /* UART1 */ | |
59 | DM644X_UART1, | |
60 | ||
61 | /* UART2 */ | |
62 | DM644X_UART2, | |
63 | ||
64 | /* PWM0 */ | |
65 | DM644X_PWM0, | |
66 | ||
67 | /* PWM1 */ | |
68 | DM644X_PWM1, | |
69 | ||
70 | /* PWM2 */ | |
71 | DM644X_PWM2, | |
72 | ||
73 | /* VLYNQ function */ | |
74 | DM644X_VLYNQEN, | |
75 | DM644X_VLSCREN, | |
76 | DM644X_VLYNQWD, | |
77 | ||
78 | /* EMAC and MDIO function */ | |
79 | DM644X_EMACEN, | |
80 | ||
81 | /* GPIO3V[0:16] pins */ | |
82 | DM644X_GPIO3V, | |
83 | ||
84 | /* GPIO pins */ | |
85 | DM644X_GPIO0, | |
86 | DM644X_GPIO3, | |
87 | DM644X_GPIO43_44, | |
88 | DM644X_GPIO46_47, | |
89 | ||
90 | /* VPBE */ | |
91 | DM644X_RGB666, | |
92 | ||
93 | /* LCD */ | |
94 | DM644X_LOEEN, | |
95 | DM644X_LFLDEN, | |
96 | }; | |
97 | ||
98 | enum davinci_dm646x_index { | |
99 | /* ATA function */ | |
100 | DM646X_ATAEN, | |
101 | ||
102 | /* AUDIO Clock */ | |
103 | DM646X_AUDCK1, | |
104 | DM646X_AUDCK0, | |
105 | ||
106 | /* CRGEN Control */ | |
107 | DM646X_CRGMUX, | |
108 | ||
109 | /* VPIF Control */ | |
110 | DM646X_STSOMUX_DISABLE, | |
111 | DM646X_STSIMUX_DISABLE, | |
112 | DM646X_PTSOMUX_DISABLE, | |
113 | DM646X_PTSIMUX_DISABLE, | |
114 | ||
115 | /* TSIF Control */ | |
116 | DM646X_STSOMUX, | |
117 | DM646X_STSIMUX, | |
118 | DM646X_PTSOMUX_PARALLEL, | |
119 | DM646X_PTSIMUX_PARALLEL, | |
120 | DM646X_PTSOMUX_SERIAL, | |
121 | DM646X_PTSIMUX_SERIAL, | |
122 | }; | |
123 | ||
124 | enum davinci_dm355_index { | |
125 | /* MMC/SD 0 */ | |
126 | DM355_MMCSD0, | |
127 | ||
128 | /* MMC/SD 1 */ | |
129 | DM355_SD1_CLK, | |
130 | DM355_SD1_CMD, | |
131 | DM355_SD1_DATA3, | |
132 | DM355_SD1_DATA2, | |
133 | DM355_SD1_DATA1, | |
134 | DM355_SD1_DATA0, | |
135 | ||
136 | /* I2C */ | |
137 | DM355_I2C_SDA, | |
138 | DM355_I2C_SCL, | |
139 | ||
140 | /* ASP0 function */ | |
141 | DM355_MCBSP0_BDX, | |
142 | DM355_MCBSP0_X, | |
143 | DM355_MCBSP0_BFSX, | |
144 | DM355_MCBSP0_BDR, | |
145 | DM355_MCBSP0_R, | |
146 | DM355_MCBSP0_BFSR, | |
147 | ||
148 | /* SPI0 */ | |
149 | DM355_SPI0_SDI, | |
150 | DM355_SPI0_SDENA0, | |
151 | DM355_SPI0_SDENA1, | |
152 | ||
153 | /* IRQ muxing */ | |
154 | DM355_INT_EDMA_CC, | |
155 | DM355_INT_EDMA_TC0_ERR, | |
156 | DM355_INT_EDMA_TC1_ERR, | |
157 | ||
158 | /* EDMA event muxing */ | |
159 | DM355_EVT8_ASP1_TX, | |
160 | DM355_EVT9_ASP1_RX, | |
161 | DM355_EVT26_MMC0_RX, | |
1aebb50e SP |
162 | |
163 | /* Video Out */ | |
164 | DM355_VOUT_FIELD, | |
165 | DM355_VOUT_FIELD_G70, | |
166 | DM355_VOUT_HVSYNC, | |
167 | DM355_VOUT_COUTL_EN, | |
168 | DM355_VOUT_COUTH_EN, | |
51e68e27 MK |
169 | |
170 | /* Video In Pin Mux */ | |
171 | DM355_VIN_PCLK, | |
172 | DM355_VIN_CAM_WEN, | |
173 | DM355_VIN_CAM_VD, | |
174 | DM355_VIN_CAM_HD, | |
175 | DM355_VIN_YIN_EN, | |
176 | DM355_VIN_CINL_EN, | |
177 | DM355_VIN_CINH_EN, | |
5526b3f7 KH |
178 | }; |
179 | ||
fb8fcb89 SP |
180 | enum davinci_dm365_index { |
181 | /* MMC/SD 0 */ | |
182 | DM365_MMCSD0, | |
183 | ||
184 | /* MMC/SD 1 */ | |
185 | DM365_SD1_CLK, | |
186 | DM365_SD1_CMD, | |
187 | DM365_SD1_DATA3, | |
188 | DM365_SD1_DATA2, | |
189 | DM365_SD1_DATA1, | |
190 | DM365_SD1_DATA0, | |
191 | ||
192 | /* I2C */ | |
193 | DM365_I2C_SDA, | |
194 | DM365_I2C_SCL, | |
195 | ||
196 | /* AEMIF */ | |
197 | DM365_AEMIF_AR, | |
198 | DM365_AEMIF_A3, | |
199 | DM365_AEMIF_A7, | |
200 | DM365_AEMIF_D15_8, | |
201 | DM365_AEMIF_CE0, | |
202 | ||
203 | /* ASP0 function */ | |
204 | DM365_MCBSP0_BDX, | |
205 | DM365_MCBSP0_X, | |
206 | DM365_MCBSP0_BFSX, | |
207 | DM365_MCBSP0_BDR, | |
208 | DM365_MCBSP0_R, | |
209 | DM365_MCBSP0_BFSR, | |
210 | ||
211 | /* SPI0 */ | |
212 | DM365_SPI0_SCLK, | |
213 | DM365_SPI0_SDI, | |
214 | DM365_SPI0_SDO, | |
215 | DM365_SPI0_SDENA0, | |
216 | DM365_SPI0_SDENA1, | |
217 | ||
218 | /* UART */ | |
219 | DM365_UART0_RXD, | |
220 | DM365_UART0_TXD, | |
221 | DM365_UART1_RXD, | |
222 | DM365_UART1_TXD, | |
223 | DM365_UART1_RTS, | |
224 | DM365_UART1_CTS, | |
225 | ||
226 | /* EMAC */ | |
227 | DM365_EMAC_TX_EN, | |
228 | DM365_EMAC_TX_CLK, | |
229 | DM365_EMAC_COL, | |
230 | DM365_EMAC_TXD3, | |
231 | DM365_EMAC_TXD2, | |
232 | DM365_EMAC_TXD1, | |
233 | DM365_EMAC_TXD0, | |
234 | DM365_EMAC_RXD3, | |
235 | DM365_EMAC_RXD2, | |
236 | DM365_EMAC_RXD1, | |
237 | DM365_EMAC_RXD0, | |
238 | DM365_EMAC_RX_CLK, | |
239 | DM365_EMAC_RX_DV, | |
240 | DM365_EMAC_RX_ER, | |
241 | DM365_EMAC_CRS, | |
242 | DM365_EMAC_MDIO, | |
243 | DM365_EMAC_MDCLK, | |
244 | ||
990c09d5 MA |
245 | /* Key Scan */ |
246 | DM365_KEYSCAN, | |
9f513153 | 247 | |
af5dbaef SP |
248 | /* PWM */ |
249 | DM365_PWM0, | |
250 | DM365_PWM0_G23, | |
251 | DM365_PWM1, | |
252 | DM365_PWM1_G25, | |
253 | DM365_PWM2_G87, | |
254 | DM365_PWM2_G88, | |
255 | DM365_PWM2_G89, | |
256 | DM365_PWM2_G90, | |
257 | DM365_PWM3_G80, | |
258 | DM365_PWM3_G81, | |
259 | DM365_PWM3_G85, | |
260 | DM365_PWM3_G86, | |
261 | ||
262 | /* SPI1 */ | |
263 | DM365_SPI1_SCLK, | |
264 | DM365_SPI1_SDO, | |
265 | DM365_SPI1_SDI, | |
266 | DM365_SPI1_SDENA0, | |
267 | DM365_SPI1_SDENA1, | |
268 | ||
269 | /* SPI2 */ | |
270 | DM365_SPI2_SCLK, | |
271 | DM365_SPI2_SDO, | |
272 | DM365_SPI2_SDI, | |
273 | DM365_SPI2_SDENA0, | |
274 | DM365_SPI2_SDENA1, | |
275 | ||
276 | /* SPI3 */ | |
277 | DM365_SPI3_SCLK, | |
278 | DM365_SPI3_SDO, | |
279 | DM365_SPI3_SDI, | |
280 | DM365_SPI3_SDENA0, | |
281 | DM365_SPI3_SDENA1, | |
282 | ||
283 | /* SPI4 */ | |
284 | DM365_SPI4_SCLK, | |
285 | DM365_SPI4_SDO, | |
286 | DM365_SPI4_SDI, | |
287 | DM365_SPI4_SDENA0, | |
288 | DM365_SPI4_SDENA1, | |
289 | ||
290 | /* GPIO */ | |
291 | DM365_GPIO20, | |
292 | DM365_GPIO33, | |
293 | DM365_GPIO40, | |
294 | ||
295 | /* Video */ | |
296 | DM365_VOUT_FIELD, | |
297 | DM365_VOUT_FIELD_G81, | |
298 | DM365_VOUT_HVSYNC, | |
299 | DM365_VOUT_COUTL_EN, | |
300 | DM365_VOUT_COUTH_EN, | |
301 | DM365_VIN_CAM_WEN, | |
302 | DM365_VIN_CAM_VD, | |
303 | DM365_VIN_CAM_HD, | |
866d2869 SP |
304 | DM365_VIN_YIN4_7_EN, |
305 | DM365_VIN_YIN0_3_EN, | |
af5dbaef | 306 | |
fb8fcb89 SP |
307 | /* IRQ muxing */ |
308 | DM365_INT_EDMA_CC, | |
309 | DM365_INT_EDMA_TC0_ERR, | |
310 | DM365_INT_EDMA_TC1_ERR, | |
9f513153 SP |
311 | DM365_INT_EDMA_TC2_ERR, |
312 | DM365_INT_EDMA_TC3_ERR, | |
fb8fcb89 SP |
313 | DM365_INT_PRTCSS, |
314 | DM365_INT_EMAC_RXTHRESH, | |
315 | DM365_INT_EMAC_RXPULSE, | |
316 | DM365_INT_EMAC_TXPULSE, | |
317 | DM365_INT_EMAC_MISCPULSE, | |
0c30e0d3 SP |
318 | DM365_INT_IMX0_ENABLE, |
319 | DM365_INT_IMX0_DISABLE, | |
320 | DM365_INT_HDVICP_ENABLE, | |
321 | DM365_INT_HDVICP_DISABLE, | |
322 | DM365_INT_IMX1_ENABLE, | |
323 | DM365_INT_IMX1_DISABLE, | |
324 | DM365_INT_NSF_ENABLE, | |
325 | DM365_INT_NSF_DISABLE, | |
fb8fcb89 SP |
326 | |
327 | /* EDMA event muxing */ | |
328 | DM365_EVT2_ASP_TX, | |
329 | DM365_EVT3_ASP_RX, | |
e89861e9 MA |
330 | DM365_EVT2_VC_TX, |
331 | DM365_EVT3_VC_RX, | |
fb8fcb89 SP |
332 | DM365_EVT26_MMC0_RX, |
333 | }; | |
334 | ||
55c79a40 MG |
335 | enum da830_index { |
336 | DA830_GPIO7_14, | |
337 | DA830_RTCK, | |
338 | DA830_GPIO7_15, | |
339 | DA830_EMU_0, | |
340 | DA830_EMB_SDCKE, | |
341 | DA830_EMB_CLK_GLUE, | |
342 | DA830_EMB_CLK, | |
343 | DA830_NEMB_CS_0, | |
344 | DA830_NEMB_CAS, | |
345 | DA830_NEMB_RAS, | |
346 | DA830_NEMB_WE, | |
347 | DA830_EMB_BA_1, | |
348 | DA830_EMB_BA_0, | |
349 | DA830_EMB_A_0, | |
350 | DA830_EMB_A_1, | |
351 | DA830_EMB_A_2, | |
352 | DA830_EMB_A_3, | |
353 | DA830_EMB_A_4, | |
354 | DA830_EMB_A_5, | |
355 | DA830_GPIO7_0, | |
356 | DA830_GPIO7_1, | |
357 | DA830_GPIO7_2, | |
358 | DA830_GPIO7_3, | |
359 | DA830_GPIO7_4, | |
360 | DA830_GPIO7_5, | |
361 | DA830_GPIO7_6, | |
362 | DA830_GPIO7_7, | |
363 | DA830_EMB_A_6, | |
364 | DA830_EMB_A_7, | |
365 | DA830_EMB_A_8, | |
366 | DA830_EMB_A_9, | |
367 | DA830_EMB_A_10, | |
368 | DA830_EMB_A_11, | |
369 | DA830_EMB_A_12, | |
370 | DA830_EMB_D_31, | |
371 | DA830_GPIO7_8, | |
372 | DA830_GPIO7_9, | |
373 | DA830_GPIO7_10, | |
374 | DA830_GPIO7_11, | |
375 | DA830_GPIO7_12, | |
376 | DA830_GPIO7_13, | |
377 | DA830_GPIO3_13, | |
378 | DA830_EMB_D_30, | |
379 | DA830_EMB_D_29, | |
380 | DA830_EMB_D_28, | |
381 | DA830_EMB_D_27, | |
382 | DA830_EMB_D_26, | |
383 | DA830_EMB_D_25, | |
384 | DA830_EMB_D_24, | |
385 | DA830_EMB_D_23, | |
386 | DA830_EMB_D_22, | |
387 | DA830_EMB_D_21, | |
388 | DA830_EMB_D_20, | |
389 | DA830_EMB_D_19, | |
390 | DA830_EMB_D_18, | |
391 | DA830_EMB_D_17, | |
392 | DA830_EMB_D_16, | |
393 | DA830_NEMB_WE_DQM_3, | |
394 | DA830_NEMB_WE_DQM_2, | |
395 | DA830_EMB_D_0, | |
396 | DA830_EMB_D_1, | |
397 | DA830_EMB_D_2, | |
398 | DA830_EMB_D_3, | |
399 | DA830_EMB_D_4, | |
400 | DA830_EMB_D_5, | |
401 | DA830_EMB_D_6, | |
402 | DA830_GPIO6_0, | |
403 | DA830_GPIO6_1, | |
404 | DA830_GPIO6_2, | |
405 | DA830_GPIO6_3, | |
406 | DA830_GPIO6_4, | |
407 | DA830_GPIO6_5, | |
408 | DA830_GPIO6_6, | |
409 | DA830_EMB_D_7, | |
410 | DA830_EMB_D_8, | |
411 | DA830_EMB_D_9, | |
412 | DA830_EMB_D_10, | |
413 | DA830_EMB_D_11, | |
414 | DA830_EMB_D_12, | |
415 | DA830_EMB_D_13, | |
416 | DA830_EMB_D_14, | |
417 | DA830_GPIO6_7, | |
418 | DA830_GPIO6_8, | |
419 | DA830_GPIO6_9, | |
420 | DA830_GPIO6_10, | |
421 | DA830_GPIO6_11, | |
422 | DA830_GPIO6_12, | |
423 | DA830_GPIO6_13, | |
424 | DA830_GPIO6_14, | |
425 | DA830_EMB_D_15, | |
426 | DA830_NEMB_WE_DQM_1, | |
427 | DA830_NEMB_WE_DQM_0, | |
428 | DA830_SPI0_SOMI_0, | |
429 | DA830_SPI0_SIMO_0, | |
430 | DA830_SPI0_CLK, | |
431 | DA830_NSPI0_ENA, | |
432 | DA830_NSPI0_SCS_0, | |
433 | DA830_EQEP0I, | |
434 | DA830_EQEP0S, | |
435 | DA830_EQEP1I, | |
436 | DA830_NUART0_CTS, | |
437 | DA830_NUART0_RTS, | |
438 | DA830_EQEP0A, | |
439 | DA830_EQEP0B, | |
440 | DA830_GPIO6_15, | |
441 | DA830_GPIO5_14, | |
442 | DA830_GPIO5_15, | |
443 | DA830_GPIO5_0, | |
444 | DA830_GPIO5_1, | |
445 | DA830_GPIO5_2, | |
446 | DA830_GPIO5_3, | |
447 | DA830_GPIO5_4, | |
448 | DA830_SPI1_SOMI_0, | |
449 | DA830_SPI1_SIMO_0, | |
450 | DA830_SPI1_CLK, | |
451 | DA830_UART0_RXD, | |
452 | DA830_UART0_TXD, | |
453 | DA830_AXR1_10, | |
454 | DA830_AXR1_11, | |
455 | DA830_NSPI1_ENA, | |
456 | DA830_I2C1_SCL, | |
457 | DA830_I2C1_SDA, | |
458 | DA830_EQEP1S, | |
459 | DA830_I2C0_SDA, | |
460 | DA830_I2C0_SCL, | |
461 | DA830_UART2_RXD, | |
462 | DA830_TM64P0_IN12, | |
463 | DA830_TM64P0_OUT12, | |
464 | DA830_GPIO5_5, | |
465 | DA830_GPIO5_6, | |
466 | DA830_GPIO5_7, | |
467 | DA830_GPIO5_8, | |
468 | DA830_GPIO5_9, | |
469 | DA830_GPIO5_10, | |
470 | DA830_GPIO5_11, | |
471 | DA830_GPIO5_12, | |
472 | DA830_NSPI1_SCS_0, | |
473 | DA830_USB0_DRVVBUS, | |
474 | DA830_AHCLKX0, | |
475 | DA830_ACLKX0, | |
476 | DA830_AFSX0, | |
477 | DA830_AHCLKR0, | |
478 | DA830_ACLKR0, | |
479 | DA830_AFSR0, | |
480 | DA830_UART2_TXD, | |
481 | DA830_AHCLKX2, | |
482 | DA830_ECAP0_APWM0, | |
483 | DA830_RMII_MHZ_50_CLK, | |
484 | DA830_ECAP1_APWM1, | |
485 | DA830_USB_REFCLKIN, | |
486 | DA830_GPIO5_13, | |
487 | DA830_GPIO4_15, | |
488 | DA830_GPIO2_11, | |
489 | DA830_GPIO2_12, | |
490 | DA830_GPIO2_13, | |
491 | DA830_GPIO2_14, | |
492 | DA830_GPIO2_15, | |
493 | DA830_GPIO3_12, | |
494 | DA830_AMUTE0, | |
495 | DA830_AXR0_0, | |
496 | DA830_AXR0_1, | |
497 | DA830_AXR0_2, | |
498 | DA830_AXR0_3, | |
499 | DA830_AXR0_4, | |
500 | DA830_AXR0_5, | |
501 | DA830_AXR0_6, | |
502 | DA830_RMII_TXD_0, | |
503 | DA830_RMII_TXD_1, | |
504 | DA830_RMII_TXEN, | |
505 | DA830_RMII_CRS_DV, | |
506 | DA830_RMII_RXD_0, | |
507 | DA830_RMII_RXD_1, | |
508 | DA830_RMII_RXER, | |
509 | DA830_AFSR2, | |
510 | DA830_ACLKX2, | |
511 | DA830_AXR2_3, | |
512 | DA830_AXR2_2, | |
513 | DA830_AXR2_1, | |
514 | DA830_AFSX2, | |
515 | DA830_ACLKR2, | |
516 | DA830_NRESETOUT, | |
517 | DA830_GPIO3_0, | |
518 | DA830_GPIO3_1, | |
519 | DA830_GPIO3_2, | |
520 | DA830_GPIO3_3, | |
521 | DA830_GPIO3_4, | |
522 | DA830_GPIO3_5, | |
523 | DA830_GPIO3_6, | |
524 | DA830_AXR0_7, | |
525 | DA830_AXR0_8, | |
526 | DA830_UART1_RXD, | |
527 | DA830_UART1_TXD, | |
528 | DA830_AXR0_11, | |
529 | DA830_AHCLKX1, | |
530 | DA830_ACLKX1, | |
531 | DA830_AFSX1, | |
532 | DA830_MDIO_CLK, | |
533 | DA830_MDIO_D, | |
534 | DA830_AXR0_9, | |
535 | DA830_AXR0_10, | |
536 | DA830_EPWM0B, | |
537 | DA830_EPWM0A, | |
538 | DA830_EPWMSYNCI, | |
539 | DA830_AXR2_0, | |
540 | DA830_EPWMSYNC0, | |
541 | DA830_GPIO3_7, | |
542 | DA830_GPIO3_8, | |
543 | DA830_GPIO3_9, | |
544 | DA830_GPIO3_10, | |
545 | DA830_GPIO3_11, | |
546 | DA830_GPIO3_14, | |
547 | DA830_GPIO3_15, | |
548 | DA830_GPIO4_10, | |
549 | DA830_AHCLKR1, | |
550 | DA830_ACLKR1, | |
551 | DA830_AFSR1, | |
552 | DA830_AMUTE1, | |
553 | DA830_AXR1_0, | |
554 | DA830_AXR1_1, | |
555 | DA830_AXR1_2, | |
556 | DA830_AXR1_3, | |
557 | DA830_ECAP2_APWM2, | |
558 | DA830_EHRPWMGLUETZ, | |
559 | DA830_EQEP1A, | |
560 | DA830_GPIO4_11, | |
561 | DA830_GPIO4_12, | |
562 | DA830_GPIO4_13, | |
563 | DA830_GPIO4_14, | |
564 | DA830_GPIO4_0, | |
565 | DA830_GPIO4_1, | |
566 | DA830_GPIO4_2, | |
567 | DA830_GPIO4_3, | |
568 | DA830_AXR1_4, | |
569 | DA830_AXR1_5, | |
570 | DA830_AXR1_6, | |
571 | DA830_AXR1_7, | |
572 | DA830_AXR1_8, | |
573 | DA830_AXR1_9, | |
574 | DA830_EMA_D_0, | |
575 | DA830_EMA_D_1, | |
576 | DA830_EQEP1B, | |
577 | DA830_EPWM2B, | |
578 | DA830_EPWM2A, | |
579 | DA830_EPWM1B, | |
580 | DA830_EPWM1A, | |
581 | DA830_MMCSD_DAT_0, | |
582 | DA830_MMCSD_DAT_1, | |
583 | DA830_UHPI_HD_0, | |
584 | DA830_UHPI_HD_1, | |
585 | DA830_GPIO4_4, | |
586 | DA830_GPIO4_5, | |
587 | DA830_GPIO4_6, | |
588 | DA830_GPIO4_7, | |
589 | DA830_GPIO4_8, | |
590 | DA830_GPIO4_9, | |
591 | DA830_GPIO0_0, | |
592 | DA830_GPIO0_1, | |
593 | DA830_EMA_D_2, | |
594 | DA830_EMA_D_3, | |
595 | DA830_EMA_D_4, | |
596 | DA830_EMA_D_5, | |
597 | DA830_EMA_D_6, | |
598 | DA830_EMA_D_7, | |
599 | DA830_EMA_D_8, | |
600 | DA830_EMA_D_9, | |
601 | DA830_MMCSD_DAT_2, | |
602 | DA830_MMCSD_DAT_3, | |
603 | DA830_MMCSD_DAT_4, | |
604 | DA830_MMCSD_DAT_5, | |
605 | DA830_MMCSD_DAT_6, | |
606 | DA830_MMCSD_DAT_7, | |
607 | DA830_UHPI_HD_8, | |
608 | DA830_UHPI_HD_9, | |
609 | DA830_UHPI_HD_2, | |
610 | DA830_UHPI_HD_3, | |
611 | DA830_UHPI_HD_4, | |
612 | DA830_UHPI_HD_5, | |
613 | DA830_UHPI_HD_6, | |
614 | DA830_UHPI_HD_7, | |
615 | DA830_LCD_D_8, | |
616 | DA830_LCD_D_9, | |
617 | DA830_GPIO0_2, | |
618 | DA830_GPIO0_3, | |
619 | DA830_GPIO0_4, | |
620 | DA830_GPIO0_5, | |
621 | DA830_GPIO0_6, | |
622 | DA830_GPIO0_7, | |
623 | DA830_GPIO0_8, | |
624 | DA830_GPIO0_9, | |
625 | DA830_EMA_D_10, | |
626 | DA830_EMA_D_11, | |
627 | DA830_EMA_D_12, | |
628 | DA830_EMA_D_13, | |
629 | DA830_EMA_D_14, | |
630 | DA830_EMA_D_15, | |
631 | DA830_EMA_A_0, | |
632 | DA830_EMA_A_1, | |
633 | DA830_UHPI_HD_10, | |
634 | DA830_UHPI_HD_11, | |
635 | DA830_UHPI_HD_12, | |
636 | DA830_UHPI_HD_13, | |
637 | DA830_UHPI_HD_14, | |
638 | DA830_UHPI_HD_15, | |
639 | DA830_LCD_D_7, | |
640 | DA830_MMCSD_CLK, | |
641 | DA830_LCD_D_10, | |
642 | DA830_LCD_D_11, | |
643 | DA830_LCD_D_12, | |
644 | DA830_LCD_D_13, | |
645 | DA830_LCD_D_14, | |
646 | DA830_LCD_D_15, | |
647 | DA830_UHPI_HCNTL0, | |
648 | DA830_GPIO0_10, | |
649 | DA830_GPIO0_11, | |
650 | DA830_GPIO0_12, | |
651 | DA830_GPIO0_13, | |
652 | DA830_GPIO0_14, | |
653 | DA830_GPIO0_15, | |
654 | DA830_GPIO1_0, | |
655 | DA830_GPIO1_1, | |
656 | DA830_EMA_A_2, | |
657 | DA830_EMA_A_3, | |
658 | DA830_EMA_A_4, | |
659 | DA830_EMA_A_5, | |
660 | DA830_EMA_A_6, | |
661 | DA830_EMA_A_7, | |
662 | DA830_EMA_A_8, | |
663 | DA830_EMA_A_9, | |
664 | DA830_MMCSD_CMD, | |
665 | DA830_LCD_D_6, | |
666 | DA830_LCD_D_3, | |
667 | DA830_LCD_D_2, | |
668 | DA830_LCD_D_1, | |
669 | DA830_LCD_D_0, | |
670 | DA830_LCD_PCLK, | |
671 | DA830_LCD_HSYNC, | |
672 | DA830_UHPI_HCNTL1, | |
673 | DA830_GPIO1_2, | |
674 | DA830_GPIO1_3, | |
675 | DA830_GPIO1_4, | |
676 | DA830_GPIO1_5, | |
677 | DA830_GPIO1_6, | |
678 | DA830_GPIO1_7, | |
679 | DA830_GPIO1_8, | |
680 | DA830_GPIO1_9, | |
681 | DA830_EMA_A_10, | |
682 | DA830_EMA_A_11, | |
683 | DA830_EMA_A_12, | |
684 | DA830_EMA_BA_1, | |
685 | DA830_EMA_BA_0, | |
686 | DA830_EMA_CLK, | |
687 | DA830_EMA_SDCKE, | |
688 | DA830_NEMA_CAS, | |
689 | DA830_LCD_VSYNC, | |
690 | DA830_NLCD_AC_ENB_CS, | |
691 | DA830_LCD_MCLK, | |
692 | DA830_LCD_D_5, | |
693 | DA830_LCD_D_4, | |
694 | DA830_OBSCLK, | |
695 | DA830_NEMA_CS_4, | |
696 | DA830_UHPI_HHWIL, | |
697 | DA830_AHCLKR2, | |
698 | DA830_GPIO1_10, | |
699 | DA830_GPIO1_11, | |
700 | DA830_GPIO1_12, | |
701 | DA830_GPIO1_13, | |
702 | DA830_GPIO1_14, | |
703 | DA830_GPIO1_15, | |
704 | DA830_GPIO2_0, | |
705 | DA830_GPIO2_1, | |
706 | DA830_NEMA_RAS, | |
707 | DA830_NEMA_WE, | |
708 | DA830_NEMA_CS_0, | |
709 | DA830_NEMA_CS_2, | |
710 | DA830_NEMA_CS_3, | |
711 | DA830_NEMA_OE, | |
712 | DA830_NEMA_WE_DQM_1, | |
713 | DA830_NEMA_WE_DQM_0, | |
714 | DA830_NEMA_CS_5, | |
715 | DA830_UHPI_HRNW, | |
716 | DA830_NUHPI_HAS, | |
717 | DA830_NUHPI_HCS, | |
718 | DA830_NUHPI_HDS1, | |
719 | DA830_NUHPI_HDS2, | |
720 | DA830_NUHPI_HINT, | |
721 | DA830_AXR0_12, | |
722 | DA830_AMUTE2, | |
723 | DA830_AXR0_13, | |
724 | DA830_AXR0_14, | |
725 | DA830_AXR0_15, | |
726 | DA830_GPIO2_2, | |
727 | DA830_GPIO2_3, | |
728 | DA830_GPIO2_4, | |
729 | DA830_GPIO2_5, | |
730 | DA830_GPIO2_6, | |
731 | DA830_GPIO2_7, | |
732 | DA830_GPIO2_8, | |
733 | DA830_GPIO2_9, | |
734 | DA830_EMA_WAIT_0, | |
735 | DA830_NUHPI_HRDY, | |
736 | DA830_GPIO2_10, | |
737 | }; | |
738 | ||
e1a8d7e2 SR |
739 | enum davinci_da850_index { |
740 | /* UART0 function */ | |
741 | DA850_NUART0_CTS, | |
742 | DA850_NUART0_RTS, | |
743 | DA850_UART0_RXD, | |
744 | DA850_UART0_TXD, | |
745 | ||
746 | /* UART1 function */ | |
747 | DA850_NUART1_CTS, | |
748 | DA850_NUART1_RTS, | |
749 | DA850_UART1_RXD, | |
750 | DA850_UART1_TXD, | |
751 | ||
752 | /* UART2 function */ | |
753 | DA850_NUART2_CTS, | |
754 | DA850_NUART2_RTS, | |
755 | DA850_UART2_RXD, | |
756 | DA850_UART2_TXD, | |
757 | ||
758 | /* I2C1 function */ | |
759 | DA850_I2C1_SCL, | |
760 | DA850_I2C1_SDA, | |
761 | ||
762 | /* I2C0 function */ | |
763 | DA850_I2C0_SDA, | |
764 | DA850_I2C0_SCL, | |
5a4b1315 SR |
765 | |
766 | /* EMAC function */ | |
767 | DA850_MII_TXEN, | |
768 | DA850_MII_TXCLK, | |
769 | DA850_MII_COL, | |
770 | DA850_MII_TXD_3, | |
771 | DA850_MII_TXD_2, | |
772 | DA850_MII_TXD_1, | |
773 | DA850_MII_TXD_0, | |
774 | DA850_MII_RXER, | |
775 | DA850_MII_CRS, | |
776 | DA850_MII_RXCLK, | |
777 | DA850_MII_RXDV, | |
778 | DA850_MII_RXD_3, | |
779 | DA850_MII_RXD_2, | |
780 | DA850_MII_RXD_1, | |
781 | DA850_MII_RXD_0, | |
53ca5c91 SR |
782 | DA850_MDIO_CLK, |
783 | DA850_MDIO_D, | |
2206771c C |
784 | DA850_RMII_TXD_0, |
785 | DA850_RMII_TXD_1, | |
786 | DA850_RMII_TXEN, | |
787 | DA850_RMII_CRS_DV, | |
788 | DA850_RMII_RXD_0, | |
789 | DA850_RMII_RXD_1, | |
790 | DA850_RMII_RXER, | |
791 | DA850_RMII_MHZ_50_CLK, | |
491214e1 C |
792 | |
793 | /* McASP function */ | |
794 | DA850_ACLKR, | |
795 | DA850_ACLKX, | |
796 | DA850_AFSR, | |
797 | DA850_AFSX, | |
798 | DA850_AHCLKR, | |
799 | DA850_AHCLKX, | |
800 | DA850_AMUTE, | |
801 | DA850_AXR_15, | |
802 | DA850_AXR_14, | |
803 | DA850_AXR_13, | |
804 | DA850_AXR_12, | |
805 | DA850_AXR_11, | |
806 | DA850_AXR_10, | |
807 | DA850_AXR_9, | |
808 | DA850_AXR_8, | |
809 | DA850_AXR_7, | |
810 | DA850_AXR_6, | |
811 | DA850_AXR_5, | |
812 | DA850_AXR_4, | |
813 | DA850_AXR_3, | |
814 | DA850_AXR_2, | |
815 | DA850_AXR_1, | |
816 | DA850_AXR_0, | |
5cbdf276 SR |
817 | |
818 | /* LCD function */ | |
819 | DA850_LCD_D_7, | |
820 | DA850_LCD_D_6, | |
821 | DA850_LCD_D_5, | |
822 | DA850_LCD_D_4, | |
823 | DA850_LCD_D_3, | |
824 | DA850_LCD_D_2, | |
825 | DA850_LCD_D_1, | |
826 | DA850_LCD_D_0, | |
827 | DA850_LCD_D_15, | |
828 | DA850_LCD_D_14, | |
829 | DA850_LCD_D_13, | |
830 | DA850_LCD_D_12, | |
831 | DA850_LCD_D_11, | |
832 | DA850_LCD_D_10, | |
833 | DA850_LCD_D_9, | |
834 | DA850_LCD_D_8, | |
835 | DA850_LCD_PCLK, | |
836 | DA850_LCD_HSYNC, | |
837 | DA850_LCD_VSYNC, | |
838 | DA850_NLCD_AC_ENB_CS, | |
839 | ||
700691f2 SR |
840 | /* MMC/SD0 function */ |
841 | DA850_MMCSD0_DAT_0, | |
842 | DA850_MMCSD0_DAT_1, | |
843 | DA850_MMCSD0_DAT_2, | |
844 | DA850_MMCSD0_DAT_3, | |
845 | DA850_MMCSD0_CLK, | |
846 | DA850_MMCSD0_CMD, | |
847 | ||
38beb929 SR |
848 | /* EMIF2.5/EMIFA function */ |
849 | DA850_EMA_D_7, | |
850 | DA850_EMA_D_6, | |
851 | DA850_EMA_D_5, | |
852 | DA850_EMA_D_4, | |
853 | DA850_EMA_D_3, | |
854 | DA850_EMA_D_2, | |
855 | DA850_EMA_D_1, | |
856 | DA850_EMA_D_0, | |
857 | DA850_EMA_A_1, | |
858 | DA850_EMA_A_2, | |
859 | DA850_NEMA_CS_3, | |
860 | DA850_NEMA_CS_4, | |
861 | DA850_NEMA_WE, | |
862 | DA850_NEMA_OE, | |
7c5ec609 SR |
863 | DA850_EMA_D_15, |
864 | DA850_EMA_D_14, | |
865 | DA850_EMA_D_13, | |
866 | DA850_EMA_D_12, | |
867 | DA850_EMA_D_11, | |
868 | DA850_EMA_D_10, | |
869 | DA850_EMA_D_9, | |
870 | DA850_EMA_D_8, | |
871 | DA850_EMA_A_0, | |
872 | DA850_EMA_A_3, | |
873 | DA850_EMA_A_4, | |
874 | DA850_EMA_A_5, | |
875 | DA850_EMA_A_6, | |
876 | DA850_EMA_A_7, | |
877 | DA850_EMA_A_8, | |
878 | DA850_EMA_A_9, | |
879 | DA850_EMA_A_10, | |
880 | DA850_EMA_A_11, | |
881 | DA850_EMA_A_12, | |
882 | DA850_EMA_A_13, | |
883 | DA850_EMA_A_14, | |
884 | DA850_EMA_A_15, | |
885 | DA850_EMA_A_16, | |
886 | DA850_EMA_A_17, | |
887 | DA850_EMA_A_18, | |
888 | DA850_EMA_A_19, | |
889 | DA850_EMA_A_20, | |
890 | DA850_EMA_A_21, | |
891 | DA850_EMA_A_22, | |
892 | DA850_EMA_A_23, | |
893 | DA850_EMA_BA_1, | |
894 | DA850_EMA_CLK, | |
895 | DA850_EMA_WAIT_1, | |
896 | DA850_NEMA_CS_2, | |
38beb929 | 897 | |
5cbdf276 | 898 | /* GPIO function */ |
2206771c | 899 | DA850_GPIO2_6, |
7761ef67 | 900 | DA850_GPIO2_8, |
5cbdf276 | 901 | DA850_GPIO2_15, |
700691f2 SR |
902 | DA850_GPIO4_0, |
903 | DA850_GPIO4_1, | |
044ca015 | 904 | DA850_RTC_ALARM, |
e1a8d7e2 SR |
905 | }; |
906 | ||
5526b3f7 KH |
907 | #ifdef CONFIG_DAVINCI_MUX |
908 | /* setup pin muxing */ | |
5526b3f7 | 909 | extern int davinci_cfg_reg(unsigned long reg_cfg); |
3821d10a | 910 | extern int davinci_cfg_reg_list(const short pins[]); |
5526b3f7 KH |
911 | #else |
912 | /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */ | |
5526b3f7 | 913 | static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; } |
3821d10a CC |
914 | static inline int davinci_cfg_reg_list(const short pins[]) |
915 | { | |
916 | return 0; | |
917 | } | |
5526b3f7 KH |
918 | #endif |
919 | ||
920 | #endif /* __INC_MACH_MUX_H */ |