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Davinci: gpio - fine grained locking
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1/*
2 * TI DaVinci GPIO Support
3 *
4 * Copyright (c) 2006 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __DAVINCI_GPIO_H
14#define __DAVINCI_GPIO_H
15
558de8a7 16#include <linux/io.h>
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17#include <linux/spinlock.h>
18
dce1115b 19#include <asm-generic/gpio.h>
f5c122da 20
80b02c17 21#include <mach/irqs.h>
a994955c 22#include <mach/common.h>
558de8a7 23
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24#define DAVINCI_GPIO_BASE 0x01C67000
25
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26enum davinci_gpio_type {
27 GPIO_TYPE_DAVINCI = 0,
28};
29
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30/*
31 * basic gpio routines
32 *
33 * board-specific init should be done by arch/.../.../board-XXX.c (maybe
34 * initializing banks together) rather than boot loaders; kexec() won't
35 * go through boot loaders.
36 *
37 * the gpio clock will be turned on when gpios are used, and you may also
474dad54 38 * need to pay attention to PINMUX registers to be sure those pins are
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39 * used as gpios, not with other peripherals.
40 *
dce1115b 41 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
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42 * and maybe for later updates, code may write GPIO(N). These may be
43 * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
44 * may not support all the GPIOs in that range.
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45 *
46 * GPIOs can also be on external chips, numbered after the ones built-in
47 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
3d9edf09 48 */
474dad54 49#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
3d9edf09 50
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51/* Convert GPIO signal to GPIO pin number */
52#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
53
99e9e52d 54struct davinci_gpio_controller {
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55 struct gpio_chip chip;
56 int irq_base;
b27b6d03 57 spinlock_t lock;
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58 void __iomem *regs;
59 void __iomem *set_data;
60 void __iomem *clr_data;
61 void __iomem *in_data;
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62};
63
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64/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
65 * with constant parameters; or in outlined code they execute at runtime.
66 *
67 * You'd access the controller directly when reading or writing more than
68 * one gpio value at a time, and to support wired logic where the value
69 * being driven by the cpu need not match the value read back.
70 *
71 * These are NOT part of the cross-platform GPIO interface
72 */
c12f415a 73static inline struct davinci_gpio_controller *
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74__gpio_to_controller(unsigned gpio)
75{
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76 struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
77 int index = gpio / 32;
78
79 if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
80 return NULL;
81
82 return ctlrs + index;
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83}
84
85static inline u32 __gpio_mask(unsigned gpio)
86{
87 return 1 << (gpio % 32);
88}
89
90/* The get/set/clear functions will inline when called with constant
dce1115b 91 * parameters referencing built-in GPIOs, for low-overhead bitbanging.
3d9edf09 92 *
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93 * Otherwise, calls with variable parameters or referencing external
94 * GPIOs (e.g. on GPIO expander chips) use outlined functions.
3d9edf09 95 */
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96static inline void gpio_set_value(unsigned gpio, int value)
97{
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98 if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
99 struct davinci_gpio_controller *ctlr;
100 u32 mask;
3d9edf09 101
c12f415a 102 ctlr = __gpio_to_controller(gpio);
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103 mask = __gpio_mask(gpio);
104 if (value)
c12f415a 105 __raw_writel(mask, ctlr->set_data);
3d9edf09 106 else
c12f415a 107 __raw_writel(mask, ctlr->clr_data);
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108 return;
109 }
110
dce1115b 111 __gpio_set_value(gpio, value);
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112}
113
114/* Returns zero or nonzero; works for gpios configured as inputs OR
dce1115b 115 * as outputs, at least for built-in GPIOs.
3d9edf09 116 *
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117 * NOTE: for built-in GPIOs, changes in reported values are synchronized
118 * to the GPIO clock. This is easily seen after calling gpio_set_value()
119 * and then immediately gpio_get_value(), where the gpio_get_value() will
120 * return the old value until the GPIO clock ticks and the new value gets
121 * latched.
3d9edf09 122 */
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123static inline int gpio_get_value(unsigned gpio)
124{
c12f415a 125 struct davinci_gpio_controller *ctlr;
3d9edf09 126
c12f415a 127 if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
dce1115b 128 return __gpio_get_value(gpio);
3d9edf09 129
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130 ctlr = __gpio_to_controller(gpio);
131 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
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132}
133
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134static inline int gpio_cansleep(unsigned gpio)
135{
c12f415a 136 if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
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137 return 0;
138 else
139 return __gpio_cansleep(gpio);
140}
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141
142static inline int gpio_to_irq(unsigned gpio)
143{
7a36071e 144 return __gpio_to_irq(gpio);
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145}
146
147static inline int irq_to_gpio(unsigned irq)
148{
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149 /* don't support the reverse mapping */
150 return -ENOSYS;
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151}
152
153#endif /* __DAVINCI_GPIO_H */