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Davinci: gpio - controller type support
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1/*
2 * TI DaVinci GPIO Support
3 *
4 * Copyright (c) 2006 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __DAVINCI_GPIO_H
14#define __DAVINCI_GPIO_H
15
558de8a7 16#include <linux/io.h>
dce1115b 17#include <asm-generic/gpio.h>
f5c122da 18
80b02c17 19#include <mach/irqs.h>
a994955c 20#include <mach/common.h>
558de8a7 21
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22#define DAVINCI_GPIO_BASE 0x01C67000
23
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24enum davinci_gpio_type {
25 GPIO_TYPE_DAVINCI = 0,
26};
27
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28/*
29 * basic gpio routines
30 *
31 * board-specific init should be done by arch/.../.../board-XXX.c (maybe
32 * initializing banks together) rather than boot loaders; kexec() won't
33 * go through boot loaders.
34 *
35 * the gpio clock will be turned on when gpios are used, and you may also
474dad54 36 * need to pay attention to PINMUX registers to be sure those pins are
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37 * used as gpios, not with other peripherals.
38 *
dce1115b 39 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
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40 * and maybe for later updates, code may write GPIO(N). These may be
41 * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
42 * may not support all the GPIOs in that range.
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43 *
44 * GPIOs can also be on external chips, numbered after the ones built-in
45 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
3d9edf09 46 */
474dad54 47#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
3d9edf09 48
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49/* Convert GPIO signal to GPIO pin number */
50#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
51
99e9e52d 52struct davinci_gpio_controller {
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53 struct gpio_chip chip;
54 int irq_base;
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55 void __iomem *regs;
56 void __iomem *set_data;
57 void __iomem *clr_data;
58 void __iomem *in_data;
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59};
60
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61/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
62 * with constant parameters; or in outlined code they execute at runtime.
63 *
64 * You'd access the controller directly when reading or writing more than
65 * one gpio value at a time, and to support wired logic where the value
66 * being driven by the cpu need not match the value read back.
67 *
68 * These are NOT part of the cross-platform GPIO interface
69 */
c12f415a 70static inline struct davinci_gpio_controller *
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71__gpio_to_controller(unsigned gpio)
72{
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73 struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
74 int index = gpio / 32;
75
76 if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
77 return NULL;
78
79 return ctlrs + index;
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80}
81
82static inline u32 __gpio_mask(unsigned gpio)
83{
84 return 1 << (gpio % 32);
85}
86
87/* The get/set/clear functions will inline when called with constant
dce1115b 88 * parameters referencing built-in GPIOs, for low-overhead bitbanging.
3d9edf09 89 *
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90 * Otherwise, calls with variable parameters or referencing external
91 * GPIOs (e.g. on GPIO expander chips) use outlined functions.
3d9edf09 92 */
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93static inline void gpio_set_value(unsigned gpio, int value)
94{
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95 if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
96 struct davinci_gpio_controller *ctlr;
97 u32 mask;
3d9edf09 98
c12f415a 99 ctlr = __gpio_to_controller(gpio);
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100 mask = __gpio_mask(gpio);
101 if (value)
c12f415a 102 __raw_writel(mask, ctlr->set_data);
3d9edf09 103 else
c12f415a 104 __raw_writel(mask, ctlr->clr_data);
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105 return;
106 }
107
dce1115b 108 __gpio_set_value(gpio, value);
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109}
110
111/* Returns zero or nonzero; works for gpios configured as inputs OR
dce1115b 112 * as outputs, at least for built-in GPIOs.
3d9edf09 113 *
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114 * NOTE: for built-in GPIOs, changes in reported values are synchronized
115 * to the GPIO clock. This is easily seen after calling gpio_set_value()
116 * and then immediately gpio_get_value(), where the gpio_get_value() will
117 * return the old value until the GPIO clock ticks and the new value gets
118 * latched.
3d9edf09 119 */
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120static inline int gpio_get_value(unsigned gpio)
121{
c12f415a 122 struct davinci_gpio_controller *ctlr;
3d9edf09 123
c12f415a 124 if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
dce1115b 125 return __gpio_get_value(gpio);
3d9edf09 126
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127 ctlr = __gpio_to_controller(gpio);
128 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
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129}
130
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131static inline int gpio_cansleep(unsigned gpio)
132{
c12f415a 133 if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
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134 return 0;
135 else
136 return __gpio_cansleep(gpio);
137}
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138
139static inline int gpio_to_irq(unsigned gpio)
140{
7a36071e 141 return __gpio_to_irq(gpio);
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142}
143
144static inline int irq_to_gpio(unsigned irq)
145{
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146 /* don't support the reverse mapping */
147 return -ENOSYS;
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148}
149
150#endif /* __DAVINCI_GPIO_H */