git://bbs.cooldavid.org / net-next-2.6.git / blame
| Commit | Line | Data |
|---|---|---|
| 7c6337e2 KH |
1 | /* |
| 2 | * Header for code common to all DaVinci machines. | |
| 3 | * | |
| 4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | |
| 5 | * | |
| 6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | |
| 7 | * the terms of the GNU General Public License version 2. This program | |
| 8 | * is licensed "as is" without any warranty of any kind, whether express | |
| 9 | * or implied. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H | |
| 13 | #define __ARCH_ARM_MACH_DAVINCI_COMMON_H | |
| 14 | ||
| 280faffb TK |
15 | #include <linux/compiler.h> |
| 16 | #include <linux/types.h> | |
| 17 | ||
| 7c6337e2 KH |
18 | struct sys_timer; |
| 19 | ||
| 20 | extern struct sys_timer davinci_timer; | |
| 21 | ||
| d0e47fba | 22 | extern void davinci_irq_init(void); |
| 673dd36f | 23 | extern void __iomem *davinci_intc_base; |
| 0b0c4c2a | 24 | extern int davinci_intc_type; |
| d0e47fba | 25 | |
| f64691b3 MG |
26 | struct davinci_timer_instance { |
| 27 | void __iomem *base; | |
| 28 | u32 bottom_irq; | |
| 29 | u32 top_irq; | |
| 3abd5acf MG |
30 | unsigned long cmp_off; |
| 31 | unsigned int cmp_irq; | |
| f64691b3 MG |
32 | }; |
| 33 | ||
| 34 | struct davinci_timer_info { | |
| 35 | struct davinci_timer_instance *timers; | |
| 36 | unsigned int clockevent_id; | |
| 37 | unsigned int clocksource_id; | |
| 38 | }; | |
| 39 | ||
| c12f415a CC |
40 | struct davinci_gpio_controller; |
| 41 | ||
| 79c3c0b7 MG |
42 | /* SoC specific init support */ |
| 43 | struct davinci_soc_info { | |
| 44 | struct map_desc *io_desc; | |
| 45 | unsigned long io_desc_num; | |
| b9ab1279 MG |
46 | u32 cpu_id; |
| 47 | u32 jtag_id; | |
| 48 | void __iomem *jtag_id_base; | |
| 49 | struct davinci_id *ids; | |
| 50 | unsigned long ids_num; | |
| 08aca087 | 51 | struct clk_lookup *cpu_clks; |
| d81d188c MG |
52 | void __iomem **psc_bases; |
| 53 | unsigned long psc_bases_num; | |
| 0e585952 MG |
54 | void __iomem *pinmux_base; |
| 55 | const struct mux_config *pinmux_pins; | |
| 56 | unsigned long pinmux_pins_num; | |
| 673dd36f MG |
57 | void __iomem *intc_base; |
| 58 | int intc_type; | |
| 59 | u8 *intc_irq_prios; | |
| 60 | unsigned long intc_irq_num; | |
| f64691b3 | 61 | struct davinci_timer_info *timer_info; |
| 686b634a | 62 | int gpio_type; |
| a994955c MG |
63 | void __iomem *gpio_base; |
| 64 | unsigned gpio_num; | |
| 65 | unsigned gpio_irq; | |
| 7a36071e | 66 | unsigned gpio_unbanked; |
| c12f415a CC |
67 | struct davinci_gpio_controller *gpio_ctlrs; |
| 68 | int gpio_ctlrs_num; | |
| 65e866a9 | 69 | struct platform_device *serial_dev; |
| 972412b6 | 70 | struct emac_platform_data *emac_pdata; |
| 0d04eb47 DB |
71 | dma_addr_t sram_dma; |
| 72 | unsigned sram_len; | |
| c78a5bc2 CC |
73 | struct platform_device *reset_device; |
| 74 | void (*reset)(struct platform_device *); | |
| 79c3c0b7 MG |
75 | }; |
| 76 | ||
| 77 | extern struct davinci_soc_info davinci_soc_info; | |
| 78 | ||
| 79 | extern void davinci_common_init(struct davinci_soc_info *soc_info); | |
| 7a9978a1 | 80 | extern void davinci_init_ide(void); |
| 79c3c0b7 | 81 | |
| 0d04eb47 DB |
82 | /* standard place to map on-chip SRAMs; they *may* support DMA */ |
| 83 | #define SRAM_VIRT 0xfffe0000 | |
| 84 | #define SRAM_SIZE SZ_128K | |
| 85 | ||
| 7c6337e2 | 86 | #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ |