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f5ce6a67 HV |
1 | /* |
2 | * Lyrtech SFFSDR board support. | |
3 | * | |
4 | * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com> | |
5 | * Copyright (C) 2008 Lyrtech <www.lyrtech.com> | |
6 | * | |
7 | * Based on DV-EVM platform, original copyright follows: | |
8 | * | |
9 | * Copyright (C) 2007 MontaVista Software, Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
f5ce6a67 | 26 | #include <linux/init.h> |
f5ce6a67 | 27 | #include <linux/platform_device.h> |
f5ce6a67 HV |
28 | #include <linux/i2c.h> |
29 | #include <linux/i2c/at24.h> | |
f5ce6a67 HV |
30 | #include <linux/mtd/mtd.h> |
31 | #include <linux/mtd/nand.h> | |
32 | #include <linux/mtd/partitions.h> | |
f5ce6a67 | 33 | |
f5ce6a67 | 34 | #include <asm/mach-types.h> |
f5ce6a67 | 35 | #include <asm/mach/arch.h> |
f5ce6a67 HV |
36 | #include <asm/mach/flash.h> |
37 | ||
38 | #include <mach/dm644x.h> | |
39 | #include <mach/common.h> | |
40 | #include <mach/i2c.h> | |
41 | #include <mach/serial.h> | |
f5ce6a67 | 42 | #include <mach/mux.h> |
355fb4e3 | 43 | #include <mach/usb.h> |
f5ce6a67 | 44 | |
ac7b75b5 KH |
45 | #define SFFSDR_PHY_MASK (0x2) |
46 | #define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | |
47 | ||
28552c2e | 48 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { |
f5ce6a67 HV |
49 | /* U-Boot Environment: Block 0 |
50 | * UBL: Block 1 | |
51 | * U-Boot: Blocks 6-7 (256 kb) | |
52 | * Integrity Kernel: Blocks 8-31 (3 Mb) | |
53 | * Integrity Data: Blocks 100-END | |
54 | */ | |
55 | { | |
56 | .name = "Linux Kernel", | |
57 | .offset = 32 * SZ_128K, | |
58 | .size = 16 * SZ_128K, /* 2 Mb */ | |
59 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
60 | }, | |
61 | { | |
62 | .name = "Linux ROOT", | |
63 | .offset = MTDPART_OFS_APPEND, | |
64 | .size = 256 * SZ_128K, /* 32 Mb */ | |
65 | .mask_flags = 0, /* R/W */ | |
66 | }, | |
67 | }; | |
68 | ||
69 | static struct flash_platform_data davinci_sffsdr_nandflash_data = { | |
70 | .parts = davinci_sffsdr_nandflash_partition, | |
71 | .nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition), | |
72 | }; | |
73 | ||
74 | static struct resource davinci_sffsdr_nandflash_resource[] = { | |
75 | { | |
70342174 SS |
76 | .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE, |
77 | .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | |
f5ce6a67 HV |
78 | .flags = IORESOURCE_MEM, |
79 | }, { | |
70342174 SS |
80 | .start = DM644X_ASYNC_EMIF_CONTROL_BASE, |
81 | .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | |
f5ce6a67 HV |
82 | .flags = IORESOURCE_MEM, |
83 | }, | |
84 | }; | |
85 | ||
86 | static struct platform_device davinci_sffsdr_nandflash_device = { | |
87 | .name = "davinci_nand", /* Name of driver */ | |
88 | .id = 0, | |
89 | .dev = { | |
90 | .platform_data = &davinci_sffsdr_nandflash_data, | |
91 | }, | |
92 | .num_resources = ARRAY_SIZE(davinci_sffsdr_nandflash_resource), | |
93 | .resource = davinci_sffsdr_nandflash_resource, | |
94 | }; | |
95 | ||
f5ce6a67 HV |
96 | static struct at24_platform_data eeprom_info = { |
97 | .byte_len = (64*1024) / 8, | |
98 | .page_size = 32, | |
99 | .flags = AT24_FLAG_ADDR16, | |
100 | }; | |
101 | ||
102 | static struct i2c_board_info __initdata i2c_info[] = { | |
103 | { | |
104 | I2C_BOARD_INFO("24lc64", 0x50), | |
105 | .platform_data = &eeprom_info, | |
106 | }, | |
107 | /* Other I2C devices: | |
108 | * MSP430, addr 0x23 (not used) | |
109 | * PCA9543, addr 0x70 (setup done by U-Boot) | |
110 | * ADS7828, addr 0x48 (ADC for voltage monitoring.) | |
111 | */ | |
112 | }; | |
113 | ||
114 | static struct davinci_i2c_platform_data i2c_pdata = { | |
115 | .bus_freq = 20 /* kHz */, | |
116 | .bus_delay = 100 /* usec */, | |
117 | }; | |
118 | ||
119 | static void __init sffsdr_init_i2c(void) | |
120 | { | |
121 | davinci_init_i2c(&i2c_pdata); | |
122 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); | |
123 | } | |
124 | ||
125 | static struct platform_device *davinci_sffsdr_devices[] __initdata = { | |
126 | &davinci_sffsdr_nandflash_device, | |
127 | }; | |
128 | ||
129 | static struct davinci_uart_config uart_config __initdata = { | |
130 | .enabled_uarts = (1 << 0), | |
131 | }; | |
132 | ||
133 | static void __init davinci_sffsdr_map_io(void) | |
134 | { | |
f5ce6a67 HV |
135 | dm644x_init(); |
136 | } | |
137 | ||
138 | static __init void davinci_sffsdr_init(void) | |
139 | { | |
972412b6 MG |
140 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
141 | ||
f5ce6a67 HV |
142 | platform_add_devices(davinci_sffsdr_devices, |
143 | ARRAY_SIZE(davinci_sffsdr_devices)); | |
144 | sffsdr_init_i2c(); | |
145 | davinci_serial_init(&uart_config); | |
972412b6 MG |
146 | soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK; |
147 | soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY; | |
355fb4e3 | 148 | davinci_setup_usb(0, 0); /* We support only peripheral mode. */ |
f5ce6a67 HV |
149 | |
150 | /* mux VLYNQ pins */ | |
151 | davinci_cfg_reg(DM644X_VLYNQEN); | |
152 | davinci_cfg_reg(DM644X_VLYNQWD); | |
153 | } | |
154 | ||
f5ce6a67 HV |
155 | MACHINE_START(SFFSDR, "Lyrtech SFFSDR") |
156 | /* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */ | |
157 | .phys_io = IO_PHYS, | |
158 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | |
159 | .boot_params = (DAVINCI_DDR_BASE + 0x100), | |
160 | .map_io = davinci_sffsdr_map_io, | |
bd808947 | 161 | .init_irq = davinci_irq_init, |
f5ce6a67 HV |
162 | .timer = &davinci_timer, |
163 | .init_machine = davinci_sffsdr_init, | |
164 | MACHINE_END |