[net-next-2.6.git] / arch / arm / mach-davinci / board-da850-evm.c

/*
 * TI DA850/OMAP-L138 EVM board
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
 * Original Copyrights follow:
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/pca953x.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/machine.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/da8xx.h>
#include <mach/nand.h>
#include <mach/mux.h>

#define DA850_EVM_PHY_MASK		0x1
#define DA850_EVM_MDIO_FREQUENCY	2200000 /* PHY bus frequency */

#define DA850_LCD_PWR_PIN		GPIO_TO_PIN(2, 8)
#define DA850_LCD_BL_PIN		GPIO_TO_PIN(2, 15)

#define DA850_MMCSD_CD_PIN		GPIO_TO_PIN(4, 0)
#define DA850_MMCSD_WP_PIN		GPIO_TO_PIN(4, 1)

#define DA850_MII_MDIO_CLKEN_PIN	GPIO_TO_PIN(2, 6)

static struct mtd_partition da850_evm_norflash_partition[] = {
	{
		.name           = "bootloaders + env",
		.offset         = 0,
		.size           = SZ_512K,
		.mask_flags     = MTD_WRITEABLE,
	},
	{
		.name           = "kernel",
		.offset         = MTDPART_OFS_APPEND,
		.size           = SZ_2M,
		.mask_flags     = 0,
	},
	{
		.name           = "filesystem",
		.offset         = MTDPART_OFS_APPEND,
		.size           = MTDPART_SIZ_FULL,
		.mask_flags     = 0,
	},
};

static struct physmap_flash_data da850_evm_norflash_data = {
	.width		= 2,
	.parts		= da850_evm_norflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_norflash_partition),
};

static struct resource da850_evm_norflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS2_BASE,
		.end	= DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_norflash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data  = &da850_evm_norflash_data,
	},
	.num_resources	= 1,
	.resource	= da850_evm_norflash_resource,
};

/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
 * (128K blocks). It may be used instead of the (default) SPI flash
 * to boot, using TI's tools to install the secondary boot loader
 * (UBL) and U-Boot.
 */
struct mtd_partition da850_evm_nandflash_partition[] = {
	{
		.name		= "u-boot env",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	 },
	{
		.name		= "UBL",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "u-boot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 4 * SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "kernel",
		.offset		= 0x200000,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	},
};

static struct davinci_nand_pdata da850_evm_nandflash_data = {
	.parts		= da850_evm_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_nandflash_partition),
	.ecc_mode	= NAND_ECC_HW,
	.options	= NAND_USE_FLASH_BBT,
};

static struct resource da850_evm_nandflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_nandflash_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da850_evm_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(da850_evm_nandflash_resource),
	.resource	= da850_evm_nandflash_resource,
};

static struct platform_device *da850_evm_devices[] __initdata = {
	&da850_evm_nandflash_device,
	&da850_evm_norflash_device,
};

#define DA8XX_AEMIF_CE2CFG_OFFSET	0x10
#define DA8XX_AEMIF_ASIZE_16BIT		0x1

static void __init da850_evm_init_nor(void)
{
	void __iomem *aemif_addr;

	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);

	/* Configure data bus width of CS2 to 16 bit */
	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
		DA8XX_AEMIF_ASIZE_16BIT,
		aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);

	iounmap(aemif_addr);
}

static u32 ui_card_detected;

#if defined(CONFIG_MMC_DAVINCI) || \
    defined(CONFIG_MMC_DAVINCI_MODULE)
#define HAS_MMC 1
#else
#define HAS_MMC 0
#endif

static __init void da850_evm_setup_nor_nand(void)
{
	int ret = 0;

	if (ui_card_detected & !HAS_MMC) {
		ret = da8xx_pinmux_setup(da850_nand_pins);
		if (ret)
			pr_warning("da850_evm_init: nand mux setup failed: "
					"%d\n", ret);

		ret = da8xx_pinmux_setup(da850_nor_pins);
		if (ret)
			pr_warning("da850_evm_init: nor mux setup failed: %d\n",
				ret);

		da850_evm_init_nor();

		platform_add_devices(da850_evm_devices,
					ARRAY_SIZE(da850_evm_devices));
	}
}

#ifdef CONFIG_DA850_UI_RMII
static inline void da850_evm_setup_emac_rmii(int rmii_sel)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	soc_info->emac_pdata->rmii_en = 1;
	gpio_set_value(rmii_sel, 0);
}
#else
static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
#endif

static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
						unsigned ngpio, void *c)
{
	int sel_a, sel_b, sel_c, ret;

	sel_a = gpio + 7;
	sel_b = gpio + 6;
	sel_c = gpio + 5;

	ret = gpio_request(sel_a, "sel_a");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_a);
		goto exp_setup_sela_fail;
	}

	ret = gpio_request(sel_b, "sel_b");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_b);
		goto exp_setup_selb_fail;
	}

	ret = gpio_request(sel_c, "sel_c");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_c);
		goto exp_setup_selc_fail;
	}

	/* deselect all functionalities */
	gpio_direction_output(sel_a, 1);
	gpio_direction_output(sel_b, 1);
	gpio_direction_output(sel_c, 1);

	ui_card_detected = 1;
	pr_info("DA850/OMAP-L138 EVM UI card detected\n");

	da850_evm_setup_nor_nand();

	da850_evm_setup_emac_rmii(sel_a);

	return 0;

exp_setup_selc_fail:
	gpio_free(sel_b);
exp_setup_selb_fail:
	gpio_free(sel_a);
exp_setup_sela_fail:
	return ret;
}

static int da850_evm_ui_expander_teardown(struct i2c_client *client,
					unsigned gpio, unsigned ngpio, void *c)
{
	/* deselect all functionalities */
	gpio_set_value(gpio + 5, 1);
	gpio_set_value(gpio + 6, 1);
	gpio_set_value(gpio + 7, 1);

	gpio_free(gpio + 5);
	gpio_free(gpio + 6);
	gpio_free(gpio + 7);

	return 0;
}

static struct pca953x_platform_data da850_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da850_evm_ui_expander_setup,
	.teardown	= da850_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("tca6416", 0x20),
		.platform_data = &da850_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

static struct davinci_uart_config da850_evm_uart_config __initdata = {
	.enabled_uarts = 0x7,
};

/* davinci da850 evm audio machine driver */
static u8 da850_iis_serializer_direction[] = {
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	TX_MODE,
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da850_evm_snd_data = {
	.tx_dma_offset	= 0x2000,
	.rx_dma_offset	= 0x2000,
	.op_mode	= DAVINCI_MCASP_IIS_MODE,
	.num_serializer	= ARRAY_SIZE(da850_iis_serializer_direction),
	.tdm_slots	= 2,
	.serial_dir	= da850_iis_serializer_direction,
	.eventq_no	= EVENTQ_1,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

static int da850_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA850_MMCSD_WP_PIN);
}

static int da850_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA850_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da850_mmc_config = {
	.get_ro		= da850_evm_mmc_get_ro,
	.get_cd		= da850_evm_mmc_get_cd,
	.wires		= 4,
	.max_freq	= 50000000,
	.caps		= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version	= MMC_CTLR_VERSION_2,
};

static void da850_panel_power_ctrl(int val)
{
	/* lcd backlight */
	gpio_set_value(DA850_LCD_BL_PIN, val);

	/* lcd power */
	gpio_set_value(DA850_LCD_PWR_PIN, val);
}

static int da850_lcd_hw_init(void)
{
	int status;

	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	if (status < 0)
		return status;

	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	if (status < 0) {
		gpio_free(DA850_LCD_BL_PIN);
		return status;
	}

	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	gpio_direction_output(DA850_LCD_PWR_PIN, 0);

	/* Switch off panel power and backlight */
	da850_panel_power_ctrl(0);

	/* Switch on panel power and backlight */
	da850_panel_power_ctrl(1);

	return 0;
}

/* TPS65070 voltage regulator support */

/* 3.3V */
struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	{
		.supply = "usb0_vdda33",
	},
	{
		.supply = "usb1_vdda33",
	},
};

/* 3.3V or 1.8V */
struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	{
		.supply = "dvdd3318_a",
	},
	{
		.supply = "dvdd3318_b",
	},
	{
		.supply = "dvdd3318_c",
	},
};

/* 1.2V */
struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	{
		.supply = "cvdd",
	},
};

/* 1.8V LDO */
struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	{
		.supply = "sata_vddr",
	},
	{
		.supply = "usb0_vdda18",
	},
	{
		.supply = "usb1_vdda18",
	},
	{
		.supply = "ddr_dvdd18",
	},
};

/* 1.2V LDO */
struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	{
		.supply = "sata_vdd",
	},
	{
		.supply = "pll0_vdda",
	},
	{
		.supply = "pll1_vdda",
	},
	{
		.supply = "usbs_cvdd",
	},
	{
		.supply = "vddarnwa1",
	},
};

struct regulator_init_data tps65070_regulator_data[] = {
	/* dcdc1 */
	{
		.constraints = {
			.min_uV = 3150000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
		.consumer_supplies = tps65070_dcdc1_consumers,
	},

	/* dcdc2 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
		.consumer_supplies = tps65070_dcdc2_consumers,
	},

	/* dcdc3 */
	{
		.constraints = {
			.min_uV = 950000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
		.consumer_supplies = tps65070_dcdc3_consumers,
	},

	/* ldo1 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 1890000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
		.consumer_supplies = tps65070_ldo1_consumers,
	},

	/* ldo2 */
	{
		.constraints = {
			.min_uV = 1140000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
		.consumer_supplies = tps65070_ldo2_consumers,
	},
};

static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
	{
		I2C_BOARD_INFO("tps6507x", 0x48),
		.platform_data = &tps65070_regulator_data[0],
	},
};

static int __init pmic_tps65070_init(void)
{
	return i2c_register_board_info(1, da850evm_tps65070_info,
					ARRAY_SIZE(da850evm_tps65070_info));
}

static const short da850_evm_lcdc_pins[] = {
	DA850_GPIO2_8, DA850_GPIO2_15,
	-1
};

static int __init da850_evm_config_emac(void)
{
	void __iomem *cfg_chip3_base;
	int ret;
	u32 val;
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	u8 rmii_en = soc_info->emac_pdata->rmii_en;

	if (!machine_is_davinci_da850_evm())
		return 0;

	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);

	val = __raw_readl(cfg_chip3_base);

	if (rmii_en) {
		val |= BIT(8);
		ret = da8xx_pinmux_setup(da850_rmii_pins);
		pr_info("EMAC: RMII PHY configured, MII PHY will not be"
							" functional\n");
	} else {
		val &= ~BIT(8);
		ret = da8xx_pinmux_setup(da850_cpgmac_pins);
		pr_info("EMAC: MII PHY configured, RMII PHY will not be"
							" functional\n");
	}

	if (ret)
		pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
				ret);

	/* configure the CFGCHIP3 register for RMII or MII */
	__raw_writel(val, cfg_chip3_base);

	ret = davinci_cfg_reg(DA850_GPIO2_6);
	if (ret)
		pr_warning("da850_evm_init:GPIO(2,6) mux setup "
							"failed\n");

	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	if (ret) {
		pr_warning("Cannot open GPIO %d\n",
					DA850_MII_MDIO_CLKEN_PIN);
		return ret;
	}

	/* Enable/Disable MII MDIO clock */
	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);

	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da850_evm_init: emac registration failed: %d\n",
				ret);

	return 0;
}
device_initcall(da850_evm_config_emac);

static __init void da850_evm_init(void)
{
	int ret;

	ret = pmic_tps65070_init();
	if (ret)
		pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
				ret);

	ret = da8xx_register_edma();
	if (ret)
		pr_warning("da850_evm_init: edma registration failed: %d\n",
				ret);

	ret = da8xx_pinmux_setup(da850_i2c0_pins);
	if (ret)
		pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
				ret);


	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	if (HAS_MMC) {
		ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
					" %d\n", ret);

		ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_CD_PIN);
		gpio_direction_input(DA850_MMCSD_CD_PIN);

		ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_WP_PIN);
		gpio_direction_input(DA850_MMCSD_WP_PIN);

		ret = da8xx_register_mmcsd0(&da850_mmc_config);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 registration failed:"
					" %d\n", ret);
	}

	davinci_serial_init(&da850_evm_uart_config);

	i2c_register_board_info(1, da850_evm_i2c_devices,
			ARRAY_SIZE(da850_evm_i2c_devices));

	/*
	 * shut down uart 0 and 1; they are not used on the board and
	 * accessing them causes endless "too much work in irq53" messages
	 * with arago fs
	 */
	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);

	ret = da8xx_pinmux_setup(da850_mcasp_pins);
	if (ret)
		pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(0, &da850_evm_snd_data);

	ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
	if (ret)
		pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	/* Handle board specific muxing for LCD here */
	ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
	if (ret)
		pr_warning("da850_evm_init: evm specific lcd mux setup "
				"failed: %d\n",	ret);

	ret = da850_lcd_hw_init();
	if (ret)
		pr_warning("da850_evm_init: lcd initialization failed: %d\n",
				ret);

	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
	if (ret)
		pr_warning("da850_evm_init: lcdc registration failed: %d\n",
				ret);

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);

	ret = da850_register_cpufreq();
	if (ret)
		pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
				ret);

	ret = da8xx_register_cpuidle();
	if (ret)
		pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
				ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da850_evm_console_init(void)
{
	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da850_evm_console_init);
#endif

static __init void da850_evm_irq_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
			soc_info->intc_irq_prios);
}

static void __init da850_evm_map_io(void)
{
	da850_init();
}

MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	.phys_io	= IO_PHYS,
	.io_pg_offst	= (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params	= (DA8XX_DDR_BASE + 0x100),
	.map_io		= da850_evm_map_io,
	.init_irq	= da850_evm_irq_init,
	.timer		= &davinci_timer,
	.init_machine	= da850_evm_init,
MACHINE_END
Commit	Line	Data
0fbc5592 SR	1	/*
	2	* TI DA850/OMAP-L138 EVM board
	3	*
	4	* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* Derived from: arch/arm/mach-davinci/board-da830-evm.c
	7	* Original Copyrights follow:
	8	*
	9	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	10	* the terms of the GNU General Public License version 2. This program
	11	* is licensed "as is" without any warranty of any kind, whether express
	12	* or implied.
	13	*/
	14	#include <linux/kernel.h>
0fbc5592 SR	15	#include <linux/init.h>
	16	#include <linux/console.h>
	17	#include <linux/i2c.h>
	18	#include <linux/i2c/at24.h>
75e2ea64	19	#include <linux/i2c/pca953x.h>
5cbdf276	20	#include <linux/gpio.h>
38beb929 SR	21	#include <linux/platform_device.h>
	22	#include <linux/mtd/mtd.h>
	23	#include <linux/mtd/nand.h>
	24	#include <linux/mtd/partitions.h>
7c5ec609	25	#include <linux/mtd/physmap.h>
a9eb1f67	26	#include <linux/regulator/machine.h>
0fbc5592 SR	27
	28	#include <asm/mach-types.h>
	29	#include <asm/mach/arch.h>
	30
0fbc5592 SR	31	#include <mach/cp_intc.h>
0fbc5592 SR	32	#include <mach/da8xx.h>
38beb929	33	#include <mach/nand.h>
7761ef67	34	#include <mach/mux.h>
0fbc5592	35
5a4b1315 SR	36	#define DA850_EVM_PHY_MASK 0x1
	37	#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
	38
7761ef67	39	#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276	40	#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276	41
700691f2 SR	42	#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
	43	#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
	44
2206771c C	45	#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
2206771c C	46
7c5ec609 SR	47	static struct mtd_partition da850_evm_norflash_partition[] = {
7c5ec609 SR	48	{
e2abd5a2	49	.name = "bootloaders + env",
7c5ec609	50	.offset = 0,
e2abd5a2 SR	51	.size = SZ_512K,
	52	.mask_flags = MTD_WRITEABLE,
	53	},
	54	{
	55	.name = "kernel",
	56	.offset = MTDPART_OFS_APPEND,
	57	.size = SZ_2M,
	58	.mask_flags = 0,
	59	},
	60	{
	61	.name = "filesystem",
	62	.offset = MTDPART_OFS_APPEND,
7c5ec609 SR	63	.size = MTDPART_SIZ_FULL,
	64	.mask_flags = 0,
	65	},
	66	};
	67
	68	static struct physmap_flash_data da850_evm_norflash_data = {
	69	.width = 2,
	70	.parts = da850_evm_norflash_partition,
	71	.nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
	72	};
	73
	74	static struct resource da850_evm_norflash_resource[] = {
	75	{
	76	.start = DA8XX_AEMIF_CS2_BASE,
	77	.end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
	78	.flags = IORESOURCE_MEM,
	79	},
	80	};
	81
	82	static struct platform_device da850_evm_norflash_device = {
	83	.name = "physmap-flash",
	84	.id = 0,
	85	.dev = {
	86	.platform_data = &da850_evm_norflash_data,
	87	},
	88	.num_resources = 1,
	89	.resource = da850_evm_norflash_resource,
	90	};
	91
38beb929 SR	92	/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
	93	* (128K blocks). It may be used instead of the (default) SPI flash
	94	* to boot, using TI's tools to install the secondary boot loader
	95	* (UBL) and U-Boot.
	96	*/
	97	struct mtd_partition da850_evm_nandflash_partition[] = {
	98	{
	99	.name = "u-boot env",
	100	.offset = 0,
	101	.size = SZ_128K,
	102	.mask_flags = MTD_WRITEABLE,
	103	},
	104	{
	105	.name = "UBL",
	106	.offset = MTDPART_OFS_APPEND,
	107	.size = SZ_128K,
	108	.mask_flags = MTD_WRITEABLE,
	109	},
	110	{
	111	.name = "u-boot",
	112	.offset = MTDPART_OFS_APPEND,
	113	.size = 4 * SZ_128K,
	114	.mask_flags = MTD_WRITEABLE,
	115	},
	116	{
	117	.name = "kernel",
	118	.offset = 0x200000,
	119	.size = SZ_2M,
	120	.mask_flags = 0,
	121	},
	122	{
	123	.name = "filesystem",
	124	.offset = MTDPART_OFS_APPEND,
	125	.size = MTDPART_SIZ_FULL,
	126	.mask_flags = 0,
	127	},
	128	};
	129
	130	static struct davinci_nand_pdata da850_evm_nandflash_data = {
	131	.parts = da850_evm_nandflash_partition,
	132	.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
	133	.ecc_mode = NAND_ECC_HW,
	134	.options = NAND_USE_FLASH_BBT,
	135	};
	136
	137	static struct resource da850_evm_nandflash_resource[] = {
	138	{
	139	.start = DA8XX_AEMIF_CS3_BASE,
	140	.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
	141	.flags = IORESOURCE_MEM,
	142	},
	143	{
	144	.start = DA8XX_AEMIF_CTL_BASE,
	145	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
	146	.flags = IORESOURCE_MEM,
	147	},
	148	};
	149
	150	static struct platform_device da850_evm_nandflash_device = {
	151	.name = "davinci_nand",
	152	.id = 1,
	153	.dev = {
	154	.platform_data = &da850_evm_nandflash_data,
	155	},
156	.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
157	.resource = da850_evm_nandflash_resource,
158	};
159
039c5ee3 SR	160	static struct platform_device *da850_evm_devices[] __initdata = {
	161	&da850_evm_nandflash_device,
	162	&da850_evm_norflash_device,
	163	};
	164
	165	#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
	166	#define DA8XX_AEMIF_ASIZE_16BIT 0x1
	167
	168	static void __init da850_evm_init_nor(void)
	169	{
	170	void __iomem *aemif_addr;
	171
	172	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
	173
	174	/* Configure data bus width of CS2 to 16 bit */
	175	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) \|
	176	DA8XX_AEMIF_ASIZE_16BIT,
	177	aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
	178
	179	iounmap(aemif_addr);
	180	}
	181
75e2ea64	182	static u32 ui_card_detected;
039c5ee3 SR	183
	184	#if defined(CONFIG_MMC_DAVINCI) \|\| \
	185	defined(CONFIG_MMC_DAVINCI_MODULE)
	186	#define HAS_MMC 1
	187	#else
	188	#define HAS_MMC 0
	189	#endif
	190
1ef203c3	191	static __init void da850_evm_setup_nor_nand(void)
039c5ee3 SR	192	{
	193	int ret = 0;
	194
	195	if (ui_card_detected & !HAS_MMC) {
	196	ret = da8xx_pinmux_setup(da850_nand_pins);
	197	if (ret)
	198	pr_warning("da850_evm_init: nand mux setup failed: "
	199	"%d\n", ret);
	200
	201	ret = da8xx_pinmux_setup(da850_nor_pins);
	202	if (ret)
	203	pr_warning("da850_evm_init: nor mux setup failed: %d\n",
	204	ret);
	205
	206	da850_evm_init_nor();
	207
	208	platform_add_devices(da850_evm_devices,
	209	ARRAY_SIZE(da850_evm_devices));
	210	}
	211	}
75e2ea64	212
bae10587 SN	213	#ifdef CONFIG_DA850_UI_RMII
	214	static inline void da850_evm_setup_emac_rmii(int rmii_sel)
	215	{
	216	struct davinci_soc_info *soc_info = &davinci_soc_info;
	217
	218	soc_info->emac_pdata->rmii_en = 1;
	219	gpio_set_value(rmii_sel, 0);
	220	}
	221	#else
	222	static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
	223	#endif
	224
75e2ea64 C	225	static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
	226	unsigned ngpio, void *c)
	227	{
	228	int sel_a, sel_b, sel_c, ret;
	229
	230	sel_a = gpio + 7;
	231	sel_b = gpio + 6;
	232	sel_c = gpio + 5;
	233
	234	ret = gpio_request(sel_a, "sel_a");
	235	if (ret) {
	236	pr_warning("Cannot open UI expander pin %d\n", sel_a);
	237	goto exp_setup_sela_fail;
	238	}
	239
	240	ret = gpio_request(sel_b, "sel_b");
	241	if (ret) {
	242	pr_warning("Cannot open UI expander pin %d\n", sel_b);
	243	goto exp_setup_selb_fail;
	244	}
	245
	246	ret = gpio_request(sel_c, "sel_c");
	247	if (ret) {
	248	pr_warning("Cannot open UI expander pin %d\n", sel_c);
	249	goto exp_setup_selc_fail;
	250	}
	251
	252	/* deselect all functionalities */
	253	gpio_direction_output(sel_a, 1);
	254	gpio_direction_output(sel_b, 1);
	255	gpio_direction_output(sel_c, 1);
	256
	257	ui_card_detected = 1;
	258	pr_info("DA850/OMAP-L138 EVM UI card detected\n");
	259
	260	da850_evm_setup_nor_nand();
	261
bae10587	262	da850_evm_setup_emac_rmii(sel_a);
2206771c	263
75e2ea64 C	264	return 0;
	265
	266	exp_setup_selc_fail:
	267	gpio_free(sel_b);
	268	exp_setup_selb_fail:
	269	gpio_free(sel_a);
	270	exp_setup_sela_fail:
	271	return ret;
	272	}
	273
	274	static int da850_evm_ui_expander_teardown(struct i2c_client *client,
	275	unsigned gpio, unsigned ngpio, void *c)
	276	{
	277	/* deselect all functionalities */
	278	gpio_set_value(gpio + 5, 1);
	279	gpio_set_value(gpio + 6, 1);
	280	gpio_set_value(gpio + 7, 1);
	281
	282	gpio_free(gpio + 5);
	283	gpio_free(gpio + 6);
	284	gpio_free(gpio + 7);
	285
	286	return 0;
	287	}
	288
	289	static struct pca953x_platform_data da850_evm_ui_expander_info = {
	290	.gpio_base = DAVINCI_N_GPIO,
	291	.setup = da850_evm_ui_expander_setup,
	292	.teardown = da850_evm_ui_expander_teardown,
	293	};
	294
1a7ff8ff C	295	static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	296	{
	297	I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64 C	298	},
	299	{
	300	I2C_BOARD_INFO("tca6416", 0x20),
	301	.platform_data = &da850_evm_ui_expander_info,
	302	},
1a7ff8ff C	303	};
1a7ff8ff C	304
0fbc5592 SR	305	static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	306	.bus_freq = 100, /* kHz */
	307	.bus_delay = 0, /* usec */
	308	};
	309
	310	static struct davinci_uart_config da850_evm_uart_config __initdata = {
	311	.enabled_uarts = 0x7,
	312	};
	313
491214e1 C	314	/* davinci da850 evm audio machine driver */
	315	static u8 da850_iis_serializer_direction[] = {
	316	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	317	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	318	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
	319	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	320	};
	321
	322	static struct snd_platform_data da850_evm_snd_data = {
	323	.tx_dma_offset = 0x2000,
	324	.rx_dma_offset = 0x2000,
	325	.op_mode = DAVINCI_MCASP_IIS_MODE,
	326	.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
	327	.tdm_slots = 2,
	328	.serial_dir = da850_iis_serializer_direction,
	329	.eventq_no = EVENTQ_1,
	330	.version = MCASP_VERSION_2,
	331	.txnumevt = 1,
	332	.rxnumevt = 1,
	333	};
	334
700691f2 SR	335	static int da850_evm_mmc_get_ro(int index)
	336	{
	337	return gpio_get_value(DA850_MMCSD_WP_PIN);
	338	}
	339
	340	static int da850_evm_mmc_get_cd(int index)
	341	{
	342	return !gpio_get_value(DA850_MMCSD_CD_PIN);
	343	}
	344
	345	static struct davinci_mmc_config da850_mmc_config = {
	346	.get_ro = da850_evm_mmc_get_ro,
	347	.get_cd = da850_evm_mmc_get_cd,
	348	.wires = 4,
0046d0bf C	349	.max_freq = 50000000,
0046d0bf C	350	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
700691f2 SR	351	.version = MMC_CTLR_VERSION_2,
	352	};
	353
d52f235f C	354	static void da850_panel_power_ctrl(int val)
	355	{
	356	/* lcd backlight */
	357	gpio_set_value(DA850_LCD_BL_PIN, val);
	358
	359	/* lcd power */
	360	gpio_set_value(DA850_LCD_PWR_PIN, val);
	361	}
	362
5cbdf276 SR	363	static int da850_lcd_hw_init(void)
	364	{
	365	int status;
	366
	367	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	368	if (status < 0)
	369	return status;
	370
	371	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	372	if (status < 0) {
	373	gpio_free(DA850_LCD_BL_PIN);
	374	return status;
	375	}
	376
	377	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	378	gpio_direction_output(DA850_LCD_PWR_PIN, 0);
	379
d52f235f C	380	/* Switch off panel power and backlight */
d52f235f C	381	da850_panel_power_ctrl(0);
5cbdf276	382
d52f235f C	383	/* Switch on panel power and backlight */
d52f235f C	384	da850_panel_power_ctrl(1);
5cbdf276 SR	385
	386	return 0;
	387	}
491214e1	388
a9eb1f67 SN	389	/* TPS65070 voltage regulator support */
	390
	391	/* 3.3V */
	392	struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	393	{
	394	.supply = "usb0_vdda33",
	395	},
	396	{
	397	.supply = "usb1_vdda33",
	398	},
	399	};
	400
	401	/* 3.3V or 1.8V */
	402	struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	403	{
	404	.supply = "dvdd3318_a",
	405	},
	406	{
	407	.supply = "dvdd3318_b",
	408	},
	409	{
	410	.supply = "dvdd3318_c",
	411	},
	412	};
	413
	414	/* 1.2V */
	415	struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	416	{
	417	.supply = "cvdd",
	418	},
	419	};
	420
	421	/* 1.8V LDO */
	422	struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	423	{
	424	.supply = "sata_vddr",
	425	},
	426	{
	427	.supply = "usb0_vdda18",
	428	},
	429	{
	430	.supply = "usb1_vdda18",
	431	},
	432	{
	433	.supply = "ddr_dvdd18",
	434	},
	435	};
	436
	437	/* 1.2V LDO */
	438	struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	439	{
	440	.supply = "sata_vdd",
	441	},
	442	{
	443	.supply = "pll0_vdda",
	444	},
	445	{
	446	.supply = "pll1_vdda",
	447	},
	448	{
	449	.supply = "usbs_cvdd",
	450	},
	451	{
	452	.supply = "vddarnwa1",
453	},
454	};
455
456	struct regulator_init_data tps65070_regulator_data[] = {
457	/* dcdc1 */
458	{
459	.constraints = {
460	.min_uV = 3150000,
461	.max_uV = 3450000,
462	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
463	REGULATOR_CHANGE_STATUS),
464	.boot_on = 1,
465	},
466	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
467	.consumer_supplies = tps65070_dcdc1_consumers,
468	},
469
470	/* dcdc2 */
471	{
472	.constraints = {
473	.min_uV = 1710000,
474	.max_uV = 3450000,
475	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
476	REGULATOR_CHANGE_STATUS),
477	.boot_on = 1,
478	},
479	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
480	.consumer_supplies = tps65070_dcdc2_consumers,
481	},
482
483	/* dcdc3 */
484	{
485	.constraints = {
486	.min_uV = 950000,
487	.max_uV = 1320000,
488	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
489	REGULATOR_CHANGE_STATUS),
490	.boot_on = 1,
491	},
492	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
493	.consumer_supplies = tps65070_dcdc3_consumers,
494	},
495
496	/* ldo1 */
497	{
498	.constraints = {
499	.min_uV = 1710000,
500	.max_uV = 1890000,
501	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
502	REGULATOR_CHANGE_STATUS),
503	.boot_on = 1,
504	},
505	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
506	.consumer_supplies = tps65070_ldo1_consumers,
507	},
508
509	/* ldo2 */
510	{
511	.constraints = {
512	.min_uV = 1140000,
513	.max_uV = 1320000,
514	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
515	REGULATOR_CHANGE_STATUS),
516	.boot_on = 1,
517	},
518	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
519	.consumer_supplies = tps65070_ldo2_consumers,
520	},
521	};
522
523	static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
524	{
525	I2C_BOARD_INFO("tps6507x", 0x48),
526	.platform_data = &tps65070_regulator_data[0],
527	},
528	};
529
530	static int __init pmic_tps65070_init(void)
531	{
532	return i2c_register_board_info(1, da850evm_tps65070_info,
533	ARRAY_SIZE(da850evm_tps65070_info));
534	}
535
7761ef67 SR	536	static const short da850_evm_lcdc_pins[] = {
	537	DA850_GPIO2_8, DA850_GPIO2_15,
	538	-1
	539	};
	540
bae10587	541	static int __init da850_evm_config_emac(void)
2206771c C	542	{
	543	void __iomem *cfg_chip3_base;
	544	int ret;
	545	u32 val;
bae10587 SN	546	struct davinci_soc_info *soc_info = &davinci_soc_info;
	547	u8 rmii_en = soc_info->emac_pdata->rmii_en;
	548
	549	if (!machine_is_davinci_da850_evm())
	550	return 0;
2206771c	551
d2de0582	552	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c	553
2206771c	554	val = __raw_readl(cfg_chip3_base);
17fadd9a SN	555
17fadd9a SN	556	if (rmii_en) {
2206771c	557	val \|= BIT(8);
17fadd9a SN	558	ret = da8xx_pinmux_setup(da850_rmii_pins);
	559	pr_info("EMAC: RMII PHY configured, MII PHY will not be"
	560	" functional\n");
	561	} else {
2206771c	562	val &= ~BIT(8);
2206771c	563	ret = da8xx_pinmux_setup(da850_cpgmac_pins);
17fadd9a SN	564	pr_info("EMAC: MII PHY configured, RMII PHY will not be"
	565	" functional\n");
	566	}
	567
2206771c C	568	if (ret)
	569	pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
	570	ret);
	571
17fadd9a SN	572	/* configure the CFGCHIP3 register for RMII or MII */
	573	__raw_writel(val, cfg_chip3_base);
	574
2206771c C	575	ret = davinci_cfg_reg(DA850_GPIO2_6);
	576	if (ret)
	577	pr_warning("da850_evm_init:GPIO(2,6) mux setup "
	578	"failed\n");
	579
	580	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	581	if (ret) {
	582	pr_warning("Cannot open GPIO %d\n",
	583	DA850_MII_MDIO_CLKEN_PIN);
	584	return ret;
	585	}
	586
17fadd9a SN	587	/* Enable/Disable MII MDIO clock */
17fadd9a SN	588	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c	589
bae10587 SN	590	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	591	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
	592
	593	ret = da8xx_register_emac();
	594	if (ret)
	595	pr_warning("da850_evm_init: emac registration failed: %d\n",
	596	ret);
	597
2206771c C	598	return 0;
2206771c C	599	}
bae10587	600	device_initcall(da850_evm_config_emac);
2206771c	601
0fbc5592 SR	602	static __init void da850_evm_init(void)
	603	{
	604	int ret;
	605
a9eb1f67 SN	606	ret = pmic_tps65070_init();
	607	if (ret)
	608	pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
	609	ret);
	610
0fbc5592 SR	611	ret = da8xx_register_edma();
	612	if (ret)
	613	pr_warning("da850_evm_init: edma registration failed: %d\n",
	614	ret);
	615
	616	ret = da8xx_pinmux_setup(da850_i2c0_pins);
	617	if (ret)
	618	pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
	619	ret);
	620
	621	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	622	if (ret)
	623	pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
	624	ret);
	625
5a4b1315	626
0fbc5592 SR	627	ret = da8xx_register_watchdog();
	628	if (ret)
	629	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	630	ret);
	631
820c4fe3	632	if (HAS_MMC) {
820c4fe3 SR	633	ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
	634	if (ret)
	635	pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
	636	" %d\n", ret);
	637
	638	ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
	639	if (ret)
	640	pr_warning("da850_evm_init: can not open GPIO %d\n",
	641	DA850_MMCSD_CD_PIN);
	642	gpio_direction_input(DA850_MMCSD_CD_PIN);
	643
	644	ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
	645	if (ret)
	646	pr_warning("da850_evm_init: can not open GPIO %d\n",
	647	DA850_MMCSD_WP_PIN);
	648	gpio_direction_input(DA850_MMCSD_WP_PIN);
	649
	650	ret = da8xx_register_mmcsd0(&da850_mmc_config);
	651	if (ret)
	652	pr_warning("da850_evm_init: mmcsd0 registration failed:"
	653	" %d\n", ret);
	654	}
700691f2	655
0fbc5592 SR	656	davinci_serial_init(&da850_evm_uart_config);
0fbc5592 SR	657
1a7ff8ff C	658	i2c_register_board_info(1, da850_evm_i2c_devices,
	659	ARRAY_SIZE(da850_evm_i2c_devices));
	660
0fbc5592 SR	661	/*
	662	* shut down uart 0 and 1; they are not used on the board and
	663	* accessing them causes endless "too much work in irq53" messages
	664	* with arago fs
	665	*/
	666	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	667	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 C	668
	669	ret = da8xx_pinmux_setup(da850_mcasp_pins);
	670	if (ret)
	671	pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
	672	ret);
	673
b8864aa4	674	da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 SR	675
	676	ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
	677	if (ret)
	678	pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
	679	ret);
	680
7761ef67 SR	681	/* Handle board specific muxing for LCD here */
	682	ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
	683	if (ret)
	684	pr_warning("da850_evm_init: evm specific lcd mux setup "
	685	"failed: %d\n", ret);
	686
5cbdf276 SR	687	ret = da850_lcd_hw_init();
	688	if (ret)
	689	pr_warning("da850_evm_init: lcd initialization failed: %d\n",
	690	ret);
	691
d52f235f	692	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b	693	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 SR	694	if (ret)
	695	pr_warning("da850_evm_init: lcdc registration failed: %d\n",
	696	ret);
c51df70b MG	697
	698	ret = da8xx_register_rtc();
	699	if (ret)
	700	pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 SN	701
	702	ret = da850_register_cpufreq();
	703	if (ret)
	704	pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
	705	ret);
5aeb15aa SN	706
	707	ret = da8xx_register_cpuidle();
	708	if (ret)
	709	pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
	710	ret);
0fbc5592 SR	711	}
	712
	713	#ifdef CONFIG_SERIAL_8250_CONSOLE
	714	static int __init da850_evm_console_init(void)
	715	{
	716	return add_preferred_console("ttyS", 2, "115200");
	717	}
	718	console_initcall(da850_evm_console_init);
	719	#endif
	720
	721	static __init void da850_evm_irq_init(void)
	722	{
	723	struct davinci_soc_info *soc_info = &davinci_soc_info;
	724
	725	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
	726	soc_info->intc_irq_prios);
	727	}
	728
	729	static void __init da850_evm_map_io(void)
	730	{
	731	da850_init();
	732	}
	733
	734	MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	735	.phys_io = IO_PHYS,
	736	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	737	.boot_params = (DA8XX_DDR_BASE + 0x100),
	738	.map_io = da850_evm_map_io,
	739	.init_irq = da850_evm_irq_init,
	740	.timer = &davinci_timer,
	741	.init_machine = da850_evm_init,
	742	MACHINE_END