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davinci: am17x/da830/omap-l137 evm: setup NAND flash timing
[net-next-2.6.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
0bc20bba 20#include <linux/mfd/tps6507x.h>
5cbdf276 21#include <linux/gpio.h>
38beb929
SR		 22#include <linux/platform_device.h>
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/nand.h>
25#include <linux/mtd/partitions.h>
7c5ec609 26#include <linux/mtd/physmap.h>
a9eb1f67 27#include <linux/regulator/machine.h>
8b24599e 28#include <linux/regulator/tps6507x.h>
da1e3680
TF		 29#include <linux/mfd/tps6507x.h>
30#include <linux/input/tps6507x-ts.h>
0fbc5592
SR		 31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34
0fbc5592
SR		 35#include <mach/cp_intc.h>
36#include <mach/da8xx.h>
38beb929 37#include <mach/nand.h>
7761ef67 38#include <mach/mux.h>
0fbc5592 39
5a4b1315
SR		 40#define DA850_EVM_PHY_MASK 0x1
41#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
42
7761ef67 43#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 44#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 45
700691f2
SR		 46#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
47#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
48
2206771c
C		 49#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
50
7c5ec609
SR		 51static struct mtd_partition da850_evm_norflash_partition[] = {
52 {
e2abd5a2 53 .name = "bootloaders + env",
7c5ec609 54 .offset = 0,
e2abd5a2
SR		 55 .size = SZ_512K,
56 .mask_flags = MTD_WRITEABLE,
57 },
58 {
59 .name = "kernel",
60 .offset = MTDPART_OFS_APPEND,
61 .size = SZ_2M,
62 .mask_flags = 0,
63 },
64 {
65 .name = "filesystem",
66 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 67 .size = MTDPART_SIZ_FULL,
68 .mask_flags = 0,
69 },
70};
71
72static struct physmap_flash_data da850_evm_norflash_data = {
73 .width = 2,
74 .parts = da850_evm_norflash_partition,
75 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
76};
77
78static struct resource da850_evm_norflash_resource[] = {
79 {
80 .start = DA8XX_AEMIF_CS2_BASE,
81 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
82 .flags = IORESOURCE_MEM,
83 },
84};
85
86static struct platform_device da850_evm_norflash_device = {
87 .name = "physmap-flash",
88 .id = 0,
89 .dev = {
90 .platform_data = &da850_evm_norflash_data,
91 },
92 .num_resources = 1,
93 .resource = da850_evm_norflash_resource,
94};
95
63534443
SN		 96static struct davinci_pm_config da850_pm_pdata = {
97 .sleepcount = 128,
98};
99
100static struct platform_device da850_pm_device = {
101 .name = "pm-davinci",
102 .dev = {
103 .platform_data = &da850_pm_pdata,
104 },
105 .id = -1,
106};
107
38beb929
SR		 108/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
109 * (128K blocks). It may be used instead of the (default) SPI flash
110 * to boot, using TI's tools to install the secondary boot loader
111 * (UBL) and U-Boot.
112 */
db549d22 113static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 114 {
115 .name = "u-boot env",
116 .offset = 0,
117 .size = SZ_128K,
118 .mask_flags = MTD_WRITEABLE,
119 },
120 {
121 .name = "UBL",
122 .offset = MTDPART_OFS_APPEND,
123 .size = SZ_128K,
124 .mask_flags = MTD_WRITEABLE,
125 },
126 {
127 .name = "u-boot",
128 .offset = MTDPART_OFS_APPEND,
129 .size = 4 * SZ_128K,
130 .mask_flags = MTD_WRITEABLE,
131 },
132 {
133 .name = "kernel",
134 .offset = 0x200000,
135 .size = SZ_2M,
136 .mask_flags = 0,
137 },
138 {
139 .name = "filesystem",
140 .offset = MTDPART_OFS_APPEND,
141 .size = MTDPART_SIZ_FULL,
142 .mask_flags = 0,
143 },
144};
145
146static struct davinci_nand_pdata da850_evm_nandflash_data = {
147 .parts = da850_evm_nandflash_partition,
148 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
149 .ecc_mode = NAND_ECC_HW,
fc42e335 150 .ecc_bits = 4,
38beb929
SR		 151 .options = NAND_USE_FLASH_BBT,
152};
153
154static struct resource da850_evm_nandflash_resource[] = {
155 {
156 .start = DA8XX_AEMIF_CS3_BASE,
157 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 {
161 .start = DA8XX_AEMIF_CTL_BASE,
162 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
163 .flags = IORESOURCE_MEM,
164 },
165};
166
167static struct platform_device da850_evm_nandflash_device = {
168 .name = "davinci_nand",
169 .id = 1,
170 .dev = {
171 .platform_data = &da850_evm_nandflash_data,
172 },
173 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
174 .resource = da850_evm_nandflash_resource,
175};
176
039c5ee3
SR		 177static struct platform_device *da850_evm_devices[] __initdata = {
178 &da850_evm_nandflash_device,
179 &da850_evm_norflash_device,
180};
181
182#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
183#define DA8XX_AEMIF_ASIZE_16BIT 0x1
184
185static void __init da850_evm_init_nor(void)
186{
187 void __iomem *aemif_addr;
188
189 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
190
191 /* Configure data bus width of CS2 to 16 bit */
192 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
193 DA8XX_AEMIF_ASIZE_16BIT,
194 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
195
196 iounmap(aemif_addr);
197}
198
f48ecc2f
SS		 199static const short da850_evm_nand_pins[] = {
200 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
201 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
202 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
203 DA850_NEMA_WE, DA850_NEMA_OE,
204 -1
205};
206
207static const short da850_evm_nor_pins[] = {
208 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
209 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
210 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
211 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
212 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
213 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
214 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
215 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
216 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
217 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
218 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
219 DA850_EMA_A_22, DA850_EMA_A_23,
220 -1
221};
222
75e2ea64 223static u32 ui_card_detected;
039c5ee3
SR		 224
225#if defined(CONFIG_MMC_DAVINCI) || \
226 defined(CONFIG_MMC_DAVINCI_MODULE)
227#define HAS_MMC 1
228#else
229#define HAS_MMC 0
230#endif
231
f48ecc2f 232static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 233{
234 int ret = 0;
235
236 if (ui_card_detected & !HAS_MMC) {
f48ecc2f 237 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 238 if (ret)
239 pr_warning("da850_evm_init: nand mux setup failed: "
240 "%d\n", ret);
241
f48ecc2f 242 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 243 if (ret)
244 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
245 ret);
246
247 da850_evm_init_nor();
248
249 platform_add_devices(da850_evm_devices,
250 ARRAY_SIZE(da850_evm_devices));
251 }
252}
75e2ea64 253
bae10587
SN		 254#ifdef CONFIG_DA850_UI_RMII
255static inline void da850_evm_setup_emac_rmii(int rmii_sel)
256{
257 struct davinci_soc_info *soc_info = &davinci_soc_info;
258
259 soc_info->emac_pdata->rmii_en = 1;
260 gpio_set_value(rmii_sel, 0);
261}
262#else
263static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
264#endif
265
75e2ea64
C		 266static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
267 unsigned ngpio, void *c)
268{
269 int sel_a, sel_b, sel_c, ret;
270
271 sel_a = gpio + 7;
272 sel_b = gpio + 6;
273 sel_c = gpio + 5;
274
275 ret = gpio_request(sel_a, "sel_a");
276 if (ret) {
277 pr_warning("Cannot open UI expander pin %d\n", sel_a);
278 goto exp_setup_sela_fail;
279 }
280
281 ret = gpio_request(sel_b, "sel_b");
282 if (ret) {
283 pr_warning("Cannot open UI expander pin %d\n", sel_b);
284 goto exp_setup_selb_fail;
285 }
286
287 ret = gpio_request(sel_c, "sel_c");
288 if (ret) {
289 pr_warning("Cannot open UI expander pin %d\n", sel_c);
290 goto exp_setup_selc_fail;
291 }
292
293 /* deselect all functionalities */
294 gpio_direction_output(sel_a, 1);
295 gpio_direction_output(sel_b, 1);
296 gpio_direction_output(sel_c, 1);
297
298 ui_card_detected = 1;
299 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
300
301 da850_evm_setup_nor_nand();
302
bae10587 303 da850_evm_setup_emac_rmii(sel_a);
2206771c 304
75e2ea64
C		 305 return 0;
306
307exp_setup_selc_fail:
308 gpio_free(sel_b);
309exp_setup_selb_fail:
310 gpio_free(sel_a);
311exp_setup_sela_fail:
312 return ret;
313}
314
315static int da850_evm_ui_expander_teardown(struct i2c_client *client,
316 unsigned gpio, unsigned ngpio, void *c)
317{
318 /* deselect all functionalities */
319 gpio_set_value(gpio + 5, 1);
320 gpio_set_value(gpio + 6, 1);
321 gpio_set_value(gpio + 7, 1);
322
323 gpio_free(gpio + 5);
324 gpio_free(gpio + 6);
325 gpio_free(gpio + 7);
326
327 return 0;
328}
329
330static struct pca953x_platform_data da850_evm_ui_expander_info = {
331 .gpio_base = DAVINCI_N_GPIO,
332 .setup = da850_evm_ui_expander_setup,
333 .teardown = da850_evm_ui_expander_teardown,
334};
335
1a7ff8ff
C		 336static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
337 {
338 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 339 },
340 {
341 I2C_BOARD_INFO("tca6416", 0x20),
342 .platform_data = &da850_evm_ui_expander_info,
343 },
1a7ff8ff
C		 344};
345
0fbc5592
SR		 346static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
347 .bus_freq = 100, /* kHz */
348 .bus_delay = 0, /* usec */
349};
350
351static struct davinci_uart_config da850_evm_uart_config __initdata = {
352 .enabled_uarts = 0x7,
353};
354
491214e1
C		 355/* davinci da850 evm audio machine driver */
356static u8 da850_iis_serializer_direction[] = {
357 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
358 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
359 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
360 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
361};
362
363static struct snd_platform_data da850_evm_snd_data = {
364 .tx_dma_offset = 0x2000,
365 .rx_dma_offset = 0x2000,
366 .op_mode = DAVINCI_MCASP_IIS_MODE,
367 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
368 .tdm_slots = 2,
369 .serial_dir = da850_iis_serializer_direction,
48519f0a 370 .asp_chan_q = EVENTQ_1,
491214e1
C		 371 .version = MCASP_VERSION_2,
372 .txnumevt = 1,
373 .rxnumevt = 1,
374};
375
700691f2
SR		 376static int da850_evm_mmc_get_ro(int index)
377{
378 return gpio_get_value(DA850_MMCSD_WP_PIN);
379}
380
381static int da850_evm_mmc_get_cd(int index)
382{
383 return !gpio_get_value(DA850_MMCSD_CD_PIN);
384}
385
386static struct davinci_mmc_config da850_mmc_config = {
387 .get_ro = da850_evm_mmc_get_ro,
388 .get_cd = da850_evm_mmc_get_cd,
389 .wires = 4,
0046d0bf
C		 390 .max_freq = 50000000,
391 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 392 .version = MMC_CTLR_VERSION_2,
393};
394
d52f235f
C		 395static void da850_panel_power_ctrl(int val)
396{
397 /* lcd backlight */
398 gpio_set_value(DA850_LCD_BL_PIN, val);
399
400 /* lcd power */
401 gpio_set_value(DA850_LCD_PWR_PIN, val);
402}
403
5cbdf276
SR		 404static int da850_lcd_hw_init(void)
405{
406 int status;
407
408 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
409 if (status < 0)
410 return status;
411
412 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
413 if (status < 0) {
414 gpio_free(DA850_LCD_BL_PIN);
415 return status;
416 }
417
418 gpio_direction_output(DA850_LCD_BL_PIN, 0);
419 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
420
d52f235f
C		 421 /* Switch off panel power and backlight */
422 da850_panel_power_ctrl(0);
5cbdf276 423
d52f235f
C		 424 /* Switch on panel power and backlight */
425 da850_panel_power_ctrl(1);
5cbdf276
SR		 426
427 return 0;
428}
491214e1 429
a9eb1f67
SN		 430/* TPS65070 voltage regulator support */
431
432/* 3.3V */
db549d22 433static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 434 {
435 .supply = "usb0_vdda33",
436 },
437 {
438 .supply = "usb1_vdda33",
439 },
440};
441
442/* 3.3V or 1.8V */
db549d22 443static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 444 {
445 .supply = "dvdd3318_a",
446 },
447 {
448 .supply = "dvdd3318_b",
449 },
450 {
451 .supply = "dvdd3318_c",
452 },
453};
454
455/* 1.2V */
db549d22 456static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 457 {
458 .supply = "cvdd",
459 },
460};
461
462/* 1.8V LDO */
db549d22 463static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 464 {
465 .supply = "sata_vddr",
466 },
467 {
468 .supply = "usb0_vdda18",
469 },
470 {
471 .supply = "usb1_vdda18",
472 },
473 {
474 .supply = "ddr_dvdd18",
475 },
476};
477
478/* 1.2V LDO */
db549d22 479static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 480 {
481 .supply = "sata_vdd",
482 },
483 {
484 .supply = "pll0_vdda",
485 },
486 {
487 .supply = "pll1_vdda",
488 },
489 {
490 .supply = "usbs_cvdd",
491 },
492 {
493 .supply = "vddarnwa1",
494 },
495};
496
8b24599e
SN		 497/* We take advantage of the fact that both defdcdc{2,3} are tied high */
498static struct tps6507x_reg_platform_data tps6507x_platform_data = {
499 .defdcdc_default = true,
500};
501
db549d22 502static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 503 /* dcdc1 */
504 {
505 .constraints = {
506 .min_uV = 3150000,
507 .max_uV = 3450000,
508 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
509 REGULATOR_CHANGE_STATUS),
510 .boot_on = 1,
511 },
512 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
513 .consumer_supplies = tps65070_dcdc1_consumers,
514 },
515
516 /* dcdc2 */
517 {
518 .constraints = {
519 .min_uV = 1710000,
520 .max_uV = 3450000,
521 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
522 REGULATOR_CHANGE_STATUS),
523 .boot_on = 1,
524 },
525 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
526 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 527 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 528 },
529
530 /* dcdc3 */
531 {
532 .constraints = {
533 .min_uV = 950000,
534 .max_uV = 1320000,
535 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
536 REGULATOR_CHANGE_STATUS),
537 .boot_on = 1,
538 },
539 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
540 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 541 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 542 },
543
544 /* ldo1 */
545 {
546 .constraints = {
547 .min_uV = 1710000,
548 .max_uV = 1890000,
549 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
550 REGULATOR_CHANGE_STATUS),
551 .boot_on = 1,
552 },
553 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
554 .consumer_supplies = tps65070_ldo1_consumers,
555 },
556
557 /* ldo2 */
558 {
559 .constraints = {
560 .min_uV = 1140000,
561 .max_uV = 1320000,
562 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
563 REGULATOR_CHANGE_STATUS),
564 .boot_on = 1,
565 },
566 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
567 .consumer_supplies = tps65070_ldo2_consumers,
568 },
569};
570
da1e3680
TF		 571static struct touchscreen_init_data tps6507x_touchscreen_data = {
572 .poll_period = 30, /* ms between touch samples */
573 .min_pressure = 0x30, /* minimum pressure to trigger touch */
574 .vref = 0, /* turn off vref when not using A/D */
575 .vendor = 0, /* /sys/class/input/input?/id/vendor */
576 .product = 65070, /* /sys/class/input/input?/id/product */
577 .version = 0x100, /* /sys/class/input/input?/id/version */
578};
579
0bc20bba
TF		 580static struct tps6507x_board tps_board = {
581 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 582 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 583};
584
a9eb1f67
SN		 585static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
586 {
587 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 588 .platform_data = &tps_board,
a9eb1f67
SN		 589 },
590};
591
592static int __init pmic_tps65070_init(void)
593{
594 return i2c_register_board_info(1, da850evm_tps65070_info,
595 ARRAY_SIZE(da850evm_tps65070_info));
596}
597
7761ef67
SR		 598static const short da850_evm_lcdc_pins[] = {
599 DA850_GPIO2_8, DA850_GPIO2_15,
600 -1
601};
602
85b8307f
SS		 603static const short da850_evm_mii_pins[] = {
604 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
605 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
606 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
607 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
608 DA850_MDIO_D,
609 -1
610};
611
612static const short da850_evm_rmii_pins[] = {
613 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
614 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
615 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
616 DA850_MDIO_D,
617 -1
618};
619
bae10587 620static int __init da850_evm_config_emac(void)
2206771c
C		 621{
622 void __iomem *cfg_chip3_base;
623 int ret;
624 u32 val;
bae10587
SN		 625 struct davinci_soc_info *soc_info = &davinci_soc_info;
626 u8 rmii_en = soc_info->emac_pdata->rmii_en;
627
628 if (!machine_is_davinci_da850_evm())
629 return 0;
2206771c 630
d2de0582 631 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 632
2206771c 633 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 634
635 if (rmii_en) {
2206771c 636 val |= BIT(8);
85b8307f 637 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 638 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
639 " functional\n");
640 } else {
2206771c 641 val &= ~BIT(8);
85b8307f 642 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 643 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
644 " functional\n");
645 }
646
2206771c
C		 647 if (ret)
648 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
649 ret);
650
17fadd9a
SN		 651 /* configure the CFGCHIP3 register for RMII or MII */
652 __raw_writel(val, cfg_chip3_base);
653
2206771c
C		 654 ret = davinci_cfg_reg(DA850_GPIO2_6);
655 if (ret)
656 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
657 "failed\n");
658
659 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
660 if (ret) {
661 pr_warning("Cannot open GPIO %d\n",
662 DA850_MII_MDIO_CLKEN_PIN);
663 return ret;
664 }
665
17fadd9a
SN		 666 /* Enable/Disable MII MDIO clock */
667 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 668
bae10587
SN		 669 soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
670 soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
671
672 ret = da8xx_register_emac();
673 if (ret)
674 pr_warning("da850_evm_init: emac registration failed: %d\n",
675 ret);
676
2206771c
C		 677 return 0;
678}
bae10587 679device_initcall(da850_evm_config_emac);
2206771c 680
a941c503
RS		 681/*
682 * The following EDMA channels/slots are not being used by drivers (for
683 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
684 * they are being reserved for codecs on the DSP side.
685 */
686static const s16 da850_dma0_rsv_chans[][2] = {
687 /* (offset, number) */
688 { 8, 6},
689 {24, 4},
690 {30, 2},
691 {-1, -1}
692};
693
694static const s16 da850_dma0_rsv_slots[][2] = {
695 /* (offset, number) */
696 { 8, 6},
697 {24, 4},
698 {30, 50},
699 {-1, -1}
700};
701
702static const s16 da850_dma1_rsv_chans[][2] = {
703 /* (offset, number) */
704 { 0, 28},
705 {30, 2},
706 {-1, -1}
707};
708
709static const s16 da850_dma1_rsv_slots[][2] = {
710 /* (offset, number) */
711 { 0, 28},
712 {30, 90},
713 {-1, -1}
714};
715
716static struct edma_rsv_info da850_edma_cc0_rsv = {
717 .rsv_chans = da850_dma0_rsv_chans,
718 .rsv_slots = da850_dma0_rsv_slots,
719};
720
721static struct edma_rsv_info da850_edma_cc1_rsv = {
722 .rsv_chans = da850_dma1_rsv_chans,
723 .rsv_slots = da850_dma1_rsv_slots,
724};
725
726static struct edma_rsv_info *da850_edma_rsv[2] = {
727 &da850_edma_cc0_rsv,
728 &da850_edma_cc1_rsv,
729};
730
0fbc5592
SR		 731static __init void da850_evm_init(void)
732{
733 int ret;
734
a9eb1f67
SN		 735 ret = pmic_tps65070_init();
736 if (ret)
737 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
738 ret);
739
a941c503 740 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 741 if (ret)
742 pr_warning("da850_evm_init: edma registration failed: %d\n",
743 ret);
744
3821d10a 745 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 746 if (ret)
747 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
748 ret);
749
750 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
751 if (ret)
752 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
753 ret);
754
5a4b1315 755
0fbc5592
SR		 756 ret = da8xx_register_watchdog();
757 if (ret)
758 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
759 ret);
760
820c4fe3 761 if (HAS_MMC) {
3821d10a 762 ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
820c4fe3
SR		 763 if (ret)
764 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
765 " %d\n", ret);
766
767 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
768 if (ret)
769 pr_warning("da850_evm_init: can not open GPIO %d\n",
770 DA850_MMCSD_CD_PIN);
771 gpio_direction_input(DA850_MMCSD_CD_PIN);
772
773 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
774 if (ret)
775 pr_warning("da850_evm_init: can not open GPIO %d\n",
776 DA850_MMCSD_WP_PIN);
777 gpio_direction_input(DA850_MMCSD_WP_PIN);
778
779 ret = da8xx_register_mmcsd0(&da850_mmc_config);
780 if (ret)
781 pr_warning("da850_evm_init: mmcsd0 registration failed:"
782 " %d\n", ret);
783 }
700691f2 784
0fbc5592
SR		 785 davinci_serial_init(&da850_evm_uart_config);
786
1a7ff8ff
C		 787 i2c_register_board_info(1, da850_evm_i2c_devices,
788 ARRAY_SIZE(da850_evm_i2c_devices));
789
0fbc5592
SR		 790 /*
791 * shut down uart 0 and 1; they are not used on the board and
792 * accessing them causes endless "too much work in irq53" messages
793 * with arago fs
794 */
795 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
796 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 797
3821d10a 798 ret = davinci_cfg_reg_list(da850_mcasp_pins);
491214e1
C		 799 if (ret)
800 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
801 ret);
802
b8864aa4 803 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 804
3821d10a 805 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 806 if (ret)
807 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
808 ret);
809
7761ef67 810 /* Handle board specific muxing for LCD here */
3821d10a 811 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 812 if (ret)
813 pr_warning("da850_evm_init: evm specific lcd mux setup "
814 "failed: %d\n", ret);
815
5cbdf276
SR		 816 ret = da850_lcd_hw_init();
817 if (ret)
818 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
819 ret);
820
d52f235f 821 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 822 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 823 if (ret)
824 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
825 ret);
c51df70b
MG		 826
827 ret = da8xx_register_rtc();
828 if (ret)
829 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 830
b987c4b2 831 ret = da850_register_cpufreq("pll0_sysclk3");
09dc2d45
SN		 832 if (ret)
833 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
834 ret);
5aeb15aa
SN		 835
836 ret = da8xx_register_cpuidle();
837 if (ret)
838 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
839 ret);
63534443
SN		 840
841 ret = da850_register_pm(&da850_pm_device);
842 if (ret)
843 pr_warning("da850_evm_init: suspend registration failed: %d\n",
844 ret);
0fbc5592
SR		 845}
846
847#ifdef CONFIG_SERIAL_8250_CONSOLE
848static int __init da850_evm_console_init(void)
849{
850 return add_preferred_console("ttyS", 2, "115200");
851}
852console_initcall(da850_evm_console_init);
853#endif
854
0fbc5592
SR		 855static void __init da850_evm_map_io(void)
856{
857 da850_init();
858}
859
48ea89ea 860MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
0fbc5592
SR		 861 .phys_io = IO_PHYS,
862 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
863 .boot_params = (DA8XX_DDR_BASE + 0x100),
864 .map_io = da850_evm_map_io,
bd808947 865 .init_irq = cp_intc_init,
0fbc5592
SR		 866 .timer = &davinci_timer,
867 .init_machine = da850_evm_init,
868MACHINE_END
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