[net-next-2.6.git] / arch / arm / include / asm / kgdb.h

/*
 * ARM KGDB support
 *
 * Author: Deepak Saxena <dsaxena@mvista.com>
 *
 * Copyright (C) 2002 MontaVista Software Inc.
 *
 */

#ifndef __ARM_KGDB_H__
#define __ARM_KGDB_H__

#include <linux/ptrace.h>

/*
 * GDB assumes that we're a user process being debugged, so
 * it will send us an SWI command to write into memory as the
 * debug trap. When an SWI occurs, the next instruction addr is
 * placed into R14_svc before jumping to the vector trap.
 * This doesn't work for kernel debugging as we are already in SVC
 * we would loose the kernel's LR, which is a bad thing. This
 * is  bad thing.
 *
 * By doing this as an undefined instruction trap, we force a mode
 * switch from SVC to UND mode, allowing us to save full kernel state.
 *
 * We also define a KGDB_COMPILED_BREAK which can be used to compile
 * in breakpoints. This is important for things like sysrq-G and for
 * the initial breakpoint from trap_init().
 *
 * Note to ARM HW designers: Add real trap support like SH && PPC to
 * make our lives much much simpler. :)
 */
#define BREAK_INSTR_SIZE	4
#define GDB_BREAKINST		0xef9f0001
#define KGDB_BREAKINST		0xe7ffdefe
#define KGDB_COMPILED_BREAK	0xe7ffdeff
#define CACHE_FLUSH_IS_SAFE	1

#ifndef	__ASSEMBLY__

static inline void arch_kgdb_breakpoint(void)
{
	asm(".word 0xe7ffdeff");
}

extern void kgdb_handle_bus_error(void);
extern int kgdb_fault_expected;

#endif /* !__ASSEMBLY__ */

/*
 * From Kevin Hilman:
 *
 * gdb is expecting the following registers layout.
 *
 * r0-r15: 1 long word each
 * f0-f7:  unused, 3 long words each !!
 * fps:    unused, 1 long word
 * cpsr:   1 long word
 *
 * Even though f0-f7 and fps are not used, they need to be
 * present in the registers sent for correct processing in
 * the host-side gdb.
 *
 * In particular, it is crucial that CPSR is in the right place,
 * otherwise gdb will not be able to correctly interpret stepping over
 * conditional branches.
 */
#define _GP_REGS		16
#define _FP_REGS		8
#define _EXTRA_REGS		2
#define GDB_MAX_REGS		(_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS)
#define DBG_MAX_REG_NUM		(_GP_REGS + _FP_REGS + _EXTRA_REGS)

#define KGDB_MAX_NO_CPUS	1
#define BUFMAX			400
#define NUMREGBYTES		(DBG_MAX_REG_NUM << 2)
#define NUMCRITREGBYTES		(32 << 2)

#define _R0			0
#define _R1			1
#define _R2			2
#define _R3			3
#define _R4			4
#define _R5			5
#define _R6			6
#define _R7			7
#define _R8			8
#define _R9			9
#define _R10			10
#define _FP			11
#define _IP			12
#define _SPT			13
#define _LR			14
#define _PC			15
#define _CPSR			(GDB_MAX_REGS - 1)

/*
 * So that we can denote the end of a frame for tracing,
 * in the simple case:
 */
#define CFI_END_FRAME(func)	__CFI_END_FRAME(_PC, _SPT, func)

#endif /* __ASM_KGDB_H__ */
Commit	Line	Data
5cbad0eb JW	1	/*
	2	* ARM KGDB support
	3	*
	4	* Author: Deepak Saxena <dsaxena@mvista.com>
	5	*
	6	* Copyright (C) 2002 MontaVista Software Inc.
	7	*
	8	*/
	9
	10	#ifndef __ARM_KGDB_H__
	11	#define __ARM_KGDB_H__
	12
	13	#include <linux/ptrace.h>
	14
	15	/*
	16	* GDB assumes that we're a user process being debugged, so
	17	* it will send us an SWI command to write into memory as the
	18	* debug trap. When an SWI occurs, the next instruction addr is
	19	* placed into R14_svc before jumping to the vector trap.
	20	* This doesn't work for kernel debugging as we are already in SVC
	21	* we would loose the kernel's LR, which is a bad thing. This
	22	* is bad thing.
	23	*
	24	* By doing this as an undefined instruction trap, we force a mode
	25	* switch from SVC to UND mode, allowing us to save full kernel state.
	26	*
	27	* We also define a KGDB_COMPILED_BREAK which can be used to compile
	28	* in breakpoints. This is important for things like sysrq-G and for
	29	* the initial breakpoint from trap_init().
	30	*
	31	* Note to ARM HW designers: Add real trap support like SH && PPC to
	32	* make our lives much much simpler. :)
	33	*/
	34	#define BREAK_INSTR_SIZE 4
	35	#define GDB_BREAKINST 0xef9f0001
	36	#define KGDB_BREAKINST 0xe7ffdefe
	37	#define KGDB_COMPILED_BREAK 0xe7ffdeff
	38	#define CACHE_FLUSH_IS_SAFE 1
	39
	40	#ifndef __ASSEMBLY__
	41
	42	static inline void arch_kgdb_breakpoint(void)
	43	{
	44	asm(".word 0xe7ffdeff");
	45	}
	46
	47	extern void kgdb_handle_bus_error(void);
	48	extern int kgdb_fault_expected;
	49
	50	#endif /* !__ASSEMBLY__ */
	51
	52	/*
	53	* From Kevin Hilman:
	54	*
	55	* gdb is expecting the following registers layout.
	56	*
	57	* r0-r15: 1 long word each
	58	* f0-f7: unused, 3 long words each !!
	59	* fps: unused, 1 long word
	60	* cpsr: 1 long word
	61	*
	62	* Even though f0-f7 and fps are not used, they need to be
	63	* present in the registers sent for correct processing in
	64	* the host-side gdb.
65	*
66	* In particular, it is crucial that CPSR is in the right place,
67	* otherwise gdb will not be able to correctly interpret stepping over
68	* conditional branches.
69	*/
70	#define _GP_REGS 16
71	#define _FP_REGS 8
72	#define _EXTRA_REGS 2
834b2964 RV	73	#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS)
834b2964 RV	74	#define DBG_MAX_REG_NUM (_GP_REGS + _FP_REGS + _EXTRA_REGS)
5cbad0eb JW	75
	76	#define KGDB_MAX_NO_CPUS 1
	77	#define BUFMAX 400
22eeef4b	78	#define NUMREGBYTES (DBG_MAX_REG_NUM << 2)
5cbad0eb JW	79	#define NUMCRITREGBYTES (32 << 2)
	80
	81	#define _R0 0
	82	#define _R1 1
	83	#define _R2 2
	84	#define _R3 3
	85	#define _R4 4
	86	#define _R5 5
	87	#define _R6 6
	88	#define _R7 7
	89	#define _R8 8
	90	#define _R9 9
	91	#define _R10 10
	92	#define _FP 11
	93	#define _IP 12
	94	#define _SPT 13
	95	#define _LR 14
	96	#define _PC 15
834b2964	97	#define _CPSR (GDB_MAX_REGS - 1)
5cbad0eb JW	98
	99	/*
	100	* So that we can denote the end of a frame for tracing,
	101	* in the simple case:
	102	*/
	103	#define CFI_END_FRAME(func) __CFI_END_FRAME(_PC, _SPT, func)
	104
	105	#endif /* __ASM_KGDB_H__ */