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Commit | Line | Data |
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d0fc2eaa KG |
1 | * SPI (Serial Peripheral Interface) |
2 | ||
3 | Required properties: | |
4 | - cell-index : SPI controller index. | |
5 | - compatible : should be "fsl,spi". | |
6 | - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". | |
7 | - reg : Offset and length of the register set for the device | |
8 | - interrupts : <a b> where a is the interrupt number and b is a | |
9 | field that represents an encoding of the sense and level | |
10 | information for the interrupt. This should be encoded based on | |
11 | the information in section 2) depending on the type of interrupt | |
12 | controller you have. | |
13 | - interrupt-parent : the phandle for the interrupt controller that | |
14 | services interrupts for this device. | |
15 | ||
85cd7467 ES |
16 | Optional properties: |
17 | - gpios : specifies the gpio pins to be used for chipselects. | |
18 | The gpios will be referred to as reg = <index> in the SPI child nodes. | |
19 | If unspecified, a single SPI device without a chip select can be used. | |
20 | ||
d0fc2eaa KG |
21 | Example: |
22 | spi@4c0 { | |
23 | cell-index = <0>; | |
24 | compatible = "fsl,spi"; | |
25 | reg = <4c0 40>; | |
26 | interrupts = <82 0>; | |
27 | interrupt-parent = <700>; | |
28 | mode = "cpu"; | |
85cd7467 ES |
29 | gpios = <&gpio 18 1 // device reg=<0> |
30 | &gpio 19 1>; // device reg=<1> | |
d0fc2eaa | 31 | }; |